/arch/alpha/include/uapi/asm/ |
H A D | compiler.h | 13 # define __kernel_insbl(val, shift) __builtin_alpha_insbl(val, shift) 14 # define __kernel_inswl(val, shift) __builtin_alpha_inswl(val, shift) 15 # define __kernel_insql(val, shift) __builtin_alpha_insql(val, shift) 16 # define __kernel_inslh(val, shift) __builtin_alpha_inslh(val, shift) 17 # define __kernel_extbl(val, shift) __builtin_alpha_extbl(val, shift) [all...] |
/arch/arm/boot/dts/ |
H A D | omap446x-clocks.dtsi | 15 ti,bit-shift = <24>; 24 ti,bit-shift = <8>;
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H A D | omap443x-clocks.dtsi | 15 ti,bit-shift = <8>;
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H A D | omap3xxx-clocks.dtsi | 28 ti,bit-shift = <6>; 39 ti,bit-shift = <7>; 87 ti,bit-shift = <4>; 101 ti,bit-shift = <2>; 115 ti,bit-shift = <6>; 142 ti,bit-shift = <2>; 223 ti,bit-shift = <0x1b>; 247 ti,bit-shift = <16>; 265 ti,bit-shift = <0xc>; 294 ti,bit-shift [all...] |
H A D | omap34xx-omap36xx-clocks.dtsi | 23 ti,bit-shift = <3>; 32 ti,bit-shift = <2>; 40 ti,bit-shift = <1>; 48 ti,bit-shift = <0>; 55 ti,bit-shift = <0>; 65 ti,bit-shift = <0>; 73 ti,bit-shift = <1>; 89 ti,bit-shift = <4>; 97 ti,bit-shift = <29>; 105 ti,bit-shift [all...] |
H A D | omap2430-clocks.dtsi | 29 ti,bit-shift = <2>; 43 ti,bit-shift = <4>; 59 ti,bit-shift = <0>; 67 ti,bit-shift = <5>; 83 ti,bit-shift = <0>; 105 ti,bit-shift = <1>; 113 ti,bit-shift = <3>; 121 ti,bit-shift = <3>; 129 ti,bit-shift = <4>; 137 ti,bit-shift [all...] |
H A D | omap3430es1-clocks.dtsi | 16 ti,bit-shift = <0>; 41 ti,bit-shift = <1>; 49 ti,bit-shift = <2>; 57 ti,bit-shift = <3>; 65 ti,bit-shift = <5>; 72 ti,bit-shift = <0>; 80 ti,bit-shift = <8>; 104 ti,bit-shift = <4>; 112 ti,bit-shift = <8>; 128 ti,bit-shift [all...] |
H A D | omap2420-clocks.dtsi | 16 ti,bit-shift = <15>; 24 ti,bit-shift = <8>; 38 ti,bit-shift = <11>; 48 ti,bit-shift = <1>; 56 ti,bit-shift = <5>; 72 ti,bit-shift = <10>; 80 ti,bit-shift = <8>; 103 ti,bit-shift = <8>; 111 ti,bit-shift = <28>; 119 ti,bit-shift [all...] |
H A D | omap24xx-clocks.dtsi | 15 ti,bit-shift = <2>; 29 ti,bit-shift = <6>; 81 ti,bit-shift = <23>; 97 ti,bit-shift = <6>; 106 ti,bit-shift = <6>; 135 ti,bit-shift = <2>; 136 ti,idlest-shift = <8>; 145 ti,bit-shift = <6>; 146 ti,idlest-shift = <9>; 155 ti,bit-shift [all...] |
H A D | am35xx-clocks.dtsi | 16 ti,bit-shift = <1>; 24 ti,bit-shift = <9>; 32 ti,bit-shift = <2>; 40 ti,bit-shift = <10>; 48 ti,bit-shift = <0>; 56 ti,bit-shift = <8>; 64 ti,bit-shift = <3>; 73 ti,bit-shift = <4>; 93 ti,bit-shift = <23>; 101 ti,bit-shift [all...] |
H A D | omap54xx-clocks.dtsi | 21 ti,bit-shift = <8>; 41 ti,bit-shift = <10>; 148 ti,bit-shift = <24>; 372 ti,bit-shift = <4>; 390 ti,bit-shift = <8>; 400 ti,bit-shift = <11>; 408 ti,bit-shift = <24>; 417 ti,bit-shift = <26>; 425 ti,bit-shift = <24>; 433 ti,bit-shift [all...] |
/arch/arm/mach-imx/ |
H A D | clk.h | 40 void __iomem *reg, u8 shift, u32 exclusive_mask); 43 void __iomem *reg, u8 shift) 46 shift, 0, &imx_ccm_lock, NULL); 50 const char *parent, void __iomem *reg, u8 shift, 54 shift, 0, &imx_ccm_lock, share_count); 61 void __iomem *reg, u8 shift, u8 width, 64 struct clk *imx_clk_busy_mux(const char *name, void __iomem *reg, u8 shift, 69 void __iomem *reg, u8 shift, u8 width, 73 u8 shift, u8 width, const char **parents, 82 void __iomem *reg, u8 shift, u 42 imx_clk_gate2(const char *name, const char *parent, void __iomem *reg, u8 shift) argument 49 imx_clk_gate2_shared(const char *name, const char *parent, void __iomem *reg, u8 shift, unsigned int *share_count) argument 81 imx_clk_divider(const char *name, const char *parent, void __iomem *reg, u8 shift, u8 width) argument 88 imx_clk_divider_flags(const char *name, const char *parent, void __iomem *reg, u8 shift, u8 width, unsigned long flags) argument 96 imx_clk_gate(const char *name, const char *parent, void __iomem *reg, u8 shift) argument 103 imx_clk_gate_dis(const char *name, const char *parent, void __iomem *reg, u8 shift) argument 110 imx_clk_mux(const char *name, void __iomem *reg, u8 shift, u8 width, const char **parents, int num_parents) argument 118 imx_clk_mux_flags(const char *name, void __iomem *reg, u8 shift, u8 width, const char **parents, int num_parents, unsigned long flags) argument [all...] |
/arch/mips/pci/ |
H A D | ops-vr41xx.c | 93 int shift; local 102 shift = (where & 3) << 3; 103 data &= ~(0xffU << shift); 104 data |= ((val & 0xffU) << shift); 107 shift = (where & 2) << 3; 108 data &= ~(0xffffU << shift); 109 data |= ((val & 0xffffU) << shift);
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/arch/powerpc/include/asm/ |
H A D | pgalloc-32.h | 61 void *table, int shift) 64 BUG_ON(shift > MAX_PGTABLE_INDEX_SIZE); 65 pgf |= shift; 72 unsigned shift = (unsigned long)_table & MAX_PGTABLE_INDEX_SIZE; local 74 pgtable_free(table, shift); 78 void *table, int shift) 80 pgtable_free(table, shift); 60 pgtable_free_tlb(struct mmu_gather *tlb, void *table, int shift) argument 77 pgtable_free_tlb(struct mmu_gather *tlb, void *table, int shift) argument
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/arch/sh/drivers/pci/ |
H A D | ops-sh4.c | 68 int shift; local 78 shift = (where & 3) << 3; 79 data &= ~(0xff << shift); 80 data |= ((val & 0xff) << shift); 83 shift = (where & 2) << 3; 84 data &= ~(0xffff << shift); 85 data |= ((val & 0xffff) << shift);
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/arch/arm/mach-omap2/ |
H A D | prminst44xx.c | 108 * @shift: register bit shift corresponding to the reset line to check 114 int omap4_prminst_is_hardreset_asserted(u8 shift, u8 part, s16 inst, argument 120 v &= 1 << shift; 121 v >>= shift; local 129 * @shift: register bit shift corresponding to the reset line to assert 138 int omap4_prminst_assert_hardreset(u8 shift, u8 part, s16 inst, argument 141 u32 mask = 1 << shift; 152 * @shift 163 omap4_prminst_deassert_hardreset(u8 shift, u8 part, s16 inst, u16 rstctrl_offs) argument [all...] |
H A D | prminst44xx.h | 29 extern int omap4_prminst_is_hardreset_asserted(u8 shift, u8 part, s16 inst, 31 extern int omap4_prminst_assert_hardreset(u8 shift, u8 part, s16 inst, 33 extern int omap4_prminst_deassert_hardreset(u8 shift, u8 part, s16 inst,
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/arch/mips/mti-sead3/ |
H A D | sead3-leds.c | 12 #define LEDFLAGS(bits, shift) \ 13 ((bits << 8) | (shift << 8)) 15 #define LEDBITS(id, shift, bits) \ 16 .name = id #shift, \ 17 .flags = LEDFLAGS(bits, shift)
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/arch/s390/include/asm/ |
H A D | cmpxchg.h | 19 int shift; local 24 shift = (3 ^ (addr & 3)) << 3; 34 : "d" ((x & 0xff) << shift), "d" (~(0xff << shift)), 36 return old >> shift; 39 shift = (2 ^ (addr & 2)) << 3; 49 : "d" ((x & 0xffff) << shift), "d" (~(0xffff << shift)), 51 return old >> shift; 99 int shift; local [all...] |
/arch/m32r/lib/ |
H A D | ashxdi3.S | 10 ; input r2 shift val 26 ; case 32 =< shift 32 1: ; case shift <32 46 ; case 32 =< shift 51 1: ; case shift <32 63 ; case 32 =< shift 68 1: ; case shift <32 83 ; case 32 =< shift 89 1: ; case shift <32 103 ; case 32 =< shift [all...] |
/arch/x86/kernel/ |
H A D | vsyscall_gtod.c | 38 vdata->shift = tk->tkr.shift; 47 << tk->tkr.shift); 49 (((u64)NSEC_PER_SEC) << tk->tkr.shift)) { 51 ((u64)NSEC_PER_SEC) << tk->tkr.shift; 57 tk->tkr.shift);
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/arch/mn10300/include/asm/ |
H A D | bitops.h | 29 const unsigned shift = (nr) & 7; \ 34 : "a"(_a), "d"(1 << shift), "m"(*_a) \ 46 const unsigned shift = (nr) & 7; \ 51 : "a"(_a), "d"(1 << shift), "m"(*_a) \ 97 const unsigned shift = (nr) & 7; \ 104 : "a"(_a), "d"(1 << shift), "m"(*_a) \ 118 const unsigned shift = (nr) & 7; \ 125 : "a"(_a), "d"(1 << shift), "m"(*_a) \
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/arch/powerpc/mm/ |
H A D | hugepage-hash64.c | 27 unsigned long hidx, shift, vpn, hash, slot; local 45 shift = mmu_psize_defs[psize].shift; 46 max_hpte_count = HPAGE_PMD_SIZE >> shift; 58 addr = s_addr + (i * (1ul << shift)); 60 hash = hpt_hash(vpn, shift, ssize); 81 unsigned long vpn, hash, shift, slot; local 134 shift = mmu_psize_defs[psize].shift; 135 index = (ea & ~HPAGE_PMD_MASK) >> shift; [all...] |
H A D | tlb_nohash.c | 59 .shift = 12, 63 .shift = 21, 67 .shift = 22, 71 .shift = 24, 75 .shift = 26, 79 .shift = 28, 83 .shift = 30, 90 .shift = 12, 95 .shift = 14, 99 .shift 442 unsigned int shift; local [all...] |
/arch/powerpc/sysdev/qe_lib/ |
H A D | ucc.c | 88 unsigned int *reg_num, unsigned int *shift) 94 *shift = 16 - 8 * (ucc_num & 2); 101 unsigned int shift; local 107 get_cmxucr_reg(ucc_num, &cmxucr, ®_num, &shift); 110 setbits32(cmxucr, mask << shift); 112 clrbits32(cmxucr, mask << shift); 122 unsigned int shift; local 133 get_cmxucr_reg(ucc_num, &cmxucr, ®_num, &shift); 206 shift += 4; 208 clrsetbits_be32(cmxucr, QE_CMXUCR_TX_CLK_SRC_MASK << shift, 87 get_cmxucr_reg(unsigned int ucc_num, __be32 __iomem **cmxucr, unsigned int *reg_num, unsigned int *shift) argument [all...] |