Searched refs:BIT11 (Results 1 - 21 of 21) sorted by relevance
| /drivers/staging/vt6655/ |
| H A D | hostap.h | 45 #define WLAN_RATE_54M BIT11
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| H A D | 80211hdr.h | 48 #define BIT11 0x00000800 macro
164 #define WLAN_GET_FC_RETRY(n) ((((unsigned short)(n) << 8) & (BIT11)) >> 11)
197 #define WLAN_GET_FC_RETRY(n) ((((unsigned short)(n)) & (BIT11)) >> 11)
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| /drivers/net/wireless/rtlwifi/btcoexist/ |
| H A D | halbt_precomp.h | 59 #define BIT11 0x00000800 macro
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| /drivers/staging/emxx_udc/ |
| H A D | emxx_udc.h | 98 #define BIT11 0x00000800 macro
188 #define EP3_INT BIT11
215 #define EP3_EN BIT11
256 #define EP0_IN_NAK_INT BIT11
269 #define EP0_STATUS_RW_BIT (BIT16|BIT15|BIT11|0xFF)
275 #define EP0_IN_NAK_EN BIT11
309 #define EPn_IPIDCLR BIT11
372 #define EPn_STOP_MODE BIT11
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| /drivers/staging/rtl8188eu/include/ |
| H A D | odm_debug.h | 71 #define ODM_COMP_PSD BIT11
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| H A D | rtl8188e_spec.h | 37 #define BIT11 0x00000800 macro
562 #define RRSR_54M BIT11
631 #define IMR_HISR1_IND_INT_88E BIT11 /* HISR1 Indicator (HISR1 & HIMR1 is true, this bit is set to 1) */
660 #define IMR_TXERR_88E BIT11 /* Tx Err Flag Int Status, write 1 clear. */
720 #define RCR_ADF BIT11 /* Accept data type frame */
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| H A D | osdep_service.h | 118 #define BIT11 0x00000800 macro
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| H A D | odm.h | 428 ODM_BB_PSD = BIT11,
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| /drivers/staging/rtl8188eu/hal/ |
| H A D | odm_RTL8188E.c | 92 BIT13|BIT12|BIT11, 2);
139 phy_set_bb_reg(adapter, 0x858, BIT13|BIT12|BIT11, 2);
147 phy_set_bb_reg(adapter, 0x858, BIT13|BIT12|BIT11, 1);
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| /drivers/staging/rtl8192e/rtl8192e/ |
| H A D | r8192E_hw.h | 231 #define IMR_RDU BIT11
256 #define TPPoll_StopVI BIT11
386 #define RRSR_54M BIT11
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| /drivers/scsi/ |
| H A D | tmscsim.h | 181 #define BIT11 0x00000800 macro
218 #define SRB_COMPLETED BIT11
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| H A D | dc395x.h | 64 #define BIT11 0x00000800 macro
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| /drivers/staging/rtl8192e/ |
| H A D | rtl819x_Qos.h | 35 #define BIT11 0x00000800 macro
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| /drivers/staging/rtl8192u/ieee80211/ |
| H A D | rtl819x_Qos.h | 15 #define BIT11 0x00000800 macro
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| /drivers/staging/rtl8192u/ |
| H A D | r8192U_hw.h | 318 #define RRSR_54M BIT11
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| H A D | r8192U.h | 59 #define BIT11 0x00000800 macro
107 #define COMP_QOS BIT11
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| /drivers/tty/ |
| H A D | synclink_gt.c | 415 #define IRQ_TXUNDER BIT11 /* HDLC */
4317 case HDLC_ENCODING_NRZI_MARK: val |= BIT11; break;
4318 case HDLC_ENCODING_NRZI: val |= BIT11 + BIT10; break;
4321 case HDLC_ENCODING_BIPHASE_LEVEL: val |= BIT12 + BIT11; break;
4322 case HDLC_ENCODING_DIFF_BIPHASE_LEVEL: val |= BIT12 + BIT11 + BIT10; break;
4390 case HDLC_ENCODING_NRZI_MARK: val |= BIT11; break;
4391 case HDLC_ENCODING_NRZI: val |= BIT11 + BIT10; break;
4394 case HDLC_ENCODING_BIPHASE_LEVEL: val |= BIT12 + BIT11; break;
4395 case HDLC_ENCODING_DIFF_BIPHASE_LEVEL: val |= BIT12 + BIT11 + BIT10; break;
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| H A D | synclink.c | 544 #define TCSR_UNDERWAIT BIT11
562 #define MISCSTATUS_RI_LATCHED BIT11
584 #define SICR_RI_ACTIVE BIT11
586 #define SICR_RI (BIT11|BIT10)
4975 RegValue |= BIT11;
5173 case HDLC_PREAMBLE_LENGTH_32BITS: RegValue |= BIT11; break;
5174 case HDLC_PREAMBLE_LENGTH_64BITS: RegValue |= BIT11 | BIT10; break;
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| /drivers/net/wireless/rtlwifi/rtl8192de/ |
| H A D | reg.h | 395 #define RRSR_54M BIT11
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| /drivers/char/pcmcia/ |
| H A D | synclink_cs.c | 294 #define IRQ_TIMER BIT11 // timer interrupt
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| /drivers/scsi/lpfc/ |
| H A D | lpfc_hw4.h | 685 #define LPFC_SLI4_INTR11 BIT11
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