Searched refs:BIT14 (Results 1 - 21 of 21) sorted by relevance

/drivers/net/wireless/rtlwifi/btcoexist/
H A Dhalbt_precomp.h62 #define BIT14 0x00004000 macro
/drivers/staging/vt6655/
H A D80211hdr.h51 #define BIT14 0x00004000 macro
167 #define WLAN_GET_FC_ISWEP(n) ((((unsigned short)(n) << 8) & (BIT14)) >> 14)
186 #define WLAN_GET_CAP_INFO_GRPACK(n) ((((n)) & BIT14) >> 14)
200 #define WLAN_GET_FC_ISWEP(n) ((((unsigned short)(n)) & (BIT14)) >> 14)
219 #define WLAN_GET_CAP_INFO_GRPACK(n) (((n) & BIT14) >> 14)
H A Dpower.c77 unsigned short wAID = pMgmt->wCurrAID | BIT14 | BIT15;
244 pTxPacket->p80211Header->sA2.wDurationID = pMgmt->wCurrAID | BIT14 | BIT15;
H A Dwmgr.c962 pMgmt->wCurrAID & ~(BIT14 | BIT15));
2002 wAIDNumber = pMgmt->wCurrAID & ~(BIT14|BIT15);
3821 *sFrame.pwAid = cpu_to_le16((unsigned short)(wAssocAID | BIT14 | BIT15));
3892 *sFrame.pwAid = cpu_to_le16((unsigned short)(wAssocAID | BIT14 | BIT15));
/drivers/staging/emxx_udc/
H A Demxx_udc.h101 #define BIT14 0x00004000 macro
156 #define UFRAME (BIT14+BIT13+BIT12)
185 #define EP6_INT BIT14
212 #define EP6_EN BIT14
253 #define EP0_OUT_NULL BIT14
/drivers/staging/rtl8192e/rtl8192e/
H A Dr8192E_hw.h228 #define IMR_TIMEOUT0 BIT14
259 #define TPPoll_StopHigh BIT14
389 #define RRSR_MCS2 BIT14
/drivers/staging/rtl8188eu/include/
H A Drtl8188e_spec.h40 #define BIT14 0x00004000 macro
565 #define RRSR_MCS2 BIT14
629 #define IMR_BCNDMAINT_E_88E BIT14 /* Beacon DMA Interrupt Extension for Win7 */
658 #define IMR_BCNDERR1_88E BIT14 /* Beacon DMA Error Int 1 */
717 #define RCR_HTC_LOC_CTRL BIT14 /* MFC<--HTC=1 MFC-->HTC=0 */
H A Dosdep_service.h121 #define BIT14 0x00004000 macro
/drivers/scsi/
H A Dtmscsim.h178 #define BIT14 0x00004000 macro
221 #define SRB_UNEXPECT_RESEL BIT14
H A Ddc395x.h61 #define BIT14 0x00004000 macro
/drivers/staging/rtl8188eu/hal/
H A Dodm_RTL8188E.c149 phy_set_bb_reg(adapter, 0x858, BIT15|BIT14, 2);
212 BIT14|BIT13|BIT12, default_ant);
H A Dodm.c769 phy_set_bb_reg(adapter, ODM_REG_CCK_FA_RST_11N, BIT14, 1);
/drivers/staging/rtl8192e/
H A Drtl819x_Qos.h38 #define BIT14 0x00004000 macro
/drivers/staging/rtl8192u/ieee80211/
H A Drtl819x_Qos.h18 #define BIT14 0x00004000 macro
/drivers/staging/rtl8192u/
H A Dr8192U_hw.h321 #define RRSR_MCS2 BIT14
H A Dr8192U.h62 #define BIT14 0x00004000 macro
110 #define COMP_DIG BIT14
/drivers/tty/
H A Dsynclink.c559 #define MISCSTATUS_RXC BIT14
579 #define SICR_RXC_INACTIVE BIT14
580 #define SICR_RXC (BIT15|BIT14)
1842 usc_OutReg(info, PCR, (u16)((usc_InReg(info, PCR) | BIT15) | BIT14));
4717 RegValue |= BIT14;
4721 RegValue |= BIT15 | BIT14;
4761 case HDLC_ENCODING_NRZI_MARK: RegValue |= BIT14; break;
4762 case HDLC_ENCODING_NRZI_SPACE: RegValue |= BIT14 | BIT13; break;
4765 case HDLC_ENCODING_BIPHASE_LEVEL: RegValue |= BIT15 | BIT14; break;
4766 case HDLC_ENCODING_DIFF_BIPHASE_LEVEL: RegValue |= BIT15 | BIT14 | BIT1
[all...]
H A Dsynclink_gt.c384 #define MASK_BREAK BIT14
411 #define RXIDLE BIT14
412 #define RXBREAK BIT14
4018 wr_reg16(info, SCR, (unsigned short)(rd_reg16(info, SCR) & ~BIT14));
4026 wr_reg16(info, SCR, (unsigned short)(rd_reg16(info, SCR) | BIT14));
4253 val = BIT15 + BIT14 + BIT0;
4307 case MGSL_MODE_MONOSYNC: val |= BIT14 + BIT13; break;
4382 case MGSL_MODE_MONOSYNC: val |= BIT14 + BIT13; break;
4489 wr_reg16(info, SCR, BIT15 + BIT14 + BIT0);
/drivers/net/wireless/rtlwifi/rtl8192de/
H A Dreg.h398 #define RRSR_MCS2 BIT14
/drivers/char/pcmcia/
H A Dsynclink_cs.c291 #define IRQ_DATAOVERRUN BIT14 // receive data overflow
/drivers/scsi/lpfc/
H A Dlpfc_hw4.h688 #define LPFC_SLI4_INTR14 BIT14

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