Searched refs:BIT17 (Results 1 - 19 of 19) sorted by relevance
| /drivers/net/wireless/rtlwifi/btcoexist/ |
| H A D | halbt_precomp.h | 65 #define BIT17 0x00020000 macro
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| /drivers/staging/emxx_udc/ |
| H A D | emxx_udc.h | 104 #define BIT17 0x00020000 macro
122 #define USBTESTMODE (BIT18+BIT17+BIT16)
124 #define TEST_K BIT17
125 #define TEST_SE0_NAK (BIT17+BIT16)
182 #define EP9_INT BIT17
209 #define EP9_EN BIT17
231 #define EP0_OVERSEL BIT17
250 #define EP0_PERR_NAK BIT17
306 #define EPn_OVERSEL BIT17
339 #define EPn_OUT_FULL BIT17 /*
[all...] |
| /drivers/staging/rtl8188eu/include/ |
| H A D | odm_debug.h | 76 #define ODM_COMP_EARLY_MODE BIT17
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| H A D | rtl8188e_spec.h | 43 #define BIT17 0x00020000 macro
568 #define RRSR_MCS5 BIT17
655 #define IMR_BCNDERR4_88E BIT17 /* Beacon DMA Error Int 4 */
1209 #define SDIO_HIMR_C2HCMD_MSK BIT17
1235 #define SDIO_HISR_C2HCMD BIT17
1304 #define BT_HWPDN_SL BIT17
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| H A D | osdep_service.h | 124 #define BIT17 0x00020000 macro
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| H A D | odm.h | 433 ODM_MAC_EARLY_MODE = BIT17,
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| /drivers/staging/rtl8188eu/hal/ |
| H A D | odm_RTL8188E.c | 123 phy_set_bb_reg(adapter, 0x7b4, bMaskDWord, value32|(BIT16|BIT17));
150 phy_set_bb_reg(adapter, 0x878, BIT19|BIT18|BIT17, 3);
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| H A D | odm.c | 1246 phy_set_rf_reg(Adapter, RF_PATH_A, RF_T_METER_88E, BIT17 | BIT16, 0x03);
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| /drivers/staging/rtl8192e/ |
| H A D | rtl819x_Qos.h | 41 #define BIT17 0x00020000 macro
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| /drivers/staging/rtl8192u/ieee80211/ |
| H A D | rtl819x_Qos.h | 21 #define BIT17 0x00020000 macro
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| /drivers/staging/rtl8192u/ |
| H A D | r8192U_hw.h | 324 #define RRSR_MCS5 BIT17
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| H A D | r8192U.h | 65 #define BIT17 0x00020000 macro
113 #define COMP_TXAGC BIT17 /* Tx power */
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| /drivers/staging/vt6655/ |
| H A D | 80211hdr.h | 54 #define BIT17 0x00020000 macro
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| /drivers/scsi/ |
| H A D | dc395x.h | 58 #define BIT17 0x00020000 macro
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| H A D | tmscsim.h | 175 #define BIT17 0x00020000 macro
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| /drivers/staging/rtl8192e/rtl8192e/ |
| H A D | r8192E_hw.h | 392 #define RRSR_MCS5 BIT17
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| /drivers/net/wireless/rtlwifi/rtl8192de/ |
| H A D | reg.h | 401 #define RRSR_MCS5 BIT17
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| /drivers/scsi/lpfc/ |
| H A D | lpfc_hw4.h | 691 #define LPFC_SLI4_INTR17 BIT17
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| /drivers/tty/ |
| H A D | synclink_gt.c | 2387 if (gsr & (BIT17 << (i*2)))
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