Searched refs:BLC_PWM_CPU_CTL2 (Results 1 - 4 of 4) sorted by relevance

/drivers/gpu/drm/i915/
H A Dintel_panel.c692 tmp = I915_READ(BLC_PWM_CPU_CTL2);
693 I915_WRITE(BLC_PWM_CPU_CTL2, tmp & ~BLM_PWM_ENABLE);
803 cpu_ctl2 = I915_READ(BLC_PWM_CPU_CTL2);
807 I915_WRITE(BLC_PWM_CPU_CTL2, cpu_ctl2);
821 I915_WRITE(BLC_PWM_CPU_CTL2, cpu_ctl2);
822 POSTING_READ(BLC_PWM_CPU_CTL2);
823 I915_WRITE(BLC_PWM_CPU_CTL2, cpu_ctl2 | BLM_PWM_ENABLE);
1168 cpu_ctl2 = I915_READ(BLC_PWM_CPU_CTL2);
H A Di915_ums.c282 dev_priv->regfile.saveBLC_CPU_PWM_CTL2 = I915_READ(BLC_PWM_CPU_CTL2);
307 /* NOTE: BLC_PWM_CPU_CTL must be written after BLC_PWM_CPU_CTL2;
310 I915_WRITE(BLC_PWM_CPU_CTL2, dev_priv->regfile.saveBLC_CPU_PWM_CTL2);
H A Di915_reg.h3010 #define BLC_PWM_CPU_CTL2 0x48250 macro
H A Dintel_display.c7534 WARN(I915_READ(BLC_PWM_CPU_CTL2) & BLM_PWM_ENABLE,

Completed in 106 milliseconds