Searched refs:ChannelPlan (Results 1 - 17 of 17) sorted by relevance

/drivers/staging/rtl8192e/
H A Ddot11d.c26 static struct channel_list ChannelPlan[] = { variable in typeref:struct:channel_list
70 if (ChannelPlan[channel_plan].Len != 0) {
73 for (i = 0; i < ChannelPlan[channel_plan].Len; i++) {
74 if (ChannelPlan[channel_plan].Channel[i] < min_chan ||
75 ChannelPlan[channel_plan].Channel[i] > max_chan)
77 GET_DOT11D_INFO(ieee)->channel_map[ChannelPlan
/drivers/staging/rtl8723au/include/
H A Drtw_mlme.h157 u8 ChannelPlan; member in struct:mlme_priv
H A Drtl8723a_hal.h166 enum ChannelPlan enum
/drivers/staging/rtl8192e/rtl8192e/
H A Dr8192E_dev.c568 priv->ChannelPlan = priv->eeprom_ChannelPlan;
570 priv->ChannelPlan = priv->RegChannelPlan;
591 priv->ChannelPlan = priv->eeprom_ChannelPlan&0x7f;
593 priv->ChannelPlan = 0x0;
594 RT_TRACE(COMP_INIT, "Toshiba ChannelPlan = 0x%x\n",
595 priv->ChannelPlan);
614 if (priv->ChannelPlan > CHANNEL_PLAN_LEN - 1)
615 priv->ChannelPlan = 0;
616 priv->ChannelPlan = COUNTRY_CODE_WORLD_WIDE_13;
624 RT_TRACE(COMP_INIT, "ChannelPlan
[all...]
H A Drtl_core.c1286 if (priv->ChannelPlan >= COUNTRY_CODE_MAX) {
1289 priv->ChannelPlan = COUNTRY_CODE_FCC;
1291 RT_TRACE(COMP_INIT, "Channel plan is %d\n", priv->ChannelPlan);
1293 Dot11d_Channelmap(priv->ChannelPlan, priv->rtllib);
H A Drtl_core.h807 u16 ChannelPlan; member in struct:r8192_priv
/drivers/staging/rtl8188eu/include/
H A Drtl8188e_hal.h127 enum ChannelPlan { enum
H A Drtw_mlme.h346 u8 ChannelPlan; member in struct:mlme_priv
/drivers/staging/rtl8192u/
H A Dr8192U_core.c145 static struct CHANNEL_LIST ChannelPlan[] = { variable in typeref:struct:CHANNEL_LIST
183 if (ChannelPlan[channel_plan].Len != 0) {
187 for (i = 0; i < ChannelPlan[channel_plan].Len; i++) {
188 if (ChannelPlan[channel_plan].Channel[i] < min_chan || ChannelPlan[channel_plan].Channel[i] > max_chan)
190 GET_DOT11D_INFO(ieee)->channel_map[ChannelPlan[channel_plan].Channel[i]] = 1;
2323 priv->ChannelPlan = priv->eeprom_ChannelPlan;
2508 if (priv->ChannelPlan > COUNTRY_CODE_GLOBAL_DOMAIN) {
2510 priv->ChannelPlan = 0;
2512 RT_TRACE(COMP_INIT, "Channel plan is %d\n", priv->ChannelPlan);
[all...]
H A Dr8192U.h1025 u8 ChannelPlan; member in struct:r8192_priv
/drivers/staging/rtl8712/
H A Drtl871x_cmd.h349 enum _RT_CHANNEL_DOMAIN ChannelPlan; member in struct:SetChannelPlan_param
H A Drtl871x_cmd.c294 psetchplanpara->ChannelPlan = chplan;
/drivers/staging/rtl8188eu/hal/
H A Drtl8188e_hal_init.c636 padapter->mlmepriv.ChannelPlan =
642 DBG_88E("mlmepriv.ChannelPlan = 0x%02x\n", padapter->mlmepriv.ChannelPlan);
/drivers/staging/rtl8188eu/core/
H A Drtw_mlme_ext.c92 ChannelPlan definitions
325 static u8 init_channel_set(struct adapter *padapter, u8 ChannelPlan, struct rt_channel_info *channel_set) argument
333 if (ChannelPlan >= RT_CHANNEL_DOMAIN_MAX && ChannelPlan != RT_CHANNEL_DOMAIN_REALTEK_DEFINE) {
334 DBG_88E("ChannelPlan ID %x error !!!!!\n", ChannelPlan);
340 if (RT_CHANNEL_DOMAIN_REALTEK_DEFINE == ChannelPlan)
343 Index2G = RTW_ChannelPlanMap[ChannelPlan].Index2G;
350 if ((RT_CHANNEL_DOMAIN_GLOBAL_DOAMIN == ChannelPlan) ||/* Channel 1~11 is active, and 12~14 is passive */
351 (RT_CHANNEL_DOMAIN_GLOBAL_DOAMIN_2G == ChannelPlan)) {
[all...]
H A Drtw_cmd.c830 padapter->mlmepriv.ChannelPlan = chplan;
/drivers/staging/rtl8723au/hal/
H A Drtl8723a_hal_init.c1877 padapter->mlmepriv.ChannelPlan =
1884 DBG_8723A("mlmepriv.ChannelPlan = 0x%02x\n",
1885 padapter->mlmepriv.ChannelPlan);
/drivers/staging/rtl8723au/core/
H A Drtw_mlme_ext.c132 ChannelPlan definitions
494 DBG_8723A("ChannelPlan ID %x error !!!!!\n", cplan);
587 pmlmepriv->ChannelPlan,

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