Searched refs:IER (Results 1 - 25 of 43) sorted by relevance

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/drivers/tty/
H A Dmxser.c239 int IER; /* Interrupt Enable Register */ member in struct:mxser_port
711 info->IER &= ~UART_IER_MSI;
715 info->IER |= UART_IER_MSI;
725 outb(info->IER & ~UART_IER_THRI,
728 info->IER |= UART_IER_THRI;
729 outb(info->IER, info->ioaddr +
739 info->IER &= ~UART_IER_THRI;
740 outb(info->IER, info->ioaddr +
754 info->IER |= UART_IER_MSI;
756 outb(info->IER, inf
[all...]
H A Damiserial.c107 int IER; /* Interrupt Enable Register */ member in struct:serial_state
196 if (info->IER & UART_IER_THRI) {
197 info->IER &= ~UART_IER_THRI;
218 && !(info->IER & UART_IER_THRI)) {
219 info->IER |= UART_IER_THRI;
352 info->IER &= ~UART_IER_THRI;
374 info->IER &= ~UART_IER_THRI;
424 info->IER |= UART_IER_THRI;
439 info->IER &= ~UART_IER_THRI;
458 if(info->IER
[all...]
/drivers/isdn/hisax/
H A Delsa_ser.c30 const char *ModemIn[] = {"RBR", "IER", "IIR", "LCR", "MCR", "LSR", "MSR", "SCR"};
31 const char *ModemOut[] = {"THR", "IER", "FCR", "LCR", "MCR", "LSR", "MSR", "SCR"};
130 cs->hw.elsa.IER &= ~UART_IER_MSI;
131 cs->hw.elsa.IER |= UART_IER_MSI;
132 serial_outp(cs, UART_IER, cs->hw.elsa.IER);
181 cs->hw.elsa.IER = UART_IER_MSI | UART_IER_RLSI | UART_IER_RDI;
182 serial_outp(cs, UART_IER, cs->hw.elsa.IER); /* enable interrupts */
220 cs->hw.elsa.IER = 0;
272 !(cs->hw.elsa.IER & UART_IER_THRI)) {
273 cs->hw.elsa.IER |
[all...]
/drivers/macintosh/
H A Dvia-cuda.c50 #define IER (14*RS) /* Interrupt enable register */ macro
63 /* Bits in IFR and IER */
64 #define IER_SET 0x80 /* set bits in IER */
65 #define IER_CLR 0 /* clear bits in IER */
187 out_8(&via[IER], IER_SET|SR_INT); /* enable interrupt from SR */
269 out_8(&via[IER], 0x7f); /* disable interrupts from VIA */
270 (void)in_8(&via[IER]);
272 out_8(&via[IER], SR_INT); /* disable SR interrupt from VIA */
H A Dvia-maciisi.c40 #define IER (14*RS) /* Interrupt enable register */ macro
53 /* Bits in IFR and IER */
54 #define IER_SET 0x80 /* set bits in IER */
55 #define IER_CLR 0 /* clear bits in IER */
150 via[IER] = IER_CLR | SR_INT;
186 via[IER] = IER_SET | SR_INT;
205 via[IER] = IER_SET | SR_INT;
H A Dvia-pmu.c96 #define IER (14*RS) /* Interrupt enable register */ macro
108 /* Bits in IFR and IER */
109 #define IER_SET 0x80 /* set bits in IER */
110 #define IER_CLR 0 /* clear bits in IER */
346 out_8(&via[IER], IER_CLR | 0x7f); /* disable all intrs */
435 out_8(&via[IER], IER_SET | SR_INT | CB1_INT);
1304 out_8(&via[IER], CB1_INT | IER_CLR);
1328 out_8(&via[IER], CB1_INT | IER_SET);
1575 intr, in_8(&via[IER]), pmu_state);
1780 out_8(&via[IER], IER_CL
[all...]
/drivers/power/reset/
H A Dqnap-poweroff.c69 writel(0x00, UART1_REG(IER));
/drivers/clocksource/
H A Dtcb_clksrc.c121 __raw_writel(ATMEL_TC_CPCS, regs + ATMEL_TC_REG(2, IER));
135 __raw_writel(ATMEL_TC_CPCS, regs + ATMEL_TC_REG(2, IER));
/drivers/net/irda/
H A Dnsc-ircc.c1030 outb(IER_RXHDL_IE, iobase+IER);
1273 outb(0, iobase+IER);
1344 outb(ier, iobase+IER);
1419 outb(IER_TXLDL_IE, iobase+IER);
1532 outb(IER_TMR_IE, iobase+IER);
1542 outb(IER_DMA_IE, iobase+IER);
2108 self->ier = inb(iobase+IER);
2111 outb(0, iobase+IER); /* Disable interrupts */
2121 outb(self->ier, iobase+IER); /* Restore interrupts */
2207 outb(IER_LS_IE | IER_RXHDL_IE, iobase+IER);
[all...]
H A Dnsc-ircc.h79 #define IER 0x01 /* Interrupt Enable Register*/ macro
/drivers/net/hamradio/
H A Dbaycom_ser_fdx.c108 #define IER(iobase) (iobase+1) macro
447 outb(0, IER(dev->base_addr));
464 outb(0x0a, IER(dev->base_addr));
488 outb(0, IER(dev->base_addr));
H A Dbaycom_ser_hdx.c96 #define IER(iobase) (iobase+1) macro
492 outb(0, IER(dev->base_addr));
501 outb(2, IER(dev->base_addr));
524 outb(0, IER(dev->base_addr));
H A Dyam.c166 #define IER(iobase) (iobase+1) macro
308 outb(0, IER(iobase));
480 outb(0, IER(dev->base_addr));
495 outb(ENABLE_RTXINT, IER(dev->base_addr));
890 outb(0, IER(dev->base_addr));
933 outb(0, IER(dev->base_addr));
/drivers/usb/serial/
H A Dio_16654.h30 // the EdgePort firmware -- that includes THR, RHR, IER, FCR.
35 #define IER 1 // ! Interrupt Enable Register macro
H A Dmos7720.c126 IER, enumerator in enum:mos_regs
155 0x01, /* IER */
1037 * 1 : IER
1055 write_mos_reg(serial, port_number, IER, 0x00);
1071 write_mos_reg(serial, port_number, IER, 0x00);
1074 write_mos_reg(serial, port_number, IER, 0x0c);
1148 write_mos_reg(serial, port->port_number, IER, 0x00);
1359 write_mos_reg(serial, port_number, IER, 0x00);
1607 write_mos_reg(serial, port_number, IER, 0x00);
1646 write_mos_reg(serial, port_number, IER,
[all...]
/drivers/input/touchscreen/
H A Datmel-wm97xx.c282 ac97c_writel(atmel_wm97xx, IER, AC97C_INT_CBEVT);
414 ac97c_writel(atmel_wm97xx, IER, AC97C_INT_CBEVT);
/drivers/spi/
H A Dspi-sh-msiof.c70 #define IER 0x44 /* Interrupt Enable Register */ macro
167 /* IER */
236 sh_msiof_write(p, IER, 0);
578 sh_msiof_write(p, IER, IER_TEOFE | IER_REOFE);
619 sh_msiof_write(p, IER, 0);
627 sh_msiof_write(p, IER, 0);
687 sh_msiof_write(p, IER, ier_bits);
736 sh_msiof_write(p, IER, 0);
/drivers/block/rsxx/
H A Dcore.c73 seq_printf(m, "IER 0x%08x\n",
74 ioread32(card->regmap + IER));
301 * NOTE: Disabling the IER will disable the hardware interrupt.
314 iowrite32(card->ier_mask, card->regmap + IER);
323 iowrite32(card->ier_mask, card->regmap + IER);
335 iowrite32(card->ier_mask, card->regmap + IER);
345 iowrite32(card->ier_mask, card->regmap + IER);
H A Drsxx_priv.h197 IER = 0x14, /* Interrupt Enable Register */ enumerator in enum:rsxx_pci_regmap
/drivers/gpu/drm/i915/
H A Di915_irq.c97 I915_WRITE(type##IER, 0); \
129 I915_WRITE(type##IER, (ier_val)); \
130 POSTING_READ(type##IER); \
3972 I915_WRITE16(IER, 0x0);
3973 POSTING_READ16(IER);
3993 I915_WRITE16(IER,
3998 POSTING_READ16(IER);
4126 I915_WRITE16(IER, 0x0);
4144 I915_WRITE(IER, 0x0);
4145 POSTING_READ(IER);
[all...]
H A Di915_suspend.c326 dev_priv->regfile.saveIER = I915_READ(IER);
372 I915_WRITE(IER, dev_priv->regfile.saveIER);
/drivers/media/common/saa7146/
H A Dsaa7146_core.c408 saa7146_write(dev, IER, 0);
529 saa7146_write(dev, IER, 0);
/drivers/rtc/
H A Drtc-at32ap700x.c152 rtc_writel(rtc, IER, RTC_BIT(IER_TOPI));
/drivers/video/fbdev/
H A Di740_reg.h229 #define IER 0x3030 macro
/drivers/video/fbdev/i810/
H A Di810_regs.h44 #define IER 0x020A0 macro

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