Searched refs:IMR (Results 1 - 25 of 27) sorted by relevance

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/drivers/net/ethernet/realtek/
H A Datp.c482 write_reg(ioaddr, IMR, ISR_RxOK | ISR_TxErr | ISR_TxOK);
483 write_reg_high(ioaddr, IMR, ISRh_RxErr);
568 write_reg(ioaddr, IMR, 0);
569 write_reg_high(ioaddr, IMR, 0);
583 write_reg(ioaddr, IMR, ISR_RxOK | ISR_TxErr | ISR_TxOK);
584 write_reg_high(ioaddr, IMR, ISRh_RxErr);
612 write_reg(ioaddr, IMR, 0);
702 write_reg(ioaddr, IMR, ISR_RxOK | ISR_TxErr | ISR_TxOK);
703 write_reg_high(ioaddr, IMR, ISRh_RxErr); /* Hmmm, really needed? */
H A Datp.h38 ISR = 10, IMR = 11, /* Interrupt status and mask. */ enumerator in enum:page0_regs
/drivers/net/wireless/rtl818x/
H A Drtl818x.h206 __le32 IMR; /* 0x6c - Interrupt mask reg for 8187se */ member in struct:rtl818x_csr
/drivers/rtc/
H A Drtc-at32ap700x.c100 alrm->enabled = rtc_readl(rtc, IMR) & RTC_BIT(IMR_TOPI) ? 1 : 0;
/drivers/video/fbdev/
H A Di740_reg.h231 #define IMR 0x3034 macro
/drivers/video/fbdev/i810/
H A Di810_regs.h46 #define IMR 0x020A8 macro
H A Di810_main.c581 i810_writew(IMR, mmio, par->hw_state.imr);
659 par->hw_state.imr = i810_readw(IMR, mmio);
/drivers/net/ethernet/
H A Dfealnx.c175 IMR = 0x38, /* interrupt mask */ enumerator in enum:fealnx_offsets
907 iowrite32(np->imrvalue, ioaddr + IMR);
1134 iowrite32(0, ioaddr + IMR);
1169 iowrite32(np->imrvalue, ioaddr + IMR);
1444 iowrite32(0, ioaddr + IMR);
1602 iowrite32(np->imrvalue, ioaddr + IMR);
1902 iowrite32(0x0000, ioaddr + IMR);
/drivers/net/ethernet/natsemi/
H A Dns83820.c327 #define IMR 0x14 macro
766 writel(dev->IMR_cache, dev->base + IMR);
787 writel(dev->IMR_cache, dev->base + IMR);
795 readl(dev->base + IMR);
949 writel(dev->IMR_cache, dev->base + IMR);
1386 writel(0, dev->base + IMR);
1437 writel(dev->IMR_cache, dev->base + IMR);
1494 writel(dev->IMR_cache, dev->base + IMR);
1508 writel(dev->IMR_cache, dev->base + IMR);
/drivers/gpu/drm/i915/
H A Di915_suspend.c327 dev_priv->regfile.saveIMR = I915_READ(IMR);
373 I915_WRITE(IMR, dev_priv->regfile.saveIMR);
H A Dintel_ringbuffer.c1226 I915_WRITE(IMR, dev_priv->irq_mask);
1227 POSTING_READ(IMR);
1244 I915_WRITE(IMR, dev_priv->irq_mask);
1245 POSTING_READ(IMR);
1263 I915_WRITE16(IMR, dev_priv->irq_mask);
1264 POSTING_READ16(IMR);
1281 I915_WRITE16(IMR, dev_priv->irq_mask);
1282 POSTING_READ16(IMR);
H A Di915_irq.c95 I915_WRITE(type##IMR, 0xffffffff); \
96 POSTING_READ(type##IMR); \
105 * We should clear IMR at preinstall/uninstall, and just check at postinstall.
128 I915_WRITE(type##IMR, (imr_val)); \
1983 * IMR bits until the work is done. Other interrupts can be processed without
3971 I915_WRITE16(IMR, 0xffff);
3991 I915_WRITE16(IMR, dev_priv->irq_mask);
4125 I915_WRITE16(IMR, 0xffff);
4143 I915_WRITE(IMR, 0xffffffff);
4178 /* and unmask in IMR */
[all...]
/drivers/net/wan/
H A Ddscc4.c274 #define IMR 0x54 macro
1073 scc_writel(EventsMask, dpriv, dev, IMR);
1097 scc_writel(EventsMask, dpriv, dev, IMR);
1133 scc_writel(0xffffffff, dpriv, dev, IMR);
1193 scc_writel(0xffffffff, dpriv, dev, IMR);
/drivers/atm/
H A Dfirestream.h297 #define IMR 0x6c macro
H A Dfirestream.c1851 write_fs (dev, IMR, 0
H A Dzatm.c1345 zout(0xffffffff,IMR); /* enable interrupts */
/drivers/video/fbdev/intelfb/
H A Dintelfbhw.h94 #define IMR 0x20A8 macro
H A Dintelfbhw.c651 hw->imr = INREG16(IMR);
870 printk(" IMR 0x%04x\n", hw->imr);
2055 OUTREG16(IMR, 0);
2081 OUTREG16(IMR, 0xffff);
/drivers/net/ethernet/via/
H A Dvia-velocity.h565 * Bits in the IMR register
595 /* 0x0013FB0FUL = initial value of IMR */
944 #define IMR_MASK_VALUE 0x0033FF0FUL /* initial value of IMR
948 #define IMR_MASK_VALUE 0x0013FB0FUL /* initial value of IMR
996 volatile __le32 IMR; member in struct:mac_regs
1161 #define mac_write_int_mask(mask, regs) writel((mask),&((regs)->IMR));
/drivers/spi/
H A Dspi-atmel.c894 imr = spi_readl(as, IMR);
951 imr = spi_readl(as, IMR);
/drivers/char/pcmcia/
H A Dsynclink_cs.c281 #define IMR 0x3a macro
288 // IMR/ISR
340 write_reg16(info, CHA + IMR, info->imra_value);
343 write_reg16(info, CHB + IMR, info->imrb_value);
350 write_reg16(info, CHA + IMR, info->imra_value);
353 write_reg16(info, CHB + IMR, info->imrb_value);
/drivers/gpu/drm/gma500/
H A Dpsb_intel_reg.h797 #define IMR 0x020a8 macro
/drivers/mtd/nand/
H A Datmel_nand.c1602 mask = nfc_readl(host->nfc->hsmc_regs, IMR);
1710 mask = nfc_readl(host->nfc->hsmc_regs, IMR);
/drivers/net/wireless/rtl818x/rtl8180/
H A Ddev.c720 rtl818x_iowrite32(priv, &priv->map->IMR,
738 rtl818x_iowrite32(priv, &priv->map->IMR, 0);
/drivers/net/ethernet/cadence/
H A Dmacb.c1908 regs_buff[7] = macb_readl(bp, IMR);

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