Searched refs:ISR (Results 1 - 25 of 48) sorted by relevance

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/drivers/staging/bcm/
H A DDebug.h87 #define ISR OTHERS macro
88 #define MP_DPC (ISR << 0)
/drivers/rtc/
H A Drtc-at32ap700x.c101 alrm->pending = rtc_readl(rtc, ISR) & RTC_BIT(ISR_TOPI) ? 1 : 0;
168 unsigned long isr = rtc_readl(rtc, ISR);
/drivers/net/irda/
H A Dw83977af_ir.h59 #define ISR 0x02 /* Interrupt status register */ macro
/drivers/usb/serial/
H A Dio_16654.h37 #define ISR 2 // Interrupt Status Register (Read) macro
/drivers/media/common/saa7146/
H A Dsaa7146_core.c300 ack_isr = isr = saa7146_read(dev, ISR);
346 saa7146_write(dev, ISR, ack_isr);
/drivers/net/ethernet/
H A Dfealnx.c174 ISR = 0x34, /* interrupt status */ enumerator in enum:fealnx_offsets
906 iowrite32(FBE | TUNF | CNTOVF | RBU | TI | RI, ioaddr + ISR);
1097 "config %8.8x.\n", dev->name, ioread32(ioaddr + ISR),
1168 iowrite32(FBE | TUNF | CNTOVF | RBU | TI | RI, ioaddr + ISR);
1208 dev->name, ioread32(ioaddr + ISR));
1447 u32 intr_status = ioread32(ioaddr + ISR);
1450 iowrite32(intr_status, ioaddr + ISR);
1600 dev->name, ioread32(ioaddr + ISR));
/drivers/net/ethernet/realtek/
H A Datp.c616 int status = read_nibble(ioaddr, ISR);
621 write_reg(ioaddr, ISR, ISR_RxOK); /* Clear the Rx interrupt. */
634 write_reg_high(ioaddr, ISR, ISRh_RxErr);
647 write_reg(ioaddr, ISR, ISR_TxErr + ISR_TxOK);
H A Datp.h38 ISR = 10, IMR = 11, /* Interrupt status and mask. */ enumerator in enum:page0_regs
52 #define ISRh_RxErr 0x11 /* ISR, high nibble */
/drivers/video/fbdev/
H A Di740_reg.h232 #define ISR 0x3036 macro
/drivers/video/fbdev/i810/
H A Di810_regs.h47 #define ISR 0x020AC macro
/drivers/net/ethernet/cadence/
H A Dmacb.c587 macb_writel(bp, ISR, MACB_BIT(TCOMP));
938 macb_writel(bp, ISR, MACB_BIT(RCOMP));
956 status = macb_readl(bp, ISR);
982 macb_writel(bp, ISR, MACB_BIT(RCOMP));
995 macb_writel(bp, ISR, MACB_TX_ERR_FLAGS);
1016 macb_writel(bp, ISR, MACB_BIT(ISR_ROVR));
1028 macb_writel(bp, ISR, MACB_BIT(HRESP));
1031 status = macb_readl(bp, ISR);
1446 macb_readl(bp, ISR);
H A Dat91_ether.c234 intstatus = macb_readl(lp, ISR);
/drivers/net/wireless/ipw2x00/
H A DKconfig149 debug option enables debug on hot paths (e.g Tx, Rx, ISR) and
/drivers/block/rsxx/
H A Drsxx_priv.h196 ISR = 0x10, /* Interrupt Status Register */ enumerator in enum:rsxx_pci_regmap
H A Dcore.c302 * Disabling the ISR will disable the software handling of the ISR bit.
364 isr = ioread32(card->regmap + ISR);
372 "ISR = 0xFFFFFFFF, retrying later\n");
698 /* Clears the ISR register from spurious interrupts */
699 st = ioread32(card->regmap + ISR);
/drivers/net/ethernet/via/
H A Dvia-velocity.h530 * Bits in the ISR register
995 volatile __le32 ISR; /* 0x24 */ member in struct:mac_regs
1157 #define mac_read_isr(regs) readl(&((regs)->ISR))
1158 #define mac_write_isr(regs, x) writel((x),&((regs)->ISR))
1159 #define mac_clear_isr(regs) writel(0xffffffffL,&((regs)->ISR))
/drivers/atm/
H A Dfirestream.h295 #define ISR 0x64 macro
H A Dfirestream.c1568 status = read_fs (dev, ISR);
1599 /* print the bits in the ISR register. */
1710 isr = read_fs (dev, ISR);
/drivers/staging/rtl8192e/rtl8192e/
H A Dr8192E_hw.h243 ISR = 0x0f8, enumerator in enum:_RTL8192Pci_HW
H A Dr8192E_dev.c2255 tmp = read_nic_dword(dev, ISR);
2256 write_nic_dword(dev, ISR, tmp);
2284 *p_inta = read_nic_dword(dev, ISR);
2285 write_nic_dword(dev, ISR, *p_inta);
/drivers/net/wireless/rtlwifi/rtl8192se/
H A Dhw.c1576 *p_inta = rtl_read_dword(rtlpriv, ISR) & rtlpci->irq_mask[0];
1577 rtl_write_dword(rtlpriv, ISR, *p_inta);
1579 *p_intb = rtl_read_dword(rtlpriv, ISR + 4) & rtlpci->irq_mask[1];
1580 rtl_write_dword(rtlpriv, ISR + 4, *p_intb);
/drivers/gpu/drm/i915/
H A Dintel_overlay.c401 if (I915_READ(ISR) & I915_OVERLAY_PLANE_FLIP_PENDING_INTERRUPT) {
1471 error->isr = I915_READ(ISR);
/drivers/char/pcmcia/
H A Dsynclink_cs.c280 #define ISR 0x3a macro
288 // IMR/ISR
1186 isr = read_reg16(info, CHB + ISR);
1194 isr = read_reg16(info, CHA + ISR);
3269 read_reg16(info, CHA + ISR); /* clear pending IRQs */
3587 read_reg16(info, CHA + ISR); /* clear pending IRQs */
/drivers/net/ethernet/natsemi/
H A Dns83820.c326 #define ISR 0x10 macro
1391 /* this function is called in irq context from the ISR */
1410 isr = readl(dev->base + ISR);
1581 isr = readl(dev->base + ISR);
/drivers/gpu/drm/gma500/
H A Dpsb_intel_reg.h798 #define ISR 0x020ac macro

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