Searched refs:MAX_PHY_REG_ADDRESS (Results 1 - 9 of 9) sorted by relevance

/drivers/net/ethernet/intel/e1000e/
H A Dphy.h113 (((reg) & MAX_PHY_REG_ADDRESS) |\
115 (((reg) & ~MAX_PHY_REG_ADDRESS) << (PHY_UPPER_SHIFT - PHY_PAGE_SHIFT)))
119 ((u16)(((offset) & MAX_PHY_REG_ADDRESS) |\
121 ~MAX_PHY_REG_ADDRESS)))
H A Dphy.c141 if (offset > MAX_PHY_REG_ADDRESS) {
204 if (offset > MAX_PHY_REG_ADDRESS) {
272 ret_val = e1000e_read_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & offset,
297 ret_val = e1000e_write_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & offset,
354 MAX_PHY_REG_ADDRESS & offset,
420 ret_val = e1000e_write_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS &
2393 ret_val = e1000e_write_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & offset,
2451 ret_val = e1000e_read_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & offset,
2495 ret_val = e1000e_read_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & offset,
2538 ret_val = e1000e_write_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS
[all...]
H A D80003es2lan.c370 if ((offset & MAX_PHY_REG_ADDRESS) < GG82563_MIN_ALT_REG) {
404 MAX_PHY_REG_ADDRESS & offset,
410 MAX_PHY_REG_ADDRESS & offset,
439 if ((offset & MAX_PHY_REG_ADDRESS) < GG82563_MIN_ALT_REG) {
473 MAX_PHY_REG_ADDRESS &
479 MAX_PHY_REG_ADDRESS &
H A Dich8lan.h109 ((reg) & MAX_PHY_REG_ADDRESS))
H A Ddefines.h676 #define MAX_PHY_REG_ADDRESS 0x1F /* 5 bit address bus (0-0x1F) */ macro
758 (((page) << GG82563_PAGE_SHIFT) | ((reg) & MAX_PHY_REG_ADDRESS))
/drivers/net/ethernet/intel/igb/
H A De1000_phy.c141 if (offset > MAX_PHY_REG_ADDRESS) {
197 if (offset > MAX_PHY_REG_ADDRESS) {
423 ret_val = igb_read_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & offset,
462 ret_val = igb_write_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & offset,
H A De1000_defines.h847 #define MAX_PHY_REG_ADDRESS 0x1F /* 5 bit address bus (0-0x1F) */ macro
/drivers/net/ethernet/intel/e1000/
H A De1000_hw.c2832 ret_val = e1000_read_phy_reg_ex(hw, MAX_PHY_REG_ADDRESS & reg_addr,
2846 if (reg_addr > MAX_PHY_REG_ADDRESS) {
2970 ret_val = e1000_write_phy_reg_ex(hw, MAX_PHY_REG_ADDRESS & reg_addr,
2984 if (reg_addr > MAX_PHY_REG_ADDRESS) {
H A De1000_hw.h2519 #define MAX_PHY_REG_ADDRESS 0x1F /* 5 bit address bus (0-0x1F) */ macro
2941 (((page) << PHY_PAGE_SHIFT) | ((reg) & MAX_PHY_REG_ADDRESS))

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