Searched refs:MI_SEMAPHORE_SYNC_RVE (Results 1 - 2 of 2) sorted by relevance

/drivers/gpu/drm/i915/
H A Dintel_ringbuffer.c2336 ring->semaphore.mbox.wait[VECS] = MI_SEMAPHORE_SYNC_RVE;
H A Di915_reg.h267 #define MI_SEMAPHORE_SYNC_RVE (2<<16) /* VECS wait for RCS (VERSYNC) */ macro

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