Searched refs:PCH_PP_CONTROL (Results 1 - 6 of 6) sorted by relevance

/drivers/gpu/drm/i915/
H A Dintel_lvds.c220 ctl_reg = PCH_PP_CONTROL;
247 ctl_reg = PCH_PP_CONTROL;
907 I915_WRITE(PCH_PP_CONTROL,
908 I915_READ(PCH_PP_CONTROL) | PANEL_UNLOCK_REGS);
H A Di915_suspend.c207 dev_priv->regfile.savePP_CONTROL = I915_READ(PCH_PP_CONTROL);
274 I915_WRITE(PCH_PP_CONTROL, dev_priv->regfile.savePP_CONTROL);
H A Dintel_dp.c495 return PCH_PP_CONTROL;
4659 pp_ctrl_reg = PCH_PP_CONTROL;
H A Di915_reg.h5402 #define PCH_PP_CONTROL 0xc7204 macro
H A Dintel_display.c1207 pp_reg = PCH_PP_CONTROL;
/drivers/pci/
H A Dquirks.c3322 val = ioread32(mmio_base + PCH_PP_CONTROL) & 0xfffffffe;
3323 iowrite32(val, mmio_base + PCH_PP_CONTROL);

Completed in 255 milliseconds