Searched refs:PIPEACONF_ENABLE (Results 1 - 8 of 8) sorted by relevance

/drivers/gpu/drm/gma500/
H A Dmdfld_intel_display.c265 if ((temp & PIPEACONF_ENABLE) != 0) {
266 temp &= ~PIPEACONF_ENABLE;
279 & PIPEACONF_ENABLE)) || pipe == 1) {
374 if ((temp & PIPEACONF_ENABLE) == 0) {
399 temp &= ~PIPEACONF_ENABLE;
415 temp |= PIPEACONF_ENABLE;
451 if ((temp & PIPEACONF_ENABLE) != 0) {
452 temp &= ~PIPEACONF_ENABLE;
464 | REG_READ(PIPECCONF)) & PIPEACONF_ENABLE))
858 dev_priv->pipeconf[pipe] = PIPEACONF_ENABLE; /* FIXME_JLIU
[all...]
H A Doaktrail_hdmi.c362 pipeconf |= PIPEACONF_ENABLE;
402 if ((temp & PIPEACONF_ENABLE) != 0) {
403 REG_WRITE(PIPEBCONF, temp & ~PIPEACONF_ENABLE);
409 if ((temp & PIPEACONF_ENABLE) != 0) {
410 REG_WRITE(PCH_PIPEBCONF, temp & ~PIPEACONF_ENABLE);
444 if ((temp & PIPEACONF_ENABLE) == 0) {
445 REG_WRITE(PIPEBCONF, temp | PIPEACONF_ENABLE);
451 if ((temp & PIPEACONF_ENABLE) == 0) {
452 REG_WRITE(PCH_PIPEBCONF, temp | PIPEACONF_ENABLE);
H A Doaktrail_crtc.c270 if ((temp & PIPEACONF_ENABLE) == 0) {
272 temp | PIPEACONF_ENABLE, i);
314 if ((temp & PIPEACONF_ENABLE) != 0) {
316 temp & ~PIPEACONF_ENABLE, i);
H A Dpsb_irq.c530 if (!(reg_val & PIPEACONF_ENABLE))
589 if (!(reg_val & PIPEACONF_ENABLE))
656 if (!(reg_val & PIPEACONF_ENABLE)) {
H A Dgma_display.c255 if ((temp & PIPEACONF_ENABLE) == 0)
256 REG_WRITE(map->conf, temp | PIPEACONF_ENABLE);
301 if ((temp & PIPEACONF_ENABLE) != 0) {
302 REG_WRITE(map->conf, temp & ~PIPEACONF_ENABLE);
H A Dpsb_intel_display.c212 pipeconf |= PIPEACONF_ENABLE;
H A Dcdv_intel_display.c734 pipeconf |= PIPEACONF_ENABLE;
H A Dpsb_intel_reg.h492 #define PIPEACONF_ENABLE (1 << 31) macro

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