Searched refs:PLLC_OUT (Results 1 - 4 of 4) sorted by relevance

/drivers/clk/tegra/
H A Dclk-tegra20.c78 #define PLLC_OUT 0x84 macro
645 clk_base + PLLC_OUT, 0, TEGRA_DIVIDER_ROUND_UP,
648 clk_base + PLLC_OUT, 1, 0, CLK_SET_RATE_PARENT,
H A Dclk-tegra114.c107 #define PLLC_OUT 0x84 macro
1090 clk_base + PLLC_OUT, 0, TEGRA_DIVIDER_ROUND_UP,
1093 clk_base + PLLC_OUT, 1, 0,
H A Dclk-tegra124.c35 #define PLLC_OUT 0x84 macro
1161 clk_base + PLLC_OUT, 0, TEGRA_DIVIDER_ROUND_UP,
1164 clk_base + PLLC_OUT, 1, 0,
H A Dclk-tegra30.c94 #define PLLC_OUT 0x84 macro
933 clk_base + PLLC_OUT, 0, TEGRA_DIVIDER_ROUND_UP,
936 clk_base + PLLC_OUT, 1, 0, CLK_SET_RATE_PARENT,

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