Searched refs:RRSR (Results 1 - 8 of 8) sorted by relevance

/drivers/staging/rtl8712/
H A Drtl8712_ratectrl_regdef.h31 #define RRSR (RTL8712_RATECTRL_ + 0x21) macro
/drivers/staging/rtl8192u/
H A Dr8192U_hw.h300 RRSR = 0x310, // Response Rate Set enumerator in enum:_RTL8192Usb_HW
H A Dr8192U_core.c1168 write_nic_dword(dev, RRSR, tmp);
2556 *function: This function actually only set RRSR, RATR and BW_OPMODE registers
2570 // Set RRSR, RATR, and BW_OPMODE registers
2625 write_nic_dword(dev, RRSR, regRRSR);
/drivers/net/wireless/rtlwifi/rtl8192se/
H A Dhw.c114 rtl_write_byte(rtlpriv, RRSR, rate_cfg & 0xff);
115 rtl_write_byte(rtlpriv, RRSR + 1,
159 rtl_write_byte(rtlpriv, RRSR + 2, reg_tmp);
821 /* Set RRSR to all legacy rate and HT rate
826 * Disable RRSR for CCK rate in A-Cut */
829 rtl_write_byte(rtlpriv, RRSR, 0xf0);
831 rtl_write_byte(rtlpriv, RRSR, 0xff);
832 rtl_write_byte(rtlpriv, RRSR + 1, 0x01);
833 rtl_write_byte(rtlpriv, RRSR + 2, 0x00);
838 /*Disable RRSR fo
[all...]
H A Dreg.h173 #define RRSR 0x0181 macro
H A Dphy.c283 rtl_read_byte(rtlpriv, RRSR + 2);
/drivers/staging/rtl8192e/rtl8192e/
H A Dr8192E_hw.h368 RRSR = 0x310, enumerator in enum:_RTL8192Pci_HW
H A Dr8192E_dev.c175 write_nic_dword(dev, RRSR, regTmp);
698 write_nic_dword(dev, RRSR, regRRSR);
803 ulRegRead = (0xFFF00000 & read_nic_dword(dev, RRSR)) |
805 write_nic_dword(dev, RRSR, ulRegRead);

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