Searched refs:SBI_SSCDIVINTPHASE6 (Results 1 - 2 of 2) sorted by relevance

/drivers/gpu/drm/i915/
H A Di915_reg.h6025 #define SBI_SSCDIVINTPHASE6 0x0600 macro
H A Dintel_display.c3553 temp = intel_sbi_read(dev_priv, SBI_SSCDIVINTPHASE6, SBI_ICLK);
3560 intel_sbi_write(dev_priv, SBI_SSCDIVINTPHASE6, temp, SBI_ICLK);

Completed in 113 milliseconds