Searched refs:SDEIIR (Results 1 - 3 of 3) sorted by relevance

/drivers/gpu/drm/i915/
H A Di915_irq.c2391 u32 pch_iir = I915_READ(SDEIIR);
2399 I915_WRITE(SDEIIR, pch_iir);
2434 u32 pch_iir = I915_READ(SDEIIR);
2439 I915_WRITE(SDEIIR, pch_iir);
2467 /* Disable south interrupts. We'll only write to SDEIIR once, so further
2470 * it, we'll get an interrupt if SDEIIR still has something to process
2612 u32 pch_iir = I915_READ(SDEIIR);
2614 I915_WRITE(SDEIIR, pch_iir);
3546 GEN5_ASSERT_IIR_IS_ZERO(SDEIIR);
H A Di915_debugfs.c816 I915_READ(SDEIIR));
H A Di915_reg.h4936 #define SDEIIR 0xc4008 macro

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