Searched refs:SR_INT (Results 1 - 5 of 5) sorted by relevance

/drivers/macintosh/
H A Dvia-cuda.c66 #define SR_INT 0x04 /* Shift register full/empty */ macro
187 out_8(&via[IER], IER_SET|SR_INT); /* enable interrupt from SR */
272 out_8(&via[IER], SR_INT); /* disable SR interrupt from VIA */
278 out_8(&via[IFR], SR_INT);
287 WAIT_FOR(in_8(&via[IFR]) & SR_INT, "CUDA response to sync (2)");
289 out_8(&via[IFR], SR_INT);
296 WAIT_FOR(in_8(&via[IFR]) & SR_INT, "CUDA response to sync (4)");
298 out_8(&via[IFR], SR_INT);
468 if ((in_8(&via[IFR]) & SR_INT) == 0) {
472 out_8(&via[IFR], SR_INT);
[all...]
H A Dvia-maciisi.c56 #define SR_INT 0x04 /* Shift register full/empty */ macro
150 via[IER] = IER_CLR | SR_INT;
164 while (!(via[IFR] & SR_INT) && poll_timeout-- > 0)
186 via[IER] = IER_SET | SR_INT;
205 via[IER] = IER_SET | SR_INT;
209 via[IFR] = SR_INT;
421 if (via[IFR] & SR_INT) {
451 if (!(via[IFR] & SR_INT)) {
459 /* via[IFR] = SR_INT; */
H A Dvia-macii.c71 #define SR_INT 0x04 /* Shift register full/empty */ macro
373 * generating shift register interrupts (SR_INT) for us. This means there has
394 if (via[IFR] & SR_INT)
395 via[IFR] = SR_INT;
H A Dvia-pmu68k.c75 #define SR_INT 0x04 /* Shift register full/empty */ macro
557 if (via1[IFR] & SR_INT) {
558 via1[IFR] = SR_INT;
583 printk(KERN_DEBUG "PMU: SR_INT but ack still high! (%x)\n", via2[B]);
H A Dvia-pmu.c111 #define SR_INT 0x04 /* Shift register full/empty */ macro
435 out_8(&via[IER], IER_SET | SR_INT | CB1_INT);
1455 out_8(&via[IFR], SR_INT);
1568 intr = in_8(&via[IFR]) & (SR_INT | CB1_INT);
1583 if (intr & SR_INT) {
1782 out_8(&via[IER], IER_SET | SR_INT | CB1_INT);

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