Searched refs:_CHV_CMN_DW5_CH0 (Results 1 - 4 of 4) sorted by relevance

/drivers/gpu/drm/i915/
H A Dintel_hdmi.c1296 val = vlv_dpio_read(dev_priv, pipe, _CHV_CMN_DW5_CH0);
1302 vlv_dpio_write(dev_priv, pipe, _CHV_CMN_DW5_CH0, val);
H A Dintel_dp.c2746 val = vlv_dpio_read(dev_priv, pipe, _CHV_CMN_DW5_CH0);
2752 vlv_dpio_write(dev_priv, pipe, _CHV_CMN_DW5_CH0, val);
H A Di915_reg.h940 #define _CHV_CMN_DW5_CH0 0x8114 macro
H A Dintel_display.c1760 val = vlv_dpio_read(dev_priv, pipe, _CHV_CMN_DW5_CH0);
1762 vlv_dpio_write(dev_priv, pipe, _CHV_CMN_DW5_CH0, val);

Completed in 194 milliseconds