/drivers/net/ethernet/xilinx/ |
H A D | ll_temac_mdio.c | 63 int clk_div; local 68 clk_div = 0x3f; /* worst-case default setting */ 71 clk_div = (*bus_hz) / (2500 * 1000 * 2) - 1; 72 if (clk_div < 1) 73 clk_div = 1; 74 if (clk_div > 0x3f) 75 clk_div = 0x3f; 81 temac_indirect_out32(lp, XTE_MC_OFFSET, 1 << 6 | clk_div);
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H A D | xilinx_axienet_mdio.c | 131 u32 clk_div, host_clock; local 137 /* clk_div can be calculated by deriving it from the equation: 138 * fMDIO = fHOST / ((1 + clk_div) * 2) 141 * fHOST / ((1 + clk_div) * 2) <= 2500000 144 * 1 / ((1 + clk_div) * 2) <= (2500000 / fHOST) 147 * 1 / (1 + clk_div) <= ((2500000 * 2) / fHOST) 150 * 1 / (1 + clk_div) <= (5000000 / fHOST) 153 * (1 + clk_div) >= (fHOST / 5000000) 156 * clk_div >= (fHOST / 5000000) - 1 168 clk_div [all...] |
/drivers/clk/mxs/ |
H A D | clk-div.c | 19 * struct clk_div - mxs integer divider clock 28 struct clk_div { struct 35 static inline struct clk_div *to_clk_div(struct clk_hw *hw) 39 return container_of(divider, struct clk_div, divider); 45 struct clk_div *div = to_clk_div(hw); 53 struct clk_div *div = to_clk_div(hw); 61 struct clk_div *div = to_clk_div(hw); 80 struct clk_div *div;
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/drivers/media/dvb-frontends/ |
H A D | stv6110.h | 46 u8 clk_div; /* divisor value for the output clock */ member in struct:stv6110_config
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H A D | stv6110x.h | 29 u8 clk_div; /* divisor value for the output clock */ member in struct:stv6110x_config
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H A D | stv6110.c | 43 u8 clk_div; member in struct:stv6110_priv 229 priv->regs[RSTV6110_CTRL2] |= (priv->clk_div << 6); 422 reg0[2] |= (config->clk_div << 6); 442 priv->clk_div = config->clk_div;
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/drivers/staging/media/davinci_vpfe/ |
H A D | dm365_ipipeif_user.h | 55 struct ipipeif_5_1_clkdiv clk_div; member in struct:ipipeif_5_1
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H A D | dm365_ipipeif.c | 318 val |= (params.if_5_1.clk_div.m - 1) << 320 val |= (params.if_5_1.clk_div.n - 1); 414 ipipeif->config.if_5_1.clk_div.m = config->if_5_1.clk_div.m; 415 ipipeif->config.if_5_1.clk_div.n = config->if_5_1.clk_div.n; 450 config->if_5_1.clk_div.m = ipipeif->config.if_5_1.clk_div.m; 451 config->if_5_1.clk_div.n = ipipeif->config.if_5_1.clk_div [all...] |
/drivers/mmc/host/ |
H A D | s3cmci.h | 32 unsigned long clk_div; member in struct:s3cmci_host
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H A D | bfin_sdh.c | 74 unsigned int clk_div; member in struct:sdh_host 145 cycle_ns = 1000000000 / (host->sclk / (2 * (host->clk_div + 1))); 429 unsigned char clk_div; local 430 clk_div = (get_sclk() / ios->clock - 1) / 2; 431 clk_div = min_t(unsigned char, clk_div, 0xFF); 432 clk_ctl |= clk_div; 434 host->clk_div = clk_div; 450 dev_dbg(mmc_dev(host->mmc), "SDH: clk_div [all...] |
H A D | tifm_sd.c | 99 unsigned int clk_div; member in struct:tifm_sd 603 ((1000000000UL / host->clk_freq) * host->clk_div); 835 host->clk_div = clk_div1; 841 host->clk_div = clk_div2; 847 host->clk_div = 0; 849 host->clk_div &= TIFM_MMCSD_CLKMASK; 850 writel(host->clk_div 892 host->clk_div = 61; 895 writel(host->clk_div | TIFM_MMCSD_POWER, 914 writel(host->clk_div | TIFM_MMCSD_POWE [all...] |
/drivers/tty/serial/ |
H A D | mrst_max3110.c | 577 int clk_div = -1; local 600 clk_div = WC_BAUD_DR384; 603 clk_div = WC_BAUD_DR192; 606 clk_div = WC_BAUD_DR96; 609 clk_div = WC_BAUD_DR48; 612 clk_div = WC_BAUD_DR24; 615 clk_div = WC_BAUD_DR12; 618 clk_div = WC_BAUD_DR6; 621 clk_div = WC_BAUD_DR3; 624 clk_div [all...] |
/drivers/i2c/busses/ |
H A D | i2c-sun6i-p2wi.c | 193 int clk_div; local 291 clk_div = parent_clk_freq / clk_freq; 292 if (!clk_div) { 296 clk_div = 1; 297 } else if (clk_div > P2WI_CCR_MAX_CLK_DIV) { 301 clk_div = P2WI_CCR_MAX_CLK_DIV; 304 writel(P2WI_CCR_SDA_OUT_DELAY(1) | P2WI_CCR_CLK_DIV(clk_div),
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H A D | i2c-sirf.c | 82 u32 clk_div; member in struct:sirfsoc_i2c 416 siic->clk_div = readl(siic->base + SIRFSOC_I2C_CLK_CTRL); 433 writel(siic->clk_div, siic->base + SIRFSOC_I2C_CLK_CTRL);
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H A D | i2c-imx.c | 166 struct imx_i2c_clk_pair *clk_div; member in struct:imx_i2c_hwdata 189 .clk_div = imx_i2c_clk_div, 199 .clk_div = imx_i2c_clk_div, 209 .clk_div = vf610_i2c_clk_div, 315 struct imx_i2c_clk_pair *i2c_clk_div = i2c_imx->hwdata->clk_div;
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/drivers/mfd/ |
H A D | ti_am335x_tscadc.c | 238 tscadc->clk_div = clock_rate / ADC_CLK; 241 tscadc->clk_div--; 242 tscadc_writel(tscadc, REG_CLKDIV, tscadc->clk_div); 348 tscadc_writel(tscadc_dev, REG_CLKDIV, tscadc_dev->clk_div);
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/drivers/spi/ |
H A D | spi-dw.c | 51 u16 clk_div; /* baud rate divider */ member in struct:chip_data 369 u16 clk_div = 0; local 419 if ((transfer->speed_hz != speed) || (!chip->clk_div)) { 422 /* clk_div doesn't support odd number */ 423 clk_div = dws->max_freq / speed; 424 clk_div = (clk_div + 1) & 0xfffe; 427 chip->clk_div = clk_div; 477 * 2. clk_div i [all...] |
H A D | spi-ti-qspi.c | 136 int clk_div = 0, ret; local 151 clk_div = DIV_ROUND_UP(clk_rate, qspi->spi_max_frequency) - 1; 153 if (clk_div < 0) { 158 if (clk_div > QSPI_CLK_DIV_MAX) { 165 qspi->spi_max_frequency, clk_div); 181 clk_mask = QSPI_CLK_EN | clk_div;
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/drivers/cpufreq/ |
H A D | exynos5440-cpufreq.c | 118 unsigned int tmp, clk_div, ema_div, freq, volt_id; local 134 clk_div = ((freq / CPU_DIV_FREQ_MAX) & P0_7_CPUCLKDEV_MASK) 136 clk_div |= ((freq / CPU_ATB_FREQ_MAX) & P0_7_ATBCLKDEV_MASK) 138 clk_div |= ((freq / CPU_DBG_FREQ_MAX) & P0_7_CSCLKDEV_MASK) 155 tmp = (clk_div | ema_div | (volt_id << P0_7_VDD_SHIFT)
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/drivers/video/fbdev/omap/ |
H A D | sossi.c | 71 int clk_div; member in struct:__anon7174 135 int div = t->clk_div; 186 int div = t->clk_div; 269 _set_timing(sossi.clk_div, 328 int div = t->clk_div; 359 sossi.clk_div = t->tim[4];
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H A D | omapfb.h | 116 int clk_div; member in struct:extif_timings
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/drivers/media/pci/solo6x10/ |
H A D | solo6x10-g723.c | 66 int clk_div; local 68 clk_div = (solo_dev->clock_mhz * 1000000) 73 | SOLO_AUDIO_CLK_DIV(clk_div));
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/drivers/media/i2c/soc_camera/ |
H A D | rj54n1cb0c.c | 155 struct rj54n1_clock_div clk_div; member in struct:rj54n1 415 static const struct rj54n1_clock_div clk_div = { variable in typeref:struct:rj54n1_clock_div 826 rj54n1->clk_div.ratio_tg); 829 rj54n1->clk_div.ratio_t); 832 rj54n1->clk_div.ratio_r); 845 rj54n1->clk_div.ratio_op); 848 rj54n1->clk_div.ratio_o); 1349 rj54n1->clk_div = clk_div; 1359 (clk_div [all...] |
/drivers/clk/berlin/ |
H A D | berlin2-div.c | 73 static u8 clk_div[] = { 1, 2, 4, 6, 8, 12, 1, 1 }; variable 213 divider = clk_div[reg];
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/drivers/mtd/devices/ |
H A D | st_spi_fsm.c | 1844 uint32_t clk_div; local 1850 * Calculate clk_div - values between 2 and 128 1853 clk_div = 2 * DIV_ROUND_UP(emi_freq, 2 * spi_freq); 1854 if (clk_div < 2) 1855 clk_div = 2; 1856 else if (clk_div > 128) 1857 clk_div = 128; 1865 if (clk_div <= 4) 1867 else if (clk_div <= 10) 1870 fsm->fifo_dir_delay = DIV_ROUND_UP(clk_div, 1 [all...] |