1/*
2 * Driver for RJ54N1CB0C CMOS Image Sensor from Sharp
3 *
4 * Copyright (C) 2009, Guennadi Liakhovetski <g.liakhovetski@gmx.de>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#include <linux/delay.h>
12#include <linux/i2c.h>
13#include <linux/slab.h>
14#include <linux/v4l2-mediabus.h>
15#include <linux/videodev2.h>
16#include <linux/module.h>
17
18#include <media/rj54n1cb0c.h>
19#include <media/soc_camera.h>
20#include <media/v4l2-clk.h>
21#include <media/v4l2-subdev.h>
22#include <media/v4l2-ctrls.h>
23
24#define RJ54N1_DEV_CODE			0x0400
25#define RJ54N1_DEV_CODE2		0x0401
26#define RJ54N1_OUT_SEL			0x0403
27#define RJ54N1_XY_OUTPUT_SIZE_S_H	0x0404
28#define RJ54N1_X_OUTPUT_SIZE_S_L	0x0405
29#define RJ54N1_Y_OUTPUT_SIZE_S_L	0x0406
30#define RJ54N1_XY_OUTPUT_SIZE_P_H	0x0407
31#define RJ54N1_X_OUTPUT_SIZE_P_L	0x0408
32#define RJ54N1_Y_OUTPUT_SIZE_P_L	0x0409
33#define RJ54N1_LINE_LENGTH_PCK_S_H	0x040a
34#define RJ54N1_LINE_LENGTH_PCK_S_L	0x040b
35#define RJ54N1_LINE_LENGTH_PCK_P_H	0x040c
36#define RJ54N1_LINE_LENGTH_PCK_P_L	0x040d
37#define RJ54N1_RESIZE_N			0x040e
38#define RJ54N1_RESIZE_N_STEP		0x040f
39#define RJ54N1_RESIZE_STEP		0x0410
40#define RJ54N1_RESIZE_HOLD_H		0x0411
41#define RJ54N1_RESIZE_HOLD_L		0x0412
42#define RJ54N1_H_OBEN_OFS		0x0413
43#define RJ54N1_V_OBEN_OFS		0x0414
44#define RJ54N1_RESIZE_CONTROL		0x0415
45#define RJ54N1_STILL_CONTROL		0x0417
46#define RJ54N1_INC_USE_SEL_H		0x0425
47#define RJ54N1_INC_USE_SEL_L		0x0426
48#define RJ54N1_MIRROR_STILL_MODE	0x0427
49#define RJ54N1_INIT_START		0x0428
50#define RJ54N1_SCALE_1_2_LEV		0x0429
51#define RJ54N1_SCALE_4_LEV		0x042a
52#define RJ54N1_Y_GAIN			0x04d8
53#define RJ54N1_APT_GAIN_UP		0x04fa
54#define RJ54N1_RA_SEL_UL		0x0530
55#define RJ54N1_BYTE_SWAP		0x0531
56#define RJ54N1_OUT_SIGPO		0x053b
57#define RJ54N1_WB_SEL_WEIGHT_I		0x054e
58#define RJ54N1_BIT8_WB			0x0569
59#define RJ54N1_HCAPS_WB			0x056a
60#define RJ54N1_VCAPS_WB			0x056b
61#define RJ54N1_HCAPE_WB			0x056c
62#define RJ54N1_VCAPE_WB			0x056d
63#define RJ54N1_EXPOSURE_CONTROL		0x058c
64#define RJ54N1_FRAME_LENGTH_S_H		0x0595
65#define RJ54N1_FRAME_LENGTH_S_L		0x0596
66#define RJ54N1_FRAME_LENGTH_P_H		0x0597
67#define RJ54N1_FRAME_LENGTH_P_L		0x0598
68#define RJ54N1_PEAK_H			0x05b7
69#define RJ54N1_PEAK_50			0x05b8
70#define RJ54N1_PEAK_60			0x05b9
71#define RJ54N1_PEAK_DIFF		0x05ba
72#define RJ54N1_IOC			0x05ef
73#define RJ54N1_TG_BYPASS		0x0700
74#define RJ54N1_PLL_L			0x0701
75#define RJ54N1_PLL_N			0x0702
76#define RJ54N1_PLL_EN			0x0704
77#define RJ54N1_RATIO_TG			0x0706
78#define RJ54N1_RATIO_T			0x0707
79#define RJ54N1_RATIO_R			0x0708
80#define RJ54N1_RAMP_TGCLK_EN		0x0709
81#define RJ54N1_OCLK_DSP			0x0710
82#define RJ54N1_RATIO_OP			0x0711
83#define RJ54N1_RATIO_O			0x0712
84#define RJ54N1_OCLK_SEL_EN		0x0713
85#define RJ54N1_CLK_RST			0x0717
86#define RJ54N1_RESET_STANDBY		0x0718
87#define RJ54N1_FWFLG			0x07fe
88
89#define E_EXCLK				(1 << 7)
90#define SOFT_STDBY			(1 << 4)
91#define SEN_RSTX			(1 << 2)
92#define TG_RSTX				(1 << 1)
93#define DSP_RSTX			(1 << 0)
94
95#define RESIZE_HOLD_SEL			(1 << 2)
96#define RESIZE_GO			(1 << 1)
97
98/*
99 * When cropping, the camera automatically centers the cropped region, there
100 * doesn't seem to be a way to specify an explicit location of the rectangle.
101 */
102#define RJ54N1_COLUMN_SKIP		0
103#define RJ54N1_ROW_SKIP			0
104#define RJ54N1_MAX_WIDTH		1600
105#define RJ54N1_MAX_HEIGHT		1200
106
107#define PLL_L				2
108#define PLL_N				0x31
109
110/* I2C addresses: 0x50, 0x51, 0x60, 0x61 */
111
112/* RJ54N1CB0C has only one fixed colorspace per pixelcode */
113struct rj54n1_datafmt {
114	enum v4l2_mbus_pixelcode	code;
115	enum v4l2_colorspace		colorspace;
116};
117
118/* Find a data format by a pixel code in an array */
119static const struct rj54n1_datafmt *rj54n1_find_datafmt(
120	enum v4l2_mbus_pixelcode code, const struct rj54n1_datafmt *fmt,
121	int n)
122{
123	int i;
124	for (i = 0; i < n; i++)
125		if (fmt[i].code == code)
126			return fmt + i;
127
128	return NULL;
129}
130
131static const struct rj54n1_datafmt rj54n1_colour_fmts[] = {
132	{V4L2_MBUS_FMT_YUYV8_2X8, V4L2_COLORSPACE_JPEG},
133	{V4L2_MBUS_FMT_YVYU8_2X8, V4L2_COLORSPACE_JPEG},
134	{V4L2_MBUS_FMT_RGB565_2X8_LE, V4L2_COLORSPACE_SRGB},
135	{V4L2_MBUS_FMT_RGB565_2X8_BE, V4L2_COLORSPACE_SRGB},
136	{V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_LE, V4L2_COLORSPACE_SRGB},
137	{V4L2_MBUS_FMT_SBGGR10_2X8_PADLO_LE, V4L2_COLORSPACE_SRGB},
138	{V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_BE, V4L2_COLORSPACE_SRGB},
139	{V4L2_MBUS_FMT_SBGGR10_2X8_PADLO_BE, V4L2_COLORSPACE_SRGB},
140	{V4L2_MBUS_FMT_SBGGR10_1X10, V4L2_COLORSPACE_SRGB},
141};
142
143struct rj54n1_clock_div {
144	u8 ratio_tg;	/* can be 0 or an odd number */
145	u8 ratio_t;
146	u8 ratio_r;
147	u8 ratio_op;
148	u8 ratio_o;
149};
150
151struct rj54n1 {
152	struct v4l2_subdev subdev;
153	struct v4l2_ctrl_handler hdl;
154	struct v4l2_clk *clk;
155	struct rj54n1_clock_div clk_div;
156	const struct rj54n1_datafmt *fmt;
157	struct v4l2_rect rect;	/* Sensor window */
158	unsigned int tgclk_mhz;
159	bool auto_wb;
160	unsigned short width;	/* Output window */
161	unsigned short height;
162	unsigned short resize;	/* Sensor * 1024 / resize = Output */
163	unsigned short scale;
164	u8 bank;
165};
166
167struct rj54n1_reg_val {
168	u16 reg;
169	u8 val;
170};
171
172static const struct rj54n1_reg_val bank_4[] = {
173	{0x417, 0},
174	{0x42c, 0},
175	{0x42d, 0xf0},
176	{0x42e, 0},
177	{0x42f, 0x50},
178	{0x430, 0xf5},
179	{0x431, 0x16},
180	{0x432, 0x20},
181	{0x433, 0},
182	{0x434, 0xc8},
183	{0x43c, 8},
184	{0x43e, 0x90},
185	{0x445, 0x83},
186	{0x4ba, 0x58},
187	{0x4bb, 4},
188	{0x4bc, 0x20},
189	{0x4db, 4},
190	{0x4fe, 2},
191};
192
193static const struct rj54n1_reg_val bank_5[] = {
194	{0x514, 0},
195	{0x516, 0},
196	{0x518, 0},
197	{0x51a, 0},
198	{0x51d, 0xff},
199	{0x56f, 0x28},
200	{0x575, 0x40},
201	{0x5bc, 0x48},
202	{0x5c1, 6},
203	{0x5e5, 0x11},
204	{0x5e6, 0x43},
205	{0x5e7, 0x33},
206	{0x5e8, 0x21},
207	{0x5e9, 0x30},
208	{0x5ea, 0x0},
209	{0x5eb, 0xa5},
210	{0x5ec, 0xff},
211	{0x5fe, 2},
212};
213
214static const struct rj54n1_reg_val bank_7[] = {
215	{0x70a, 0},
216	{0x714, 0xff},
217	{0x715, 0xff},
218	{0x716, 0x1f},
219	{0x7FE, 2},
220};
221
222static const struct rj54n1_reg_val bank_8[] = {
223	{0x800, 0x00},
224	{0x801, 0x01},
225	{0x802, 0x61},
226	{0x805, 0x00},
227	{0x806, 0x00},
228	{0x807, 0x00},
229	{0x808, 0x00},
230	{0x809, 0x01},
231	{0x80A, 0x61},
232	{0x80B, 0x00},
233	{0x80C, 0x01},
234	{0x80D, 0x00},
235	{0x80E, 0x00},
236	{0x80F, 0x00},
237	{0x810, 0x00},
238	{0x811, 0x01},
239	{0x812, 0x61},
240	{0x813, 0x00},
241	{0x814, 0x11},
242	{0x815, 0x00},
243	{0x816, 0x41},
244	{0x817, 0x00},
245	{0x818, 0x51},
246	{0x819, 0x01},
247	{0x81A, 0x1F},
248	{0x81B, 0x00},
249	{0x81C, 0x01},
250	{0x81D, 0x00},
251	{0x81E, 0x11},
252	{0x81F, 0x00},
253	{0x820, 0x41},
254	{0x821, 0x00},
255	{0x822, 0x51},
256	{0x823, 0x00},
257	{0x824, 0x00},
258	{0x825, 0x00},
259	{0x826, 0x47},
260	{0x827, 0x01},
261	{0x828, 0x4F},
262	{0x829, 0x00},
263	{0x82A, 0x00},
264	{0x82B, 0x00},
265	{0x82C, 0x30},
266	{0x82D, 0x00},
267	{0x82E, 0x40},
268	{0x82F, 0x00},
269	{0x830, 0xB3},
270	{0x831, 0x00},
271	{0x832, 0xE3},
272	{0x833, 0x00},
273	{0x834, 0x00},
274	{0x835, 0x00},
275	{0x836, 0x00},
276	{0x837, 0x00},
277	{0x838, 0x00},
278	{0x839, 0x01},
279	{0x83A, 0x61},
280	{0x83B, 0x00},
281	{0x83C, 0x01},
282	{0x83D, 0x00},
283	{0x83E, 0x00},
284	{0x83F, 0x00},
285	{0x840, 0x00},
286	{0x841, 0x01},
287	{0x842, 0x61},
288	{0x843, 0x00},
289	{0x844, 0x1D},
290	{0x845, 0x00},
291	{0x846, 0x00},
292	{0x847, 0x00},
293	{0x848, 0x00},
294	{0x849, 0x01},
295	{0x84A, 0x1F},
296	{0x84B, 0x00},
297	{0x84C, 0x05},
298	{0x84D, 0x00},
299	{0x84E, 0x19},
300	{0x84F, 0x01},
301	{0x850, 0x21},
302	{0x851, 0x01},
303	{0x852, 0x5D},
304	{0x853, 0x00},
305	{0x854, 0x00},
306	{0x855, 0x00},
307	{0x856, 0x19},
308	{0x857, 0x01},
309	{0x858, 0x21},
310	{0x859, 0x00},
311	{0x85A, 0x00},
312	{0x85B, 0x00},
313	{0x85C, 0x00},
314	{0x85D, 0x00},
315	{0x85E, 0x00},
316	{0x85F, 0x00},
317	{0x860, 0xB3},
318	{0x861, 0x00},
319	{0x862, 0xE3},
320	{0x863, 0x00},
321	{0x864, 0x00},
322	{0x865, 0x00},
323	{0x866, 0x00},
324	{0x867, 0x00},
325	{0x868, 0x00},
326	{0x869, 0xE2},
327	{0x86A, 0x00},
328	{0x86B, 0x01},
329	{0x86C, 0x06},
330	{0x86D, 0x00},
331	{0x86E, 0x00},
332	{0x86F, 0x00},
333	{0x870, 0x60},
334	{0x871, 0x8C},
335	{0x872, 0x10},
336	{0x873, 0x00},
337	{0x874, 0xE0},
338	{0x875, 0x00},
339	{0x876, 0x27},
340	{0x877, 0x01},
341	{0x878, 0x00},
342	{0x879, 0x00},
343	{0x87A, 0x00},
344	{0x87B, 0x03},
345	{0x87C, 0x00},
346	{0x87D, 0x00},
347	{0x87E, 0x00},
348	{0x87F, 0x00},
349	{0x880, 0x00},
350	{0x881, 0x00},
351	{0x882, 0x00},
352	{0x883, 0x00},
353	{0x884, 0x00},
354	{0x885, 0x00},
355	{0x886, 0xF8},
356	{0x887, 0x00},
357	{0x888, 0x03},
358	{0x889, 0x00},
359	{0x88A, 0x64},
360	{0x88B, 0x00},
361	{0x88C, 0x03},
362	{0x88D, 0x00},
363	{0x88E, 0xB1},
364	{0x88F, 0x00},
365	{0x890, 0x03},
366	{0x891, 0x01},
367	{0x892, 0x1D},
368	{0x893, 0x00},
369	{0x894, 0x03},
370	{0x895, 0x01},
371	{0x896, 0x4B},
372	{0x897, 0x00},
373	{0x898, 0xE5},
374	{0x899, 0x00},
375	{0x89A, 0x01},
376	{0x89B, 0x00},
377	{0x89C, 0x01},
378	{0x89D, 0x04},
379	{0x89E, 0xC8},
380	{0x89F, 0x00},
381	{0x8A0, 0x01},
382	{0x8A1, 0x01},
383	{0x8A2, 0x61},
384	{0x8A3, 0x00},
385	{0x8A4, 0x01},
386	{0x8A5, 0x00},
387	{0x8A6, 0x00},
388	{0x8A7, 0x00},
389	{0x8A8, 0x00},
390	{0x8A9, 0x00},
391	{0x8AA, 0x7F},
392	{0x8AB, 0x03},
393	{0x8AC, 0x00},
394	{0x8AD, 0x00},
395	{0x8AE, 0x00},
396	{0x8AF, 0x00},
397	{0x8B0, 0x00},
398	{0x8B1, 0x00},
399	{0x8B6, 0x00},
400	{0x8B7, 0x01},
401	{0x8B8, 0x00},
402	{0x8B9, 0x00},
403	{0x8BA, 0x02},
404	{0x8BB, 0x00},
405	{0x8BC, 0xFF},
406	{0x8BD, 0x00},
407	{0x8FE, 2},
408};
409
410static const struct rj54n1_reg_val bank_10[] = {
411	{0x10bf, 0x69}
412};
413
414/* Clock dividers - these are default register values, divider = register + 1 */
415static const struct rj54n1_clock_div clk_div = {
416	.ratio_tg	= 3 /* default: 5 */,
417	.ratio_t	= 4 /* default: 1 */,
418	.ratio_r	= 4 /* default: 0 */,
419	.ratio_op	= 1 /* default: 5 */,
420	.ratio_o	= 9 /* default: 0 */,
421};
422
423static struct rj54n1 *to_rj54n1(const struct i2c_client *client)
424{
425	return container_of(i2c_get_clientdata(client), struct rj54n1, subdev);
426}
427
428static int reg_read(struct i2c_client *client, const u16 reg)
429{
430	struct rj54n1 *rj54n1 = to_rj54n1(client);
431	int ret;
432
433	/* set bank */
434	if (rj54n1->bank != reg >> 8) {
435		dev_dbg(&client->dev, "[0x%x] = 0x%x\n", 0xff, reg >> 8);
436		ret = i2c_smbus_write_byte_data(client, 0xff, reg >> 8);
437		if (ret < 0)
438			return ret;
439		rj54n1->bank = reg >> 8;
440	}
441	return i2c_smbus_read_byte_data(client, reg & 0xff);
442}
443
444static int reg_write(struct i2c_client *client, const u16 reg,
445		     const u8 data)
446{
447	struct rj54n1 *rj54n1 = to_rj54n1(client);
448	int ret;
449
450	/* set bank */
451	if (rj54n1->bank != reg >> 8) {
452		dev_dbg(&client->dev, "[0x%x] = 0x%x\n", 0xff, reg >> 8);
453		ret = i2c_smbus_write_byte_data(client, 0xff, reg >> 8);
454		if (ret < 0)
455			return ret;
456		rj54n1->bank = reg >> 8;
457	}
458	dev_dbg(&client->dev, "[0x%x] = 0x%x\n", reg & 0xff, data);
459	return i2c_smbus_write_byte_data(client, reg & 0xff, data);
460}
461
462static int reg_set(struct i2c_client *client, const u16 reg,
463		   const u8 data, const u8 mask)
464{
465	int ret;
466
467	ret = reg_read(client, reg);
468	if (ret < 0)
469		return ret;
470	return reg_write(client, reg, (ret & ~mask) | (data & mask));
471}
472
473static int reg_write_multiple(struct i2c_client *client,
474			      const struct rj54n1_reg_val *rv, const int n)
475{
476	int i, ret;
477
478	for (i = 0; i < n; i++) {
479		ret = reg_write(client, rv->reg, rv->val);
480		if (ret < 0)
481			return ret;
482		rv++;
483	}
484
485	return 0;
486}
487
488static int rj54n1_enum_fmt(struct v4l2_subdev *sd, unsigned int index,
489			   enum v4l2_mbus_pixelcode *code)
490{
491	if (index >= ARRAY_SIZE(rj54n1_colour_fmts))
492		return -EINVAL;
493
494	*code = rj54n1_colour_fmts[index].code;
495	return 0;
496}
497
498static int rj54n1_s_stream(struct v4l2_subdev *sd, int enable)
499{
500	struct i2c_client *client = v4l2_get_subdevdata(sd);
501
502	/* Switch between preview and still shot modes */
503	return reg_set(client, RJ54N1_STILL_CONTROL, (!enable) << 7, 0x80);
504}
505
506static int rj54n1_set_rect(struct i2c_client *client,
507			   u16 reg_x, u16 reg_y, u16 reg_xy,
508			   u32 width, u32 height)
509{
510	int ret;
511
512	ret = reg_write(client, reg_xy,
513			((width >> 4) & 0x70) |
514			((height >> 8) & 7));
515
516	if (!ret)
517		ret = reg_write(client, reg_x, width & 0xff);
518	if (!ret)
519		ret = reg_write(client, reg_y, height & 0xff);
520
521	return ret;
522}
523
524/*
525 * Some commands, specifically certain initialisation sequences, require
526 * a commit operation.
527 */
528static int rj54n1_commit(struct i2c_client *client)
529{
530	int ret = reg_write(client, RJ54N1_INIT_START, 1);
531	msleep(10);
532	if (!ret)
533		ret = reg_write(client, RJ54N1_INIT_START, 0);
534	return ret;
535}
536
537static int rj54n1_sensor_scale(struct v4l2_subdev *sd, s32 *in_w, s32 *in_h,
538			       s32 *out_w, s32 *out_h);
539
540static int rj54n1_s_crop(struct v4l2_subdev *sd, const struct v4l2_crop *a)
541{
542	struct i2c_client *client = v4l2_get_subdevdata(sd);
543	struct rj54n1 *rj54n1 = to_rj54n1(client);
544	const struct v4l2_rect *rect = &a->c;
545	int dummy = 0, output_w, output_h,
546		input_w = rect->width, input_h = rect->height;
547	int ret;
548
549	/* arbitrary minimum width and height, edges unimportant */
550	soc_camera_limit_side(&dummy, &input_w,
551		     RJ54N1_COLUMN_SKIP, 8, RJ54N1_MAX_WIDTH);
552
553	soc_camera_limit_side(&dummy, &input_h,
554		     RJ54N1_ROW_SKIP, 8, RJ54N1_MAX_HEIGHT);
555
556	output_w = (input_w * 1024 + rj54n1->resize / 2) / rj54n1->resize;
557	output_h = (input_h * 1024 + rj54n1->resize / 2) / rj54n1->resize;
558
559	dev_dbg(&client->dev, "Scaling for %dx%d : %u = %dx%d\n",
560		input_w, input_h, rj54n1->resize, output_w, output_h);
561
562	ret = rj54n1_sensor_scale(sd, &input_w, &input_h, &output_w, &output_h);
563	if (ret < 0)
564		return ret;
565
566	rj54n1->width		= output_w;
567	rj54n1->height		= output_h;
568	rj54n1->resize		= ret;
569	rj54n1->rect.width	= input_w;
570	rj54n1->rect.height	= input_h;
571
572	return 0;
573}
574
575static int rj54n1_g_crop(struct v4l2_subdev *sd, struct v4l2_crop *a)
576{
577	struct i2c_client *client = v4l2_get_subdevdata(sd);
578	struct rj54n1 *rj54n1 = to_rj54n1(client);
579
580	a->c	= rj54n1->rect;
581	a->type	= V4L2_BUF_TYPE_VIDEO_CAPTURE;
582
583	return 0;
584}
585
586static int rj54n1_cropcap(struct v4l2_subdev *sd, struct v4l2_cropcap *a)
587{
588	a->bounds.left			= RJ54N1_COLUMN_SKIP;
589	a->bounds.top			= RJ54N1_ROW_SKIP;
590	a->bounds.width			= RJ54N1_MAX_WIDTH;
591	a->bounds.height		= RJ54N1_MAX_HEIGHT;
592	a->defrect			= a->bounds;
593	a->type				= V4L2_BUF_TYPE_VIDEO_CAPTURE;
594	a->pixelaspect.numerator	= 1;
595	a->pixelaspect.denominator	= 1;
596
597	return 0;
598}
599
600static int rj54n1_g_fmt(struct v4l2_subdev *sd,
601			struct v4l2_mbus_framefmt *mf)
602{
603	struct i2c_client *client = v4l2_get_subdevdata(sd);
604	struct rj54n1 *rj54n1 = to_rj54n1(client);
605
606	mf->code	= rj54n1->fmt->code;
607	mf->colorspace	= rj54n1->fmt->colorspace;
608	mf->field	= V4L2_FIELD_NONE;
609	mf->width	= rj54n1->width;
610	mf->height	= rj54n1->height;
611
612	return 0;
613}
614
615/*
616 * The actual geometry configuration routine. It scales the input window into
617 * the output one, updates the window sizes and returns an error or the resize
618 * coefficient on success. Note: we only use the "Fixed Scaling" on this camera.
619 */
620static int rj54n1_sensor_scale(struct v4l2_subdev *sd, s32 *in_w, s32 *in_h,
621			       s32 *out_w, s32 *out_h)
622{
623	struct i2c_client *client = v4l2_get_subdevdata(sd);
624	struct rj54n1 *rj54n1 = to_rj54n1(client);
625	unsigned int skip, resize, input_w = *in_w, input_h = *in_h,
626		output_w = *out_w, output_h = *out_h;
627	u16 inc_sel, wb_bit8, wb_left, wb_right, wb_top, wb_bottom;
628	unsigned int peak, peak_50, peak_60;
629	int ret;
630
631	/*
632	 * We have a problem with crops, where the window is larger than 512x384
633	 * and output window is larger than a half of the input one. In this
634	 * case we have to either reduce the input window to equal or below
635	 * 512x384 or the output window to equal or below 1/2 of the input.
636	 */
637	if (output_w > max(512U, input_w / 2)) {
638		if (2 * output_w > RJ54N1_MAX_WIDTH) {
639			input_w = RJ54N1_MAX_WIDTH;
640			output_w = RJ54N1_MAX_WIDTH / 2;
641		} else {
642			input_w = output_w * 2;
643		}
644
645		dev_dbg(&client->dev, "Adjusted output width: in %u, out %u\n",
646			input_w, output_w);
647	}
648
649	if (output_h > max(384U, input_h / 2)) {
650		if (2 * output_h > RJ54N1_MAX_HEIGHT) {
651			input_h = RJ54N1_MAX_HEIGHT;
652			output_h = RJ54N1_MAX_HEIGHT / 2;
653		} else {
654			input_h = output_h * 2;
655		}
656
657		dev_dbg(&client->dev, "Adjusted output height: in %u, out %u\n",
658			input_h, output_h);
659	}
660
661	/* Idea: use the read mode for snapshots, handle separate geometries */
662	ret = rj54n1_set_rect(client, RJ54N1_X_OUTPUT_SIZE_S_L,
663			      RJ54N1_Y_OUTPUT_SIZE_S_L,
664			      RJ54N1_XY_OUTPUT_SIZE_S_H, output_w, output_h);
665	if (!ret)
666		ret = rj54n1_set_rect(client, RJ54N1_X_OUTPUT_SIZE_P_L,
667			      RJ54N1_Y_OUTPUT_SIZE_P_L,
668			      RJ54N1_XY_OUTPUT_SIZE_P_H, output_w, output_h);
669
670	if (ret < 0)
671		return ret;
672
673	if (output_w > input_w && output_h > input_h) {
674		input_w = output_w;
675		input_h = output_h;
676
677		resize = 1024;
678	} else {
679		unsigned int resize_x, resize_y;
680		resize_x = (input_w * 1024 + output_w / 2) / output_w;
681		resize_y = (input_h * 1024 + output_h / 2) / output_h;
682
683		/* We want max(resize_x, resize_y), check if it still fits */
684		if (resize_x > resize_y &&
685		    (output_h * resize_x + 512) / 1024 > RJ54N1_MAX_HEIGHT)
686			resize = (RJ54N1_MAX_HEIGHT * 1024 + output_h / 2) /
687				output_h;
688		else if (resize_y > resize_x &&
689			 (output_w * resize_y + 512) / 1024 > RJ54N1_MAX_WIDTH)
690			resize = (RJ54N1_MAX_WIDTH * 1024 + output_w / 2) /
691				output_w;
692		else
693			resize = max(resize_x, resize_y);
694
695		/* Prohibited value ranges */
696		switch (resize) {
697		case 2040 ... 2047:
698			resize = 2039;
699			break;
700		case 4080 ... 4095:
701			resize = 4079;
702			break;
703		case 8160 ... 8191:
704			resize = 8159;
705			break;
706		case 16320 ... 16384:
707			resize = 16319;
708		}
709	}
710
711	/* Set scaling */
712	ret = reg_write(client, RJ54N1_RESIZE_HOLD_L, resize & 0xff);
713	if (!ret)
714		ret = reg_write(client, RJ54N1_RESIZE_HOLD_H, resize >> 8);
715
716	if (ret < 0)
717		return ret;
718
719	/*
720	 * Configure a skipping bitmask. The sensor will select a skipping value
721	 * among set bits automatically. This is very unclear in the datasheet
722	 * too. I was told, in this register one enables all skipping values,
723	 * that are required for a specific resize, and the camera selects
724	 * automatically, which ones to use. But it is unclear how to identify,
725	 * which cropping values are needed. Secondly, why don't we just set all
726	 * bits and let the camera choose? Would it increase processing time and
727	 * reduce the framerate? Using 0xfffc for INC_USE_SEL doesn't seem to
728	 * improve the image quality or stability for larger frames (see comment
729	 * above), but I didn't check the framerate.
730	 */
731	skip = min(resize / 1024, 15U);
732
733	inc_sel = 1 << skip;
734
735	if (inc_sel <= 2)
736		inc_sel = 0xc;
737	else if (resize & 1023 && skip < 15)
738		inc_sel |= 1 << (skip + 1);
739
740	ret = reg_write(client, RJ54N1_INC_USE_SEL_L, inc_sel & 0xfc);
741	if (!ret)
742		ret = reg_write(client, RJ54N1_INC_USE_SEL_H, inc_sel >> 8);
743
744	if (!rj54n1->auto_wb) {
745		/* Auto white balance window */
746		wb_left	  = output_w / 16;
747		wb_right  = (3 * output_w / 4 - 3) / 4;
748		wb_top	  = output_h / 16;
749		wb_bottom = (3 * output_h / 4 - 3) / 4;
750		wb_bit8	  = ((wb_left >> 2) & 0x40) | ((wb_top >> 4) & 0x10) |
751			((wb_right >> 6) & 4) | ((wb_bottom >> 8) & 1);
752
753		if (!ret)
754			ret = reg_write(client, RJ54N1_BIT8_WB, wb_bit8);
755		if (!ret)
756			ret = reg_write(client, RJ54N1_HCAPS_WB, wb_left);
757		if (!ret)
758			ret = reg_write(client, RJ54N1_VCAPS_WB, wb_top);
759		if (!ret)
760			ret = reg_write(client, RJ54N1_HCAPE_WB, wb_right);
761		if (!ret)
762			ret = reg_write(client, RJ54N1_VCAPE_WB, wb_bottom);
763	}
764
765	/* Antiflicker */
766	peak = 12 * RJ54N1_MAX_WIDTH * (1 << 14) * resize / rj54n1->tgclk_mhz /
767		10000;
768	peak_50 = peak / 6;
769	peak_60 = peak / 5;
770
771	if (!ret)
772		ret = reg_write(client, RJ54N1_PEAK_H,
773				((peak_50 >> 4) & 0xf0) | (peak_60 >> 8));
774	if (!ret)
775		ret = reg_write(client, RJ54N1_PEAK_50, peak_50);
776	if (!ret)
777		ret = reg_write(client, RJ54N1_PEAK_60, peak_60);
778	if (!ret)
779		ret = reg_write(client, RJ54N1_PEAK_DIFF, peak / 150);
780
781	/* Start resizing */
782	if (!ret)
783		ret = reg_write(client, RJ54N1_RESIZE_CONTROL,
784				RESIZE_HOLD_SEL | RESIZE_GO | 1);
785
786	if (ret < 0)
787		return ret;
788
789	/* Constant taken from manufacturer's example */
790	msleep(230);
791
792	ret = reg_write(client, RJ54N1_RESIZE_CONTROL, RESIZE_HOLD_SEL | 1);
793	if (ret < 0)
794		return ret;
795
796	*in_w = (output_w * resize + 512) / 1024;
797	*in_h = (output_h * resize + 512) / 1024;
798	*out_w = output_w;
799	*out_h = output_h;
800
801	dev_dbg(&client->dev, "Scaled for %dx%d : %u = %ux%u, skip %u\n",
802		*in_w, *in_h, resize, output_w, output_h, skip);
803
804	return resize;
805}
806
807static int rj54n1_set_clock(struct i2c_client *client)
808{
809	struct rj54n1 *rj54n1 = to_rj54n1(client);
810	int ret;
811
812	/* Enable external clock */
813	ret = reg_write(client, RJ54N1_RESET_STANDBY, E_EXCLK | SOFT_STDBY);
814	/* Leave stand-by. Note: use this when implementing suspend / resume */
815	if (!ret)
816		ret = reg_write(client, RJ54N1_RESET_STANDBY, E_EXCLK);
817
818	if (!ret)
819		ret = reg_write(client, RJ54N1_PLL_L, PLL_L);
820	if (!ret)
821		ret = reg_write(client, RJ54N1_PLL_N, PLL_N);
822
823	/* TGCLK dividers */
824	if (!ret)
825		ret = reg_write(client, RJ54N1_RATIO_TG,
826				rj54n1->clk_div.ratio_tg);
827	if (!ret)
828		ret = reg_write(client, RJ54N1_RATIO_T,
829				rj54n1->clk_div.ratio_t);
830	if (!ret)
831		ret = reg_write(client, RJ54N1_RATIO_R,
832				rj54n1->clk_div.ratio_r);
833
834	/* Enable TGCLK & RAMP */
835	if (!ret)
836		ret = reg_write(client, RJ54N1_RAMP_TGCLK_EN, 3);
837
838	/* Disable clock output */
839	if (!ret)
840		ret = reg_write(client, RJ54N1_OCLK_DSP, 0);
841
842	/* Set divisors */
843	if (!ret)
844		ret = reg_write(client, RJ54N1_RATIO_OP,
845				rj54n1->clk_div.ratio_op);
846	if (!ret)
847		ret = reg_write(client, RJ54N1_RATIO_O,
848				rj54n1->clk_div.ratio_o);
849
850	/* Enable OCLK */
851	if (!ret)
852		ret = reg_write(client, RJ54N1_OCLK_SEL_EN, 1);
853
854	/* Use PLL for Timing Generator, write 2 to reserved bits */
855	if (!ret)
856		ret = reg_write(client, RJ54N1_TG_BYPASS, 2);
857
858	/* Take sensor out of reset */
859	if (!ret)
860		ret = reg_write(client, RJ54N1_RESET_STANDBY,
861				E_EXCLK | SEN_RSTX);
862	/* Enable PLL */
863	if (!ret)
864		ret = reg_write(client, RJ54N1_PLL_EN, 1);
865
866	/* Wait for PLL to stabilise */
867	msleep(10);
868
869	/* Enable clock to frequency divider */
870	if (!ret)
871		ret = reg_write(client, RJ54N1_CLK_RST, 1);
872
873	if (!ret)
874		ret = reg_read(client, RJ54N1_CLK_RST);
875	if (ret != 1) {
876		dev_err(&client->dev,
877			"Resetting RJ54N1CB0C clock failed: %d!\n", ret);
878		return -EIO;
879	}
880
881	/* Start the PLL */
882	ret = reg_set(client, RJ54N1_OCLK_DSP, 1, 1);
883
884	/* Enable OCLK */
885	if (!ret)
886		ret = reg_write(client, RJ54N1_OCLK_SEL_EN, 1);
887
888	return ret;
889}
890
891static int rj54n1_reg_init(struct i2c_client *client)
892{
893	struct rj54n1 *rj54n1 = to_rj54n1(client);
894	int ret = rj54n1_set_clock(client);
895
896	if (!ret)
897		ret = reg_write_multiple(client, bank_7, ARRAY_SIZE(bank_7));
898	if (!ret)
899		ret = reg_write_multiple(client, bank_10, ARRAY_SIZE(bank_10));
900
901	/* Set binning divisors */
902	if (!ret)
903		ret = reg_write(client, RJ54N1_SCALE_1_2_LEV, 3 | (7 << 4));
904	if (!ret)
905		ret = reg_write(client, RJ54N1_SCALE_4_LEV, 0xf);
906
907	/* Switch to fixed resize mode */
908	if (!ret)
909		ret = reg_write(client, RJ54N1_RESIZE_CONTROL,
910				RESIZE_HOLD_SEL | 1);
911
912	/* Set gain */
913	if (!ret)
914		ret = reg_write(client, RJ54N1_Y_GAIN, 0x84);
915
916	/*
917	 * Mirror the image back: default is upside down and left-to-right...
918	 * Set manual preview / still shot switching
919	 */
920	if (!ret)
921		ret = reg_write(client, RJ54N1_MIRROR_STILL_MODE, 0x27);
922
923	if (!ret)
924		ret = reg_write_multiple(client, bank_4, ARRAY_SIZE(bank_4));
925
926	/* Auto exposure area */
927	if (!ret)
928		ret = reg_write(client, RJ54N1_EXPOSURE_CONTROL, 0x80);
929	/* Check current auto WB config */
930	if (!ret)
931		ret = reg_read(client, RJ54N1_WB_SEL_WEIGHT_I);
932	if (ret >= 0) {
933		rj54n1->auto_wb = ret & 0x80;
934		ret = reg_write_multiple(client, bank_5, ARRAY_SIZE(bank_5));
935	}
936	if (!ret)
937		ret = reg_write_multiple(client, bank_8, ARRAY_SIZE(bank_8));
938
939	if (!ret)
940		ret = reg_write(client, RJ54N1_RESET_STANDBY,
941				E_EXCLK | DSP_RSTX | SEN_RSTX);
942
943	/* Commit init */
944	if (!ret)
945		ret = rj54n1_commit(client);
946
947	/* Take DSP, TG, sensor out of reset */
948	if (!ret)
949		ret = reg_write(client, RJ54N1_RESET_STANDBY,
950				E_EXCLK | DSP_RSTX | TG_RSTX | SEN_RSTX);
951
952	/* Start register update? Same register as 0x?FE in many bank_* sets */
953	if (!ret)
954		ret = reg_write(client, RJ54N1_FWFLG, 2);
955
956	/* Constant taken from manufacturer's example */
957	msleep(700);
958
959	return ret;
960}
961
962static int rj54n1_try_fmt(struct v4l2_subdev *sd,
963			  struct v4l2_mbus_framefmt *mf)
964{
965	struct i2c_client *client = v4l2_get_subdevdata(sd);
966	struct rj54n1 *rj54n1 = to_rj54n1(client);
967	const struct rj54n1_datafmt *fmt;
968	int align = mf->code == V4L2_MBUS_FMT_SBGGR10_1X10 ||
969		mf->code == V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_BE ||
970		mf->code == V4L2_MBUS_FMT_SBGGR10_2X8_PADLO_BE ||
971		mf->code == V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_LE ||
972		mf->code == V4L2_MBUS_FMT_SBGGR10_2X8_PADLO_LE;
973
974	dev_dbg(&client->dev, "%s: code = %d, width = %u, height = %u\n",
975		__func__, mf->code, mf->width, mf->height);
976
977	fmt = rj54n1_find_datafmt(mf->code, rj54n1_colour_fmts,
978				  ARRAY_SIZE(rj54n1_colour_fmts));
979	if (!fmt) {
980		fmt = rj54n1->fmt;
981		mf->code = fmt->code;
982	}
983
984	mf->field	= V4L2_FIELD_NONE;
985	mf->colorspace	= fmt->colorspace;
986
987	v4l_bound_align_image(&mf->width, 112, RJ54N1_MAX_WIDTH, align,
988			      &mf->height, 84, RJ54N1_MAX_HEIGHT, align, 0);
989
990	return 0;
991}
992
993static int rj54n1_s_fmt(struct v4l2_subdev *sd,
994			struct v4l2_mbus_framefmt *mf)
995{
996	struct i2c_client *client = v4l2_get_subdevdata(sd);
997	struct rj54n1 *rj54n1 = to_rj54n1(client);
998	const struct rj54n1_datafmt *fmt;
999	int output_w, output_h, max_w, max_h,
1000		input_w = rj54n1->rect.width, input_h = rj54n1->rect.height;
1001	int ret;
1002
1003	/*
1004	 * The host driver can call us without .try_fmt(), so, we have to take
1005	 * care ourseleves
1006	 */
1007	rj54n1_try_fmt(sd, mf);
1008
1009	/*
1010	 * Verify if the sensor has just been powered on. TODO: replace this
1011	 * with proper PM, when a suitable API is available.
1012	 */
1013	ret = reg_read(client, RJ54N1_RESET_STANDBY);
1014	if (ret < 0)
1015		return ret;
1016
1017	if (!(ret & E_EXCLK)) {
1018		ret = rj54n1_reg_init(client);
1019		if (ret < 0)
1020			return ret;
1021	}
1022
1023	dev_dbg(&client->dev, "%s: code = %d, width = %u, height = %u\n",
1024		__func__, mf->code, mf->width, mf->height);
1025
1026	/* RA_SEL_UL is only relevant for raw modes, ignored otherwise. */
1027	switch (mf->code) {
1028	case V4L2_MBUS_FMT_YUYV8_2X8:
1029		ret = reg_write(client, RJ54N1_OUT_SEL, 0);
1030		if (!ret)
1031			ret = reg_set(client, RJ54N1_BYTE_SWAP, 8, 8);
1032		break;
1033	case V4L2_MBUS_FMT_YVYU8_2X8:
1034		ret = reg_write(client, RJ54N1_OUT_SEL, 0);
1035		if (!ret)
1036			ret = reg_set(client, RJ54N1_BYTE_SWAP, 0, 8);
1037		break;
1038	case V4L2_MBUS_FMT_RGB565_2X8_LE:
1039		ret = reg_write(client, RJ54N1_OUT_SEL, 0x11);
1040		if (!ret)
1041			ret = reg_set(client, RJ54N1_BYTE_SWAP, 8, 8);
1042		break;
1043	case V4L2_MBUS_FMT_RGB565_2X8_BE:
1044		ret = reg_write(client, RJ54N1_OUT_SEL, 0x11);
1045		if (!ret)
1046			ret = reg_set(client, RJ54N1_BYTE_SWAP, 0, 8);
1047		break;
1048	case V4L2_MBUS_FMT_SBGGR10_2X8_PADLO_LE:
1049		ret = reg_write(client, RJ54N1_OUT_SEL, 4);
1050		if (!ret)
1051			ret = reg_set(client, RJ54N1_BYTE_SWAP, 8, 8);
1052		if (!ret)
1053			ret = reg_write(client, RJ54N1_RA_SEL_UL, 0);
1054		break;
1055	case V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_LE:
1056		ret = reg_write(client, RJ54N1_OUT_SEL, 4);
1057		if (!ret)
1058			ret = reg_set(client, RJ54N1_BYTE_SWAP, 8, 8);
1059		if (!ret)
1060			ret = reg_write(client, RJ54N1_RA_SEL_UL, 8);
1061		break;
1062	case V4L2_MBUS_FMT_SBGGR10_2X8_PADLO_BE:
1063		ret = reg_write(client, RJ54N1_OUT_SEL, 4);
1064		if (!ret)
1065			ret = reg_set(client, RJ54N1_BYTE_SWAP, 0, 8);
1066		if (!ret)
1067			ret = reg_write(client, RJ54N1_RA_SEL_UL, 0);
1068		break;
1069	case V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_BE:
1070		ret = reg_write(client, RJ54N1_OUT_SEL, 4);
1071		if (!ret)
1072			ret = reg_set(client, RJ54N1_BYTE_SWAP, 0, 8);
1073		if (!ret)
1074			ret = reg_write(client, RJ54N1_RA_SEL_UL, 8);
1075		break;
1076	case V4L2_MBUS_FMT_SBGGR10_1X10:
1077		ret = reg_write(client, RJ54N1_OUT_SEL, 5);
1078		break;
1079	default:
1080		ret = -EINVAL;
1081	}
1082
1083	/* Special case: a raw mode with 10 bits of data per clock tick */
1084	if (!ret)
1085		ret = reg_set(client, RJ54N1_OCLK_SEL_EN,
1086			      (mf->code == V4L2_MBUS_FMT_SBGGR10_1X10) << 1, 2);
1087
1088	if (ret < 0)
1089		return ret;
1090
1091	/* Supported scales 1:1 >= scale > 1:16 */
1092	max_w = mf->width * (16 * 1024 - 1) / 1024;
1093	if (input_w > max_w)
1094		input_w = max_w;
1095	max_h = mf->height * (16 * 1024 - 1) / 1024;
1096	if (input_h > max_h)
1097		input_h = max_h;
1098
1099	output_w = mf->width;
1100	output_h = mf->height;
1101
1102	ret = rj54n1_sensor_scale(sd, &input_w, &input_h, &output_w, &output_h);
1103	if (ret < 0)
1104		return ret;
1105
1106	fmt = rj54n1_find_datafmt(mf->code, rj54n1_colour_fmts,
1107				  ARRAY_SIZE(rj54n1_colour_fmts));
1108
1109	rj54n1->fmt		= fmt;
1110	rj54n1->resize		= ret;
1111	rj54n1->rect.width	= input_w;
1112	rj54n1->rect.height	= input_h;
1113	rj54n1->width		= output_w;
1114	rj54n1->height		= output_h;
1115
1116	mf->width		= output_w;
1117	mf->height		= output_h;
1118	mf->field		= V4L2_FIELD_NONE;
1119	mf->colorspace		= fmt->colorspace;
1120
1121	return 0;
1122}
1123
1124#ifdef CONFIG_VIDEO_ADV_DEBUG
1125static int rj54n1_g_register(struct v4l2_subdev *sd,
1126			     struct v4l2_dbg_register *reg)
1127{
1128	struct i2c_client *client = v4l2_get_subdevdata(sd);
1129
1130	if (reg->reg < 0x400 || reg->reg > 0x1fff)
1131		/* Registers > 0x0800 are only available from Sharp support */
1132		return -EINVAL;
1133
1134	reg->size = 1;
1135	reg->val = reg_read(client, reg->reg);
1136
1137	if (reg->val > 0xff)
1138		return -EIO;
1139
1140	return 0;
1141}
1142
1143static int rj54n1_s_register(struct v4l2_subdev *sd,
1144			     const struct v4l2_dbg_register *reg)
1145{
1146	struct i2c_client *client = v4l2_get_subdevdata(sd);
1147
1148	if (reg->reg < 0x400 || reg->reg > 0x1fff)
1149		/* Registers >= 0x0800 are only available from Sharp support */
1150		return -EINVAL;
1151
1152	if (reg_write(client, reg->reg, reg->val) < 0)
1153		return -EIO;
1154
1155	return 0;
1156}
1157#endif
1158
1159static int rj54n1_s_power(struct v4l2_subdev *sd, int on)
1160{
1161	struct i2c_client *client = v4l2_get_subdevdata(sd);
1162	struct soc_camera_subdev_desc *ssdd = soc_camera_i2c_to_desc(client);
1163	struct rj54n1 *rj54n1 = to_rj54n1(client);
1164
1165	return soc_camera_set_power(&client->dev, ssdd, rj54n1->clk, on);
1166}
1167
1168static int rj54n1_s_ctrl(struct v4l2_ctrl *ctrl)
1169{
1170	struct rj54n1 *rj54n1 = container_of(ctrl->handler, struct rj54n1, hdl);
1171	struct v4l2_subdev *sd = &rj54n1->subdev;
1172	struct i2c_client *client = v4l2_get_subdevdata(sd);
1173	int data;
1174
1175	switch (ctrl->id) {
1176	case V4L2_CID_VFLIP:
1177		if (ctrl->val)
1178			data = reg_set(client, RJ54N1_MIRROR_STILL_MODE, 0, 1);
1179		else
1180			data = reg_set(client, RJ54N1_MIRROR_STILL_MODE, 1, 1);
1181		if (data < 0)
1182			return -EIO;
1183		return 0;
1184	case V4L2_CID_HFLIP:
1185		if (ctrl->val)
1186			data = reg_set(client, RJ54N1_MIRROR_STILL_MODE, 0, 2);
1187		else
1188			data = reg_set(client, RJ54N1_MIRROR_STILL_MODE, 2, 2);
1189		if (data < 0)
1190			return -EIO;
1191		return 0;
1192	case V4L2_CID_GAIN:
1193		if (reg_write(client, RJ54N1_Y_GAIN, ctrl->val * 2) < 0)
1194			return -EIO;
1195		return 0;
1196	case V4L2_CID_AUTO_WHITE_BALANCE:
1197		/* Auto WB area - whole image */
1198		if (reg_set(client, RJ54N1_WB_SEL_WEIGHT_I, ctrl->val << 7,
1199			    0x80) < 0)
1200			return -EIO;
1201		rj54n1->auto_wb = ctrl->val;
1202		return 0;
1203	}
1204
1205	return -EINVAL;
1206}
1207
1208static const struct v4l2_ctrl_ops rj54n1_ctrl_ops = {
1209	.s_ctrl = rj54n1_s_ctrl,
1210};
1211
1212static struct v4l2_subdev_core_ops rj54n1_subdev_core_ops = {
1213#ifdef CONFIG_VIDEO_ADV_DEBUG
1214	.g_register	= rj54n1_g_register,
1215	.s_register	= rj54n1_s_register,
1216#endif
1217	.s_power	= rj54n1_s_power,
1218};
1219
1220static int rj54n1_g_mbus_config(struct v4l2_subdev *sd,
1221				struct v4l2_mbus_config *cfg)
1222{
1223	struct i2c_client *client = v4l2_get_subdevdata(sd);
1224	struct soc_camera_subdev_desc *ssdd = soc_camera_i2c_to_desc(client);
1225
1226	cfg->flags =
1227		V4L2_MBUS_PCLK_SAMPLE_RISING | V4L2_MBUS_PCLK_SAMPLE_FALLING |
1228		V4L2_MBUS_MASTER | V4L2_MBUS_DATA_ACTIVE_HIGH |
1229		V4L2_MBUS_HSYNC_ACTIVE_HIGH | V4L2_MBUS_VSYNC_ACTIVE_HIGH;
1230	cfg->type = V4L2_MBUS_PARALLEL;
1231	cfg->flags = soc_camera_apply_board_flags(ssdd, cfg);
1232
1233	return 0;
1234}
1235
1236static int rj54n1_s_mbus_config(struct v4l2_subdev *sd,
1237				const struct v4l2_mbus_config *cfg)
1238{
1239	struct i2c_client *client = v4l2_get_subdevdata(sd);
1240	struct soc_camera_subdev_desc *ssdd = soc_camera_i2c_to_desc(client);
1241
1242	/* Figures 2.5-1 to 2.5-3 - default falling pixclk edge */
1243	if (soc_camera_apply_board_flags(ssdd, cfg) &
1244	    V4L2_MBUS_PCLK_SAMPLE_RISING)
1245		return reg_write(client, RJ54N1_OUT_SIGPO, 1 << 4);
1246	else
1247		return reg_write(client, RJ54N1_OUT_SIGPO, 0);
1248}
1249
1250static struct v4l2_subdev_video_ops rj54n1_subdev_video_ops = {
1251	.s_stream	= rj54n1_s_stream,
1252	.s_mbus_fmt	= rj54n1_s_fmt,
1253	.g_mbus_fmt	= rj54n1_g_fmt,
1254	.try_mbus_fmt	= rj54n1_try_fmt,
1255	.enum_mbus_fmt	= rj54n1_enum_fmt,
1256	.g_crop		= rj54n1_g_crop,
1257	.s_crop		= rj54n1_s_crop,
1258	.cropcap	= rj54n1_cropcap,
1259	.g_mbus_config	= rj54n1_g_mbus_config,
1260	.s_mbus_config	= rj54n1_s_mbus_config,
1261};
1262
1263static struct v4l2_subdev_ops rj54n1_subdev_ops = {
1264	.core	= &rj54n1_subdev_core_ops,
1265	.video	= &rj54n1_subdev_video_ops,
1266};
1267
1268/*
1269 * Interface active, can use i2c. If it fails, it can indeed mean, that
1270 * this wasn't our capture interface, so, we wait for the right one
1271 */
1272static int rj54n1_video_probe(struct i2c_client *client,
1273			      struct rj54n1_pdata *priv)
1274{
1275	struct rj54n1 *rj54n1 = to_rj54n1(client);
1276	int data1, data2;
1277	int ret;
1278
1279	ret = rj54n1_s_power(&rj54n1->subdev, 1);
1280	if (ret < 0)
1281		return ret;
1282
1283	/* Read out the chip version register */
1284	data1 = reg_read(client, RJ54N1_DEV_CODE);
1285	data2 = reg_read(client, RJ54N1_DEV_CODE2);
1286
1287	if (data1 != 0x51 || data2 != 0x10) {
1288		ret = -ENODEV;
1289		dev_info(&client->dev, "No RJ54N1CB0C found, read 0x%x:0x%x\n",
1290			 data1, data2);
1291		goto done;
1292	}
1293
1294	/* Configure IOCTL polarity from the platform data: 0 or 1 << 7. */
1295	ret = reg_write(client, RJ54N1_IOC, priv->ioctl_high << 7);
1296	if (ret < 0)
1297		goto done;
1298
1299	dev_info(&client->dev, "Detected a RJ54N1CB0C chip ID 0x%x:0x%x\n",
1300		 data1, data2);
1301
1302	ret = v4l2_ctrl_handler_setup(&rj54n1->hdl);
1303
1304done:
1305	rj54n1_s_power(&rj54n1->subdev, 0);
1306	return ret;
1307}
1308
1309static int rj54n1_probe(struct i2c_client *client,
1310			const struct i2c_device_id *did)
1311{
1312	struct rj54n1 *rj54n1;
1313	struct soc_camera_subdev_desc *ssdd = soc_camera_i2c_to_desc(client);
1314	struct i2c_adapter *adapter = to_i2c_adapter(client->dev.parent);
1315	struct rj54n1_pdata *rj54n1_priv;
1316	int ret;
1317
1318	if (!ssdd || !ssdd->drv_priv) {
1319		dev_err(&client->dev, "RJ54N1CB0C: missing platform data!\n");
1320		return -EINVAL;
1321	}
1322
1323	rj54n1_priv = ssdd->drv_priv;
1324
1325	if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) {
1326		dev_warn(&adapter->dev,
1327			 "I2C-Adapter doesn't support I2C_FUNC_SMBUS_BYTE\n");
1328		return -EIO;
1329	}
1330
1331	rj54n1 = devm_kzalloc(&client->dev, sizeof(struct rj54n1), GFP_KERNEL);
1332	if (!rj54n1)
1333		return -ENOMEM;
1334
1335	v4l2_i2c_subdev_init(&rj54n1->subdev, client, &rj54n1_subdev_ops);
1336	v4l2_ctrl_handler_init(&rj54n1->hdl, 4);
1337	v4l2_ctrl_new_std(&rj54n1->hdl, &rj54n1_ctrl_ops,
1338			V4L2_CID_VFLIP, 0, 1, 1, 0);
1339	v4l2_ctrl_new_std(&rj54n1->hdl, &rj54n1_ctrl_ops,
1340			V4L2_CID_HFLIP, 0, 1, 1, 0);
1341	v4l2_ctrl_new_std(&rj54n1->hdl, &rj54n1_ctrl_ops,
1342			V4L2_CID_GAIN, 0, 127, 1, 66);
1343	v4l2_ctrl_new_std(&rj54n1->hdl, &rj54n1_ctrl_ops,
1344			V4L2_CID_AUTO_WHITE_BALANCE, 0, 1, 1, 1);
1345	rj54n1->subdev.ctrl_handler = &rj54n1->hdl;
1346	if (rj54n1->hdl.error)
1347		return rj54n1->hdl.error;
1348
1349	rj54n1->clk_div		= clk_div;
1350	rj54n1->rect.left	= RJ54N1_COLUMN_SKIP;
1351	rj54n1->rect.top	= RJ54N1_ROW_SKIP;
1352	rj54n1->rect.width	= RJ54N1_MAX_WIDTH;
1353	rj54n1->rect.height	= RJ54N1_MAX_HEIGHT;
1354	rj54n1->width		= RJ54N1_MAX_WIDTH;
1355	rj54n1->height		= RJ54N1_MAX_HEIGHT;
1356	rj54n1->fmt		= &rj54n1_colour_fmts[0];
1357	rj54n1->resize		= 1024;
1358	rj54n1->tgclk_mhz	= (rj54n1_priv->mclk_freq / PLL_L * PLL_N) /
1359		(clk_div.ratio_tg + 1) / (clk_div.ratio_t + 1);
1360
1361	rj54n1->clk = v4l2_clk_get(&client->dev, "mclk");
1362	if (IS_ERR(rj54n1->clk)) {
1363		ret = PTR_ERR(rj54n1->clk);
1364		goto eclkget;
1365	}
1366
1367	ret = rj54n1_video_probe(client, rj54n1_priv);
1368	if (ret < 0) {
1369		v4l2_clk_put(rj54n1->clk);
1370eclkget:
1371		v4l2_ctrl_handler_free(&rj54n1->hdl);
1372	}
1373
1374	return ret;
1375}
1376
1377static int rj54n1_remove(struct i2c_client *client)
1378{
1379	struct rj54n1 *rj54n1 = to_rj54n1(client);
1380	struct soc_camera_subdev_desc *ssdd = soc_camera_i2c_to_desc(client);
1381
1382	v4l2_clk_put(rj54n1->clk);
1383	v4l2_device_unregister_subdev(&rj54n1->subdev);
1384	if (ssdd->free_bus)
1385		ssdd->free_bus(ssdd);
1386	v4l2_ctrl_handler_free(&rj54n1->hdl);
1387
1388	return 0;
1389}
1390
1391static const struct i2c_device_id rj54n1_id[] = {
1392	{ "rj54n1cb0c", 0 },
1393	{ }
1394};
1395MODULE_DEVICE_TABLE(i2c, rj54n1_id);
1396
1397static struct i2c_driver rj54n1_i2c_driver = {
1398	.driver = {
1399		.name = "rj54n1cb0c",
1400	},
1401	.probe		= rj54n1_probe,
1402	.remove		= rj54n1_remove,
1403	.id_table	= rj54n1_id,
1404};
1405
1406module_i2c_driver(rj54n1_i2c_driver);
1407
1408MODULE_DESCRIPTION("Sharp RJ54N1CB0C Camera driver");
1409MODULE_AUTHOR("Guennadi Liakhovetski <g.liakhovetski@gmx.de>");
1410MODULE_LICENSE("GPL v2");
1411