Searched refs:en (Results 1 - 25 of 72) sorted by relevance

123

/drivers/gpu/drm/nouveau/core/core/
H A Denum.c32 nouveau_enum_find(const struct nouveau_enum *en, u32 value) argument
34 while (en->name) {
35 if (en->value == value)
36 return en;
37 en++;
44 nouveau_enum_print(const struct nouveau_enum *en, u32 value) argument
46 en = nouveau_enum_find(en, value);
47 if (en)
48 pr_cont("%s", en
[all...]
/drivers/gpu/drm/nouveau/core/subdev/fb/
H A Dnv50.c154 const struct nouveau_enum *en, *cl; local
186 en = nouveau_enum_find(vm_engine, st0);
188 if (en && en->data2) {
189 const struct nouveau_enum *orig_en = en;
190 while (en->name && en->value == st0 && en->data2) {
191 engine = nouveau_engine(subdev, en->data2);
197 en
[all...]
/drivers/gpu/drm/nouveau/core/include/core/
H A Denum.h15 nouveau_enum_print(const struct nouveau_enum *en, u32 value);
/drivers/regulator/
H A Dpcap-regulator.c99 const u8 en; member in struct:pcap_regulator
110 .en = _en, \
183 if (vreg->en == NA)
186 return ezx_pcap_set_bits(pcap, vreg->reg, 1 << vreg->en, 1 << vreg->en);
194 if (vreg->en == NA)
197 return ezx_pcap_set_bits(pcap, vreg->reg, 1 << vreg->en, 0);
206 if (vreg->en == NA)
210 return (tmp >> vreg->en) & 1;
/drivers/staging/media/davinci_vpfe/
H A Ddm365_ipipeif_user.h39 unsigned char en; member in struct:ipipeif_dpc
H A Ddavinci_vpfe_user.h136 unsigned char en; member in struct:vpfe_isif_dfc
296 unsigned char en; member in struct:vpfe_isif_black_clamp
341 unsigned char en; member in struct:vpfe_isif_color_space_conv
375 unsigned char en; member in struct:vpfe_isif_linearize
460 unsigned char en; member in struct:vpfe_isif_data_formatter
635 unsigned char en; member in struct:vpfe_ipipe_lutdpc
697 unsigned char en; member in struct:vpfe_ipipe_otfdpc
728 unsigned char en; member in struct:vpfe_ipipe_nf
771 unsigned char en; member in struct:vpfe_ipipe_gic
953 unsigned char en; member in struct:vpfe_ipipe_3d_lut
996 unsigned char en; member in struct:vpfe_ipipe_gbce
1031 unsigned char en; member in struct:vpfe_ipipe_yee
1104 unsigned char en; member in struct:vpfe_ipipe_car
1126 unsigned char en; member in struct:vpfe_ipipe_cgs
[all...]
H A Ddm365_ipipe.h43 unsigned char en; member in struct:ipipe_otfdpc_2_0
55 unsigned char en; member in struct:ipipe_otfdpc_3_0
177 void vpfe_ipipe_enable(struct vpfe_device *vpfe_dev, int en);
H A Ddm365_ipipe_hw.c423 regw_ip(base_addr, dpc->en, DPC_LUT_EN);
425 if (dpc->en != 1)
479 regw_ip(base_addr, (otfdpc->en & 1), DPC_OTF_EN);
480 if (!otfdpc->en)
538 regw_ip(base_addr, noise_filter->en & 1, offset + D2F_EN);
539 if (!noise_filter->en)
579 regw_ip(base_addr, gic->en & 1, GIC_EN);
581 if (!gic->en)
783 regw_ip(base_addr, lut_3d->en, D3LUT_EN);
785 if (!lut_3d->en)
[all...]
H A Ddm365_ipipe.c55 if (lutdpc->en > 1 || lutdpc->repl_white > 1 ||
59 if (lutdpc->en && !lutdpc->table)
83 lutdpc->en = dpc_param->en;
102 lut_param->en = lutdpc->en;
139 if (dpc_param->en > 1)
208 if (nf_param->en > 1 || nf_param->shft_val > D2F_SHFT_VAL_MASK ||
290 if (gic->en > 1 || gic->gain > GIC_GAIN_MASK ||
726 if (!lut->en)
1370 vpfe_ipipe_enable(struct vpfe_device *vpfe_dev, int en) argument
[all...]
H A Ddm365_resizer.h41 unsigned char en; member in struct:f_div_param
/drivers/media/platform/davinci/
H A Dccdc_hw_device.h40 void (*enable) (int en);
44 void (*enable_out_to_sdram) (int en);
H A Dvpss.c106 int (*enable_clock)(enum vpss_clock_sel clock_sel, int en);
235 * @en: enable/disable flag
239 static int dm355_enable_clock(enum vpss_clock_sel clock_sel, int en) argument
271 if (!en)
281 static int dm365_enable_clock(enum vpss_clock_sel clock_sel, int en) argument
355 if (!en) {
367 int vpss_enable_clock(enum vpss_clock_sel clock_sel, int en) argument
372 return oper_cfg.hw_ops.enable_clock(clock_sel, en);
H A Disif.c49 .en = 0,
56 .en = 0,
60 .en = 0,
63 .en = 0,
191 static void isif_enable(int en) argument
193 if (!en) {
202 reg_modify(ISIF_SYNCEN_VDHDEN_MASK, en, SYNCEN);
205 static void isif_enable_output_to_sdram(int en) argument
207 reg_modify(ISIF_SYNCEN_WEN_MASK, en << ISIF_SYNCEN_WEN_SHIFT, SYNCEN);
334 if (bc->en) {
[all...]
/drivers/clk/qcom/
H A Dclk-branch.c103 static int clk_branch_toggle(struct clk_hw *hw, bool en, argument
109 if (en) {
117 return clk_branch_wait(br, en, check_halt);
/drivers/pci/pcie/
H A Dportdrv.h66 static inline void pcie_pme_interrupt_enable(struct pci_dev *dev, bool en) {} argument
/drivers/staging/octeon/
H A Dethernet-sgmii.c94 gmx_cfg.s.en = 1;
124 gmx_cfg.s.en = 0;
H A Dethernet-xaui.c94 gmx_cfg.s.en = 1;
124 gmx_cfg.s.en = 0;
/drivers/rtc/
H A Drtc-pcap.c116 static int pcap_rtc_irq_enable(struct device *dev, int pirq, unsigned int en) argument
121 if (en)
129 static int pcap_rtc_alarm_irq_enable(struct device *dev, unsigned int en) argument
131 return pcap_rtc_irq_enable(dev, PCAP_IRQ_TODA, en);
/drivers/edac/
H A Docteon_edac-lmc.c292 union cvmx_lmcx_int_en en; local
324 en.u64 = cvmx_read_csr(CVMX_LMCX_MEM_CFG0(mc));
325 en.s.intr_ded_ena = 0; /* We poll */
326 en.s.intr_sec_ena = 0;
327 cvmx_write_csr(CVMX_LMCX_MEM_CFG0(mc), en.u64);
/drivers/media/
H A Dmedia-entity.c125 #define link_top(en) ((en)->stack[(en)->top].link)
126 #define stack_top(en) ((en)->stack[(en)->top].entity)
/drivers/media/platform/s5p-tv/
H A Dmixer.h344 void mxr_vsync_set_update(struct mxr_device *mdev, int en);
353 void mxr_reg_graph_layer_stream(struct mxr_device *mdev, int idx, int en);
358 void mxr_reg_vp_layer_stream(struct mxr_device *mdev, int en);
H A Dmixer_grp_layer.c93 static void mxr_graph_stream_set(struct mxr_layer *layer, int en) argument
95 mxr_reg_graph_layer_stream(layer->mdev, layer->idx, en);
H A Dmixer_vp_layer.c120 static void mxr_vp_stream_set(struct mxr_layer *layer, int en) argument
122 mxr_reg_vp_layer_stream(layer->mdev, en);
H A Dmixer_reg.c60 void mxr_vsync_set_update(struct mxr_device *mdev, int en) argument
63 mxr_write_mask(mdev, MXR_STATUS, en ? MXR_STATUS_SYNC_ENABLE : 0,
65 vp_write(mdev, VP_SHADOW_UPDATE, en ? VP_SHADOW_UPDATE_ENABLE : 0);
419 void mxr_reg_graph_layer_stream(struct mxr_device *mdev, int idx, int en) argument
424 void mxr_reg_vp_layer_stream(struct mxr_device *mdev, int en) argument
/drivers/clk/st/
H A Dclkgen-fsyn.c133 struct clkgen_field en[QUADFS_MAX_CHAN]; member in struct:clkgen_quadfs_data
180 .en = { CLKGEN_FIELD(0x10, 0x1, 0),
216 .en = { CLKGEN_FIELD(0x10, 0x1, 0),
252 .en = { CLKGEN_FIELD(0x10, 0x1, 0),
288 .en = { CLKGEN_FIELD(0x10, 0x1, 0),
329 .en = { CLKGEN_FIELD(0x2fc, 0x1, 0),
381 .en = { CLKGEN_FIELD(0x2ac, 0x1, 0),
713 CLKGEN_WRITE(fs, en[fs->chan], 1);
714 CLKGEN_WRITE(fs, en[fs->chan], 0);
726 CLKGEN_WRITE(fs, en[f
[all...]

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