Searched refs:fpc (Results 1 - 5 of 5) sorted by relevance
/drivers/pwm/ |
H A D | pwm-fsl-ftm.c | 100 struct fsl_pwm_chip *fpc = to_fsl_chip(chip); local 102 return clk_prepare_enable(fpc->clk[FSL_PWM_CLK_SYS]); 107 struct fsl_pwm_chip *fpc = to_fsl_chip(chip); local 109 clk_disable_unprepare(fpc->clk[FSL_PWM_CLK_SYS]); 112 static int fsl_pwm_calculate_default_ps(struct fsl_pwm_chip *fpc, argument 118 sys_rate = clk_get_rate(fpc->clk[FSL_PWM_CLK_SYS]); 122 cnt_rate = clk_get_rate(fpc->clk[fpc->cnt_select]); 128 fpc->clk_ps = 1; 133 fpc 147 fsl_pwm_calculate_cycles(struct fsl_pwm_chip *fpc, unsigned long period_ns) argument 166 fsl_pwm_calculate_period_cycles(struct fsl_pwm_chip *fpc, unsigned long period_ns, enum fsl_pwm_clk index) argument 183 fsl_pwm_calculate_period(struct fsl_pwm_chip *fpc, unsigned long period_ns) argument 218 fsl_pwm_calculate_duty(struct fsl_pwm_chip *fpc, unsigned long period_ns, unsigned long duty_ns) argument 235 struct fsl_pwm_chip *fpc = to_fsl_chip(chip); local 283 struct fsl_pwm_chip *fpc = to_fsl_chip(chip); local 298 fsl_counter_clock_enable(struct fsl_pwm_chip *fpc) argument 326 struct fsl_pwm_chip *fpc = to_fsl_chip(chip); local 338 fsl_counter_clock_disable(struct fsl_pwm_chip *fpc) argument 359 struct fsl_pwm_chip *fpc = to_fsl_chip(chip); local 385 fsl_pwm_init(struct fsl_pwm_chip *fpc) argument 412 struct fsl_pwm_chip *fpc; local 476 struct fsl_pwm_chip *fpc = platform_get_drvdata(pdev); local [all...] |
/drivers/gpu/drm/nouveau/dispnv04/ |
H A D | dfp.c | 49 static inline bool is_fpc_off(uint32_t fpc) argument 51 return ((fpc & (FP_TG_CONTROL_ON | FP_TG_CONTROL_OFF)) == 118 uint32_t *fpc; local 122 fpc = &nv04_display(dev)->mode_reg.crtc_reg[nv_crtc->index].fp_control; 124 if (is_fpc_off(*fpc)) { 127 * fpc's most recent change was by below "off" code 129 *fpc = nv_crtc->dpms_saved_fp_control; 133 NVWriteRAMDAC(dev, nv_crtc->index, NV_PRAMDAC_FP_TG_CONTROL, *fpc); 137 fpc = &nv04_display(dev)->mode_reg.crtc_reg[nv_crtc->index].fp_control; 140 if (!is_fpc_off(*fpc) [all...] |
/drivers/media/platform/omap3isp/ |
H A D | ispccdc.h | 116 * @fpc: Faulty pixels correction configuration 146 struct ispccdc_fpc fpc; member in struct:isp_ccdc_device
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H A D | ispccdc.c | 569 isp_reg_writel(isp, ccdc->fpc.dma, OMAP3_ISP_IOMEM_CCDC, 572 isp_reg_writel(isp, (ccdc->fpc.fpnum << ISPCCDC_FPC_FPNUM_SHIFT), 574 isp_reg_writel(isp, (ccdc->fpc.fpnum << ISPCCDC_FPC_FPNUM_SHIFT) | 709 struct omap3isp_ccdc_fpc fpc; local 720 if (copy_from_user(&fpc, ccdc_struct->fpc, sizeof(fpc))) 723 size = fpc.fpnum * 4; 729 fpc_new.fpnum = fpc.fpnum; 737 (__force void __user *)fpc [all...] |
/drivers/media/platform/davinci/ |
H A D | dm644x_ccdc.c | 496 static void ccdc_config_fpc(struct ccdc_fault_pixel *fpc) argument 504 if (!fpc->enable) 508 regw(fpc->fpc_table_addr, CCDC_FPC_ADDR); 510 (fpc->fpc_table_addr)); 512 val = fpc->fp_num & CCDC_FPC_FPC_NUM_MASK;
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