| /drivers/video/fbdev/omap/ |
| H A D | lcd_h3.c | 80 .hsw = 12,
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| H A D | lcd_htcherald.c | 71 .hsw = 10,
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| H A D | lcd_inn1510.c | 65 .hsw = 40,
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| H A D | lcd_inn1610.c | 86 .hsw = 40,
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| H A D | lcd_osk.c | 86 .hsw = 40,
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| H A D | lcd_palmte.c | 63 .hsw = 4,
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| H A D | lcd_palmtt.c | 69 .hsw = 4,
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| H A D | lcd_palmz71.c | 64 .hsw = 4,
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| H A D | lcd_ams_delta.c | 153 .hsw = 3,
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| H A D | omapfb.h | 79 int hsw; /* Horizontal synchronization member in struct:lcd_panel
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| H A D | hwa742.c | 792 int hsw, vsw; local
798 hsw = hwa742_read_reg(HWA742_HS_W_REG);
800 hs_pol_inv = !(hsw & 0x80);
802 hsw = hsw & 0x7f;
858 hs = hsw;
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| /drivers/gpu/drm/tilcdc/ |
| H A D | tilcdc_crtc.c | 238 uint32_t reg, hbp, hfp, hsw, vbp, vfp, vsw; local
277 hsw = mode->hsync_end - mode->hsync_start;
282 DBG("%dx%d, hbp=%u, hfp=%u, hsw=%u, vbp=%u, vfp=%u, vsw=%u",
283 mode->hdisplay, mode->vdisplay, hbp, hfp, hsw, vbp, vfp, vsw);
291 * subtract one from hfp, hbp, hsw because the hardware uses
299 reg |= ((hsw-1) & 0x3c0) << 21;
306 (((hsw-1) & 0x3f) << 10);
444 uint32_t hbp, hfp, hsw, vbp, vfp, vsw; local
466 hsw = mode->hsync_end - mode->hsync_start;
481 if ((hsw
[all...] |
| /drivers/video/fbdev/omap2/dss/ |
| H A D | hdmi_wp.c | 157 timing_h |= FLD_VAL(timings->hsw, 7, 0);
179 timings->hsw = param->timings.hsw;
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| H A D | display.c | 279 ovt->hsw = vm->hsync_len;
312 vm->hsync_len = ovt->hsw;
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| H A D | display-sysfs.c | 136 t.x_res, t.hfp, t.hbp, t.hsw,
162 &t.x_res, &t.hfp, &t.hbp, &t.hsw,
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| H A D | hdmi5_core.c | 301 video_cfg->v_fc_config.timings.hsw = cfg->timings.hsw - 1;
305 cfg->timings.hbp + cfg->timings.hsw - 1;
371 (cfg->v_fc_config.timings.hsw >> 8), 1, 0);
373 cfg->v_fc_config.timings.hsw & 0xFF, 7, 0);
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| H A D | dispc.c | 2012 nonactive = t->x_res + t->hfp + t->hsw + t->hbp - out_width;
2019 blank = div_u64((u64)(t->hbp + t->hsw + t->hfp) * lclk, pclk);
2857 static bool _dispc_lcd_timings_ok(int hsw, int hfp, int hbp, argument
2860 if (hsw < 1 || hsw > dispc.feat->sw_max ||
2893 if (!_dispc_lcd_timings_ok(timings->hsw, timings->hfp,
2902 static void _dispc_mgr_set_lcd_timings(enum omap_channel channel, int hsw, argument
2914 timing_h = FLD_VAL(hsw-1, dispc.feat->sw_start, 0) |
2979 _dispc_mgr_set_lcd_timings(channel, t.hsw, t.hfp, t.hbp, t.vsw,
2983 xtot = t.x_res + t.hfp + t.hsw
[all...] |
| /drivers/video/fbdev/ |
| H A D | carminefb.c | 62 u32 hsw; member in struct:carmine_resolution
105 .hsw = 96,
117 .hsw = 72,
370 u32 hdp, vdp, htp, hsp, hsw, vtr, vsp, vsw; local
380 hsw = par->res->hsw - 1;
391 (hsw << CARMINE_DISP_HSW_SHIFT) |
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| /drivers/gpu/drm/omapdrm/ |
| H A D | omap_connector.c | 52 mode->hsync_end = mode->hsync_start + timings->hsw;
83 timings->hsw = mode->hsync_end - mode->hsync_start;
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| /drivers/gpu/drm/tegra/ |
| H A D | dsi.c | 433 unsigned int hact, hsw, hbp, hfp, i, mul, div; local
496 hsw = (mode->hsync_end - mode->hsync_start) * mul / div;
497 hsw -= 10;
507 tegra_dsi_writel(dsi, hsw << 16 | 0, DSI_PKT_LEN_0_1);
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| /drivers/video/fbdev/omap2/displays-new/ |
| H A D | connector-analog-tv.c | 36 .hsw = 64,
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| H A D | connector-dvi.c | 29 .hsw = 32,
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| H A D | connector-hdmi.c | 27 .hsw = 96,
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| H A D | panel-lgphilips-lb035q02.c | 28 .hsw = 2,
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| H A D | panel-nec-nl8048hl11.c | 75 .hsw = 1,
|