Searched refs:num_levels (Results 1 - 13 of 13) sorted by relevance

/drivers/gpu/drm/radeon/
H A Dr100_track.h41 unsigned num_levels; member in struct:r100_cs_track_texture
H A Dsumo_dpm.c348 u32 highest_engine_clock = ps->levels[ps->num_levels - 1].sclk;
355 for (i = 0; i < ps->num_levels - 1; i++)
409 for (i = 0; i < ps->num_levels; i++) {
410 asi = (i == ps->num_levels - 1) ? pi->pasi : pi->asi;
424 a_t = CG_R(m_a * r[ps->num_levels - 1] / 100) |
425 CG_L(m_a * l[ps->num_levels - 1] / 100);
671 pi->boost_pl = new_ps->levels[new_ps->num_levels - 1];
744 dpm_ctrl4 |= (1 << (new_ps->num_levels - 1));
760 u32 n_current_state_levels = (old_ps == NULL) ? 1 : old_ps->num_levels;
762 for (i = 0; i < new_ps->num_levels;
[all...]
H A Dtrinity_dpm.h48 u32 num_levels; member in struct:trinity_ps
H A Dtrinity_dpm.c844 u32 n_current_state_levels = (old_ps == NULL) ? 1 : old_ps->num_levels;
846 for (i = 0; i < new_ps->num_levels; i++) {
851 for (i = new_ps->num_levels; i < n_current_state_levels; i++)
967 if (new_ps->levels[new_ps->num_levels - 1].sclk >=
968 current_ps->levels[current_ps->num_levels - 1].sclk)
981 if (new_ps->levels[new_ps->num_levels - 1].sclk <
982 current_ps->levels[current_ps->num_levels - 1].sclk)
1192 if (ps->num_levels <= 1)
1199 ret = trinity_dpm_n_levels_disabled(rdev, ps->num_levels - 1);
1203 for (i = 0; i < ps->num_levels;
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H A Dkv_dpm.h83 u32 num_levels; member in struct:kv_ps
H A Dsumo_dpm.h46 u32 num_levels; member in struct:sumo_ps
H A Dkv_dpm.c1711 if (table->entries[i].clk <= new_ps->levels[new_ps->num_levels - 1].sclk)
1718 (table->entries[pi->lowest_valid].clk - new_ps->levels[new_ps->num_levels - 1].sclk))
1737 new_ps->levels[new_ps->num_levels - 1].sclk)
1746 new_ps->levels[new_ps->num_levels -1].sclk))
2172 for (i = 0; i < ps->num_levels; i++) {
2178 for (i = 0; i < ps->num_levels; i++) {
2190 for (i = 0; i < ps->num_levels; i++) {
2201 for (i = 0; i < ps->num_levels; i++) {
2563 ps->num_levels = 1;
2608 ps->num_levels
[all...]
H A Dr200.c419 track->textures[i].num_levels = ((idx_value & R200_MAX_MIP_LEVEL_MASK)
H A Dr100.c1801 track->textures[i].num_levels = ((idx_value & RADEON_MAX_MIP_LEVEL_MASK)
2076 DRM_ERROR("num levels %d\n", t->num_levels);
2165 for (i = 0; i <= track->textures[u].num_levels; i++) {
2417 track->textures[i].num_levels = 12;
H A Dr300.c1042 track->textures[i].num_levels = tmp;
H A Dsi_dpm.c3776 u32 data, num_bits, num_levels; local
3788 num_levels = (1 << num_bits);
3790 if (table->count != num_levels)
3793 if (limits->count != (num_levels - 1))
/drivers/gpu/drm/i915/
H A Di915_debugfs.c3512 int num_levels = ilk_wm_max_level(dev) + 1; local
3517 for (level = 0; level < num_levels; level++) {
3595 int num_levels = ilk_wm_max_level(dev) + 1; local
3609 if (ret != num_levels)
3614 for (level = 0; level < num_levels; level++)
/drivers/net/wireless/brcm80211/brcmsmac/phy/
H A Dphy_lcn.c3667 wlc_lcnphy_a1(struct brcms_phy *pi, int cal_type, int num_levels, argument
3720 if (num_levels == 0) {
3722 num_levels = 4;
3724 num_levels = 9;
3745 for (phy_c8 = 0; phy_c7 != 0 && phy_c8 < num_levels; phy_c8++) {

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