| 6fa455935ab956248b165f150ec6ae9106210077 |
|
13-Oct-2014 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon/dpm: disable ulv support on SI
Causes problems on some boards.
bug:
https://bugs.freedesktop.org/show_bug.cgi?id=82889
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
|
| 01467a9b5e7ec7b9e30768bee16ea5861665015b |
|
14-Oct-2014 |
Michele Curti <michele.curti@gmail.com> |
drm/radeon: reduce sparse false positive warnings
include radeon_asic.h header file in the various xxx_dpm.c files
to reduce sparse false positive warnings. Not so great patch
in itself, but reducing warning count from 391 to 258 may help
to see real problems..
Signed-off-by: Michele Curti <michele.curti@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
| 1db7802418596880b51d78408f10f25e6fbd8656 |
|
13-Oct-2014 |
Alex Deucher <alexander.deucher@amd.com> |
Revert "drm/radeon/dpm: drop clk/voltage dependency filters for SI"
This reverts commit 186b1b2ba2a0684e3d2d3703427a993a3b35b16d.
There are still some stability problems on some SI boards so bring
this back.
|
| 186b1b2ba2a0684e3d2d3703427a993a3b35b16d |
|
23-Sep-2014 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon/dpm: drop clk/voltage dependency filters for SI
Not sure this was ever necessary for SI, was just done
to be on the safe side.
bug:
https://bugs.freedesktop.org/show_bug.cgi?id=69721
Reviewed-by: Alexandre Demers <alexandre.f.demers@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
| 636e2582658742b94e7620becce58f939996c961 |
|
07-Jun-2014 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon/dpm: add support for SVI2 voltage for SI
Some newer boards use SVI2 for voltage control rather
than GPIO.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
| 8a309113d50290aef2e0292d3a453425b488d973 |
|
07-Jun-2014 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon/dpm: powertune updates for SI
Updated powertune settings for certain SI asics.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
| 5b43c3cd07981619dbdb1fb935ef705a3e80955f |
|
18-Feb-2014 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon/si: fix typo in dpm sq ramping setup
inverted logic.
Noticed-by: Sylvain BERTRAND <sylware@legeek.net>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
|
| 82f79cc54b6a67c0b17aff4fb5ed43155ff3f0ea |
|
21-Aug-2013 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon/dpm: move platform caps fetching to a separate function
It's needed by by both the asic specific functions and the
extended table parser.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
| 9f3f63f24c901cad831e78bbb738df61a1c4ff02 |
|
30-Jan-2014 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon/dpm: use the driver state for dpm debugfs
For btc and newer, we may modify the power state depending
on the circumstances. Use the modified state rather than
the base state.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
| ffcda352b569dcf5be5c8a5f57545794acf4adb9 |
|
27-Jan-2014 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon: set si_notify_smc_display_change properly
This is effectively a revert of 4573388c92ee60b4ed72b8d95b73df861189988c.
Forcing a display active when there is none causes problems with
dpm on some SI boards which results in improperly initialized
dpm state and boot failures on some boards. As for the bug commit
4573388c92ee tried to address, one can manually force the state to
high for better performance when using the card as a headless compute
node until a better fix is developed.
bugs:
https://bugs.freedesktop.org/show_bug.cgi?id=73788
https://bugs.freedesktop.org/show_bug.cgi?id=69395
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
cc: stable@vger.kernel.org
|
| 407b6dfd9afa30cf963fa99bca91870e47965612 |
|
17-Jan-2014 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon: fix minor typos in si_dpm.c
Copy/paste typos from the ni code. Should not
have any functional change.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
| 6c7bccea390853bdec5b76fe31fc50f3b36f75d5 |
|
18-Dec-2013 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon/pm: move pm handling into the asic specific code
We need more control over the ordering of dpm init with
respect to the rest of the asic. Specifically, the SMC
has to be initialized before the rlc and cg/pg. The pm
code currently initializes late in the driver, but we need
it to happen much earlier so move pm handling into the asic
specific callbacks.
This makes dpm more reliable and makes clockgating work
properly on CIK parts and should help on SI parts as well.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
| e14cd2bbcb98541e199b7223f38d61527dfe45c9 |
|
19-Dec-2013 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon/dpm: switch on new late_enable callback
Right now it's called right after enable, but after
reworking the dpm init order, it will get called later
to accomodate loading the smc early, but enabling
thermal interrupts and block powergating later after
the ring tests are complete.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
| 963c115dae332b7c1c030a13f472143f8983dffc |
|
19-Dec-2013 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon/dpm: add late_enable for SI
Make sure interrupts are enabled
before we enable thermal interrupts.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
| 68e3a092c152443515c9ea2b0d008b80521efb4d |
|
18-Dec-2013 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon/si: drop cg_update from dpm code
I'm not entirely sure this is required and it won't work
with the dpm restructing anyway.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
| 6960394fe24b1ae93a4a2136862790140b0ad157 |
|
01-Nov-2013 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon/dpm: fix typo in setting smc flag
PPSMC_EXTRAFLAGS_AC2DC_GPIO5_POLARITY_HIGH should be
set in extraFlags, not systemFlags.
Noticed-by: Sylvain BERTRAND <sylware@legeek.net>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
| 4573388c92ee60b4ed72b8d95b73df861189988c |
|
10-Oct-2013 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon/si: tell dpm there is a display connected
On SI asics, the SMC will automatically force the performance
level to the lowest level if there are no displays active. This
prevents automatic performance scaling on PowerXpress systems or
for offscreen rendering or compute when displays are disabled.
Going forward, it would be best to dynamically change this, but
for now leave scaling enabled.
Fixes:
https://bugs.freedesktop.org/show_bug.cgi?id=69395
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
| 5fd9c581862a4874c0bdaf16231d8873832bbb99 |
|
27-Sep-2013 |
Dan Carpenter <dan.carpenter@oracle.com> |
drm/radeon/dpm: off by one in si_set_mc_special_registers()
These checks should be ">=" instead of ">". j is used as an offset into
the table->mc_reg_address[] array and that has
SMC_SISLANDS_MC_REGISTER_ARRAY_SIZE (16) elements.
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
|
| 78fbdf0e9dcd84d54044fa1470880b689e34f9c6 |
|
21-Sep-2013 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon/dpm/si: filter clocks based on voltage/clk dep tables
Filter out mclk and sclk levels higher than listed in the clk
voltage dependency tables. Supporting these clocks will require
additional driver tweaking that isn't supported yet.
See bug:
https://bugs.freedesktop.org/show_bug.cgi?id=68235
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
| 1cd8b21aa22c4fe8835abe614da5fa989c66dca9 |
|
13-Sep-2013 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon/dpm: rework auto performance level enable
Calling force_performance_level() from set_power_state()
doesn't work on some asics because the current power
state pointer has not been properly updated at that point.
Move the calls to force_performance_level() out of the
asic specific set_power_state() functions and into
the main power state sequence.
Fixes dpm resume on SI.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
| 1ff60ddb84bb9ff6fa182710c4e08b66badf918c |
|
30-Aug-2013 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon/dpm: make sure dc performance level limits are valid (BTC-SI) (v2)
Check to make sure the dc limits are valid before using them.
Some systems may not have a dc limits table. In that case just
use the ac limits. This fixes hangs on systems when the power
state is changed when on battery (dc) due to invalid performance
state parameters.
Should fix:
https://bugs.freedesktop.org/show_bug.cgi?id=68708
v2: fix up limits in dpm_init()
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
|
| 53f3b25287d8eed5a274d85fe7192c5812045fa3 |
|
21-Aug-2013 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon: gcc fixes for si dpm
Newer versions of gcc seem to wander off into the
weeds when dealing with variable sizes arrays in
structs. Rather than indexing the arrays, use
pointer arithmetic.
See bugs:
https://bugs.freedesktop.org/show_bug.cgi?id=66932
https://bugs.freedesktop.org/show_bug.cgi?id=66972
https://bugs.freedesktop.org/show_bug.cgi?id=66945
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
| 4cb0add259179ca8634fc0fddb2274534a58ff2d |
|
14-Aug-2013 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon: handle cg in SI dpm code
Clockgating needs to be disabled around certain parts
of dpm setup otherwise the smc gets into a bad state
and dpm doesn't work properly.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
| cc8dbbb4f62aa53e604e7c61dedc03ee4e8dfed4 |
|
14-Aug-2013 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon: add dpm support for CI dGPUs (v2)
This adds dpm support for btc asics. This includes:
- dynamic engine clock scaling
- dynamic memory clock scaling
- dynamic voltage scaling
- dynamic pcie gen switching
Set radeon.dpm=1 to enable.
v2: remove unused radeon_atombios.c changes,
make missing smc ucode non-fatal
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
| 9dd9333b2fac7b0ff00574693f3192926e3466fe |
|
30-Apr-2013 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon: adjust si_dpm function for code sharing
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
| 797f203f622164a322b9a0f962ce431e3f6ca48e |
|
01-Aug-2013 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon/dpm: adjust power state properly for UVD on SI
There are some hardware issue with reclocking on SI when
UVD is active, so use a stable power state when UVD is
active. Fixes possible hangs and performance issues when
using UVD on SI.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
| b841ce7b41ffbecf84285b381b3ac23f05256d31 |
|
01-Aug-2013 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon/dpm: fix spread spectrum setup (v2)
Need to check for engine and memory clock ss separately
and only enable dynamic ss if either of them are found.
This should fix systems which have a ss table, but do
not have entries for engine or memory. On those systems
we may enable dynamic spread spectrum without enabling
it on the engine or memory clocks which can lead to a
hang in some cases.
fixes some systems reported here:
https://bugs.freedesktop.org/show_bug.cgi?id=66963
v2: fix typo
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
| fda837241f3680e5dc554c26e178c2deec7a039c |
|
31-Jul-2013 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon/dpm: adjust thermal protection requirements
On rv770 and newer, clock gating is not required
for thermal protection. The only requirement is that
the design utilizes a thermal sensor.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
| adfb8e51332153016857194b85309150ac560286 |
|
01-Aug-2013 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon: fix 64 bit divide in SI spm code
Forgot to use the appropriate math64 function.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Dave Airlie <airlied@gmail.com>
|
| 5a344dda944b4eea5a95e47a49ae5b53ce4f49b6 |
|
30-Jul-2013 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon/dpm: re-enable cac control on SI
Now that the fixed point functions are fixed we
can re-enable cac support.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
| 31f731af513bb9925d0a29dba34bb4f71141bf91 |
|
30-Jul-2013 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon/dpm: fix calculations in si_calculate_leakage_for_v_and_t_formula
Need to make some slight adjustments for the fixed point math to
work properly.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
| 63f22d0e98cf74adf4ecfb25099607239b00c751 |
|
27-Jul-2013 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon/dpm: fix and enable reclocking on SI
The SMC interface changed compared to Cayman and
previous asics. Set the enabled levels properly
and enable reclocking by default when dpm is enabled.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
| d05f7e700a3a47eeb7dbe236d2680381f5b5edcb |
|
29-Jul-2013 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon/dpm: disable cac setup on SI
Disable cac setup on SI for now since it causes
strange performance level restrictions on certain
cards. I suspect there may be issues with some of
the 64 bit fixed point double emulation that is used
to set up those parameters. I need to double check
the math before this can be re-enabled.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
| 46348dc29bc936360057e9b41003274284ec0a47 |
|
27-Jul-2013 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon/dpm: fix powertune handling for pci id 0x6835
0x6835 should be treated as a cape verde pro.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
| f44a0120ef07cc9a1f36ab86751ec2b0598d7a2b |
|
27-Jul-2013 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon/dpm: fix si_calculate_memory_refresh_rate()
Update alogorithm as per internal advice.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
| 489bc476b4c2b3097fe9e980379bbbab260a6156 |
|
27-Jul-2013 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon/dpm: fix display gap programming on SI
Need to set the DISP*_GAP fields as well as the
DISP*_GAP_MCHG fields. Same as on previous asics.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
| f4dec31861e938267d41a962f145edc7d81c8e92 |
|
08-Jul-2013 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon/dpm: implement vblank_too_short callback for si
Check if we can switch the mclk during the vblank time otherwise
we may get artifacts on the screen when the mclk changes.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
| a160a6a3367611351624fca06838000b02aae2c7 |
|
03-Jul-2013 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon/dpm: implement force performance level for SI
Allows you to force the selected performance level via sysfs.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
| bf0936e196ec21b604106578043d4c14831f99e7 |
|
02-Jul-2013 |
Mike Lothian <mike@fireburn.co.uk> |
drm/radeon/dpm: fix compilation with certain versions of gcc
Add #include <linux/seq_file.h> to *_dpm.c files
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
| 7982128c3d447df27db963af67bc6b8dc7efb1de |
|
29-Jun-2013 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon/dpm: add debugfs support for SI
This allows you to look at the current DPM state via
debugfs.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
| a144acbcfbfea44a80afc8f880a7ad72bf01c819 |
|
28-Jun-2013 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon/SI: fix TDP adjustment in set_power_state
Fixes hangs with DPM in some cases.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
| e34568b89233004f1679cc801859a00b48c6163d |
|
15-May-2013 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon/dpm: fix UVD clock setting on SI
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
| cc833b6088e3371d3b77c5a9452835452835e10f |
|
28-Jun-2013 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon/dpm: add dpm_set_power_state failure output (si)
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
| 2c48febb47c60df91775366eb8c65556a1cdb3c8 |
|
28-Mar-2013 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon/dpm: add dpm_enable failure output (si)
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
| a9e61410921bcc1aa8f594ffa6301d5baba90f3b |
|
25-Jun-2013 |
Alex Deucher <alexander.deucher@amd.com> |
drm/radeon/kms: add dpm support for SI (v7)
This adds dpm support for SI asics. This includes:
- dynamic engine clock scaling
- dynamic memory clock scaling
- dynamic voltage scaling
- dynamic pcie gen1/gen2/gen3 switching
- power containment
- shader power scaling
Set radeon.dpm=1 to enable.
v2: enable hainan support, rebase
v3: guard acpi stuff
v4: fix 64 bit math
v5: fix 64 bit div harder
v6: fix thermal interrupt check noticed by Jerome
v7: attempt fix state enable
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|