Searched refs:phyaddr (Results 1 - 23 of 23) sorted by relevance

/drivers/net/ethernet/samsung/sxgbe/
H A Dsxgbe_mdio.c55 static void sxgbe_mdio_c45(struct sxgbe_priv_data *sp, u32 cmd, int phyaddr, argument
62 reg |= (phyaddr << 16) | (phyreg & 0xffff);
68 static void sxgbe_mdio_c22(struct sxgbe_priv_data *sp, u32 cmd, int phyaddr, argument
73 writel(1 << phyaddr, sp->ioaddr + SXGBE_MDIO_CLAUSE22_PORT_REG);
76 reg = (phyaddr << 16) | (phyreg & 0x1f);
82 static int sxgbe_mdio_access(struct sxgbe_priv_data *sp, u32 cmd, int phyaddr, argument
93 sxgbe_mdio_c45(sp, cmd, phyaddr, phyreg, phydata);
96 if (phyaddr >= 4)
99 sxgbe_mdio_c22(sp, cmd, phyaddr, phyreg, phydata);
108 * @phyaddr
112 sxgbe_mdio_read(struct mii_bus *bus, int phyaddr, int phyreg) argument
133 sxgbe_mdio_write(struct mii_bus *bus, int phyaddr, int phyreg, u16 phydata) argument
[all...]
/drivers/net/ethernet/smsc/
H A Dsmc911x.c635 static int smc911x_phy_read(struct net_device *dev, int phyaddr, int phyreg) argument
640 SMC_GET_MII(lp, phyreg, phyaddr, phydata);
642 DBG(SMC_DEBUG_MISC, dev, "%s: phyaddr=0x%x, phyreg=0x%02x, phydata=0x%04x\n",
643 __func__, phyaddr, phyreg, phydata);
651 static void smc911x_phy_write(struct net_device *dev, int phyaddr, int phyreg, argument
656 DBG(SMC_DEBUG_MISC, dev, "%s: phyaddr=0x%x, phyreg=0x%x, phydata=0x%x\n",
657 __func__, phyaddr, phyreg, phydata);
659 SMC_SET_MII(lp, phyreg, phyaddr, phydata);
669 int phyaddr; local
704 for (phyaddr
744 int phyaddr = lp->mii.phy_id; local
850 int phyaddr = lp->mii.phy_id; local
887 int phyaddr = lp->mii.phy_id; local
983 int phyaddr = lp->mii.phy_id; local
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H A Dsmc91x.c813 static int smc_phy_read(struct net_device *dev, int phyaddr, int phyreg) argument
824 /* Start code (01) + read (10) + phyaddr + phyreg */
825 smc_mii_out(dev, 6 << 10 | phyaddr << 5 | phyreg, 14);
833 DBG(3, dev, "%s: phyaddr=0x%x, phyreg=0x%x, phydata=0x%x\n",
834 __func__, phyaddr, phyreg, phydata);
843 static void smc_phy_write(struct net_device *dev, int phyaddr, int phyreg, argument
854 /* Start code (01) + write (01) + phyaddr + phyreg + turnaround + phydata */
855 smc_mii_out(dev, 5 << 28 | phyaddr << 23 | phyreg << 18 | 2 << 16 | phydata, 32);
860 DBG(3, dev, "%s: phyaddr=0x%x, phyreg=0x%x, phydata=0x%x\n",
861 __func__, phyaddr, phyre
872 int phyaddr; local
910 int phyaddr = lp->mii.phy_id; local
1042 int phyaddr = lp->mii.phy_id; local
1143 int phyaddr = lp->mii.phy_id; local
[all...]
H A Dsmsc9420.c117 static int smsc9420_mii_read(struct mii_bus *bus, int phyaddr, int regidx) argument
133 addr = ((phyaddr & 0x1F) << 11) | ((regidx & 0x1F) << 6) |
154 static int smsc9420_mii_write(struct mii_bus *bus, int phyaddr, int regidx, argument
174 addr = ((phyaddr & 0x1F) << 11) | ((regidx & 0x1F) << 6) |
H A Dsmsc911x.c548 static int smsc911x_mii_read(struct mii_bus *bus, int phyaddr, int regidx) argument
565 addr = ((phyaddr & 0x1F) << 11) | ((regidx & 0x1F) << 6);
584 static int smsc911x_mii_write(struct mii_bus *bus, int phyaddr, int regidx, argument
605 addr = ((phyaddr & 0x1F) << 11) | ((regidx & 0x1F) << 6) |
/drivers/net/ethernet/stmicro/stmmac/
H A Dstmmac_mdio.c59 * @phyaddr: MII addr reg bits 15-11
66 static int stmmac_mdio_read(struct mii_bus *bus, int phyaddr, int phyreg) argument
74 u16 regValue = (((phyaddr << 11) & (0x0000F800)) |
95 * @phyaddr: MII addr reg bits 15-11
100 static int stmmac_mdio_write(struct mii_bus *bus, int phyaddr, int phyreg, argument
109 (((phyaddr << 11) & (0x0000F800)) | ((phyreg << 6) & (0x000007C0)))
H A Dstmmac_main.c68 static int phyaddr = -1; variable
69 module_param(phyaddr, int, S_IRUGO);
70 MODULE_PARM_DESC(phyaddr, "Physical device address");
2784 if ((phyaddr >= 0) && (phyaddr <= 31))
2785 priv->plat->phy_addr = phyaddr;
3055 } else if (!strncmp(opt, "phyaddr:", 8)) {
3056 if (kstrtoint(opt + 8, 0, &phyaddr))
/drivers/net/ethernet/nvidia/
H A Dforcedeth.c765 int phyaddr; member in struct:fe_priv
1183 if (mii_rw(dev, np->phyaddr, MII_BMCR, miicontrol))
1192 miicontrol = mii_rw(dev, np->phyaddr, MII_BMCR, MII_READ);
1217 if (mii_rw(dev, np->phyaddr, ri[i].reg, ri[i].init))
1239 reg = mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG6, MII_READ);
1241 if (mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG6, reg))
1243 if (mii_rw(dev, np->phyaddr,
1246 reg = mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG7, MII_READ);
1249 if (mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG7, reg))
1252 if (mii_rw(dev, np->phyaddr,
5937 int phyaddr = i & 0x1F; local
[all...]
/drivers/net/ethernet/broadcom/
H A Dbgmac.c617 static u16 bgmac_phy_read(struct bgmac *bgmac, u8 phyaddr, u8 reg) argument
648 tmp |= phyaddr;
652 tmp |= phyaddr << BGMAC_PA_ADDR_SHIFT;
658 phyaddr, reg);
666 static int bgmac_phy_write(struct bgmac *bgmac, u8 phyaddr, u8 reg, u16 value) argument
685 tmp |= phyaddr;
694 tmp |= phyaddr << BGMAC_PA_ADDR_SHIFT;
701 phyaddr, reg);
748 if (bgmac->phyaddr == BGMAC_PHY_NOREGS)
751 bgmac_phy_write(bgmac, bgmac->phyaddr, MII_BMC
[all...]
H A Dsb1250-mac.c323 static int sbmac_mii_read(struct mii_bus *bus, int phyaddr, int regidx);
324 static int sbmac_mii_write(struct mii_bus *bus, int phyaddr, int regidx,
423 * SBMAC_MII_READ(bus, phyaddr, regidx)
428 * phyaddr - PHY's address
435 static int sbmac_mii_read(struct mii_bus *bus, int phyaddr, int regidx) argument
459 sbmac_mii_senddata(sbm_mdio, phyaddr, 5);
514 * SBMAC_MII_WRITE(bus, phyaddr, regidx, regval)
520 * phyaddr - PHY to use
528 static int sbmac_mii_write(struct mii_bus *bus, int phyaddr, int regidx, argument
539 sbmac_mii_senddata(sbm_mdio, phyaddr,
[all...]
H A Dbgmac.h456 u8 phyaddr; member in struct:bgmac
/drivers/net/ethernet/aeroflex/
H A Dgreth.h135 u8 phyaddr; member in struct:greth_private
H A Dgreth.c1443 greth->phyaddr = (GRETH_REGLOAD(regs->mdio) >> 11) & 0x1F;
/drivers/acpi/
H A Dacpi_extlog.c71 #define ELOG_ENTRY_ADDR(phyaddr) \
72 (phyaddr - elog_base + (u8 *)elog_addr)
/drivers/net/ethernet/icplus/
H A Dipg.c444 unsigned int phyaddr, i; local
450 phyaddr = (IPG_NIC_PHY_ADDRESS + i) % 32;
456 status = mdio_read(dev, phyaddr, MII_BMSR);
459 return phyaddr;
2007 int phyaddr; local
2015 mii_if->phy_id = phyaddr = ipg_find_phyaddr(dev);
2017 if (phyaddr != 0x1f) {
2020 mii_1000cr = mdio_read(dev, phyaddr, MII_CTRL1000);
2023 mdio_write(dev, phyaddr, MII_CTRL1000, mii_1000cr);
2025 mii_phyctrl = mdio_read(dev, phyaddr, MII_BMC
[all...]
/drivers/scsi/lpfc/
H A Dlpfc_mbox.c1664 * @phyaddr: physical address for the sge
1672 dma_addr_t phyaddr, uint32_t length)
1678 nembed_sge->sge[sgentry].pa_lo = putPaddrLow(phyaddr);
1679 nembed_sge->sge[sgentry].pa_hi = putPaddrHigh(phyaddr);
1716 dma_addr_t phyaddr; local
1737 phyaddr = getPaddr(sge.pa_hi, sge.pa_lo);
1739 mbox->sge_array->addr[sgentry], phyaddr);
1771 dma_addr_t phyaddr; local
1815 SLI4_PAGE_SIZE, &phyaddr,
1826 lpfc_sli4_mbx_sge_set(mbox, pagen, phyaddr,
1671 lpfc_sli4_mbx_sge_set(struct lpfcMboxq *mbox, uint32_t sgentry, dma_addr_t phyaddr, uint32_t length) argument
[all...]
/drivers/net/ethernet/xircom/
H A Dxirc2ps_cs.c258 static unsigned mii_rd(unsigned int ioaddr, u_char phyaddr, u_char phyreg);
259 static void mii_wr(unsigned int ioaddr, u_char phyaddr, u_char phyreg,
420 mii_rd(unsigned int ioaddr, u_char phyaddr, u_char phyreg) argument
429 mii_wbits(ioaddr, phyaddr, 5); /* PHY address to be accessed */
442 mii_wr(unsigned int ioaddr, u_char phyaddr, u_char phyreg, unsigned data, argument
451 mii_wbits(ioaddr, phyaddr, 5); /* PHY address to be accessed */
/drivers/usb/gadget/udc/
H A Dmv_u3d.h192 u32 phyaddr; /* PHY address register */ member in struct:mv_u3d_vuc_regs
/drivers/pci/host/
H A Dpcie-rcar.c432 unsigned long phyaddr; local
434 phyaddr = WRITE_CMD |
441 rcar_pci_write_reg(pcie, phyaddr, H1_PCIEPHYADRR);
/drivers/net/ethernet/adi/
H A Dbfin_mac.c1857 unsigned short phyaddr = mii_bus_pd->phydev_data[i].addr; local
1858 if (phyaddr < PHY_MAX_ADDR)
1859 miibus->irq[phyaddr] = mii_bus_pd->phydev_data[i].irq;
1863 phyaddr, i);
/drivers/net/ethernet/dec/tulip/
H A Dde4x5.c970 static int mii_rd(u_char phyreg, u_char phyaddr, u_long ioaddr);
971 static void mii_wr(int data, u_char phyreg, u_char phyaddr, u_long ioaddr);
979 static int mii_get_oui(u_char phyaddr, u_long ioaddr);
4816 mii_rd(u_char phyreg, u_char phyaddr, u_long ioaddr) argument
4821 mii_address(phyaddr, ioaddr); /* PHY address to be accessed */
4829 mii_wr(int data, u_char phyreg, u_char phyaddr, u_long ioaddr) argument
4834 mii_address(phyaddr, ioaddr); /* PHY address to be accessed */
4930 mii_get_oui(u_char phyaddr, u_long ioaddr) argument
4941 r2 = mii_rd(MII_ID0, phyaddr, ioaddr);
4942 r3 = mii_rd(MII_ID1, phyaddr, ioadd
[all...]
/drivers/dma/ipu/
H A Dipu_idmac.c729 * @phyaddr: buffer physical address.
733 int buffer_n, dma_addr_t phyaddr)
751 idmac_write_ipureg(&ipu_data, phyaddr, IPU_IMA_DATA);
769 idmac_write_ipureg(&ipu_data, phyaddr, IPU_IMA_DATA);
732 ipu_update_channel_buffer(struct idmac_channel *ichan, int buffer_n, dma_addr_t phyaddr) argument
/drivers/net/ethernet/intel/fm10k/
H A Dfm10k_pf.c1490 u32 phyaddr = (u32)(dma_mask >> 32); local
1492 fm10k_write_reg(hw, FM10K_PHYADDR, phyaddr);

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