/drivers/s390/cio/ |
H A D | ioasm.h | 30 register struct subchannel_id reg1 asm ("1") = schid; 40 : "d" (reg1), "a" (addr) 47 register struct subchannel_id reg1 asm ("1") = schid; 55 : "d" (reg1), "a" (addr), "m" (*addr) 62 register struct subchannel_id reg1 asm ("1") = schid; 72 : "d" (reg1), "a" (addr), "m" (*addr) 79 register struct subchannel_id reg1 asm ("1") = schid; 87 : "d" (reg1), "a" (addr) 94 register struct subchannel_id reg1 asm("1") = schid; 104 : "d" (reg1), " [all...] |
H A D | io_sch.h | 174 register struct subchannel_id reg1 asm("1") = schid; 182 : "d" (reg1) 189 register struct subchannel_id reg1 asm("1") = schid; 197 : "d" (reg1) 204 register struct subchannel_id reg1 asm("1") = schid; 212 : "d" (reg1)
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/drivers/gpu/drm/nouveau/core/subdev/clock/ |
H A D | nv04.c | 54 nv04_clock_pll_prog(struct nouveau_clock *clk, u32 reg1, argument 62 if (reg1 > 0x405c) 63 setPLL_double_highregs(devinit, reg1, pv); 65 setPLL_double_lowregs(devinit, reg1, pv); 67 setPLL_single(devinit, reg1, pv);
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/drivers/mcb/ |
H A D | mcb-parse.c | 45 __le32 reg1; local 52 reg1 = readl(&gdd->reg1); 57 mdev->id = GDD_DEV(reg1); 58 mdev->rev = GDD_REV(reg1); 59 mdev->var = GDD_VAR(reg1); 60 mdev->bar = GDD_BAR(reg1); 66 mdev->irq.start = GDD_IRQ(reg1); 67 mdev->irq.end = GDD_IRQ(reg1);
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H A D | mcb-internal.h | 65 __le32 reg1; member in struct:chameleon_gdd
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/drivers/usb/phy/ |
H A D | phy-rcar-usb.c | 68 void __iomem *reg1; member in struct:rcar_usb_phy_priv 88 void __iomem *reg1 = priv->reg1; local 108 if (reg1) { 112 iowrite32(hsqctl1, reg1 + HSQCTL1); 113 iowrite32(hsqctl2, reg1 + HSQCTL2); 184 void __iomem *reg0, *reg1 = NULL; local 199 reg1 = devm_ioremap_resource(dev, res1); 200 if (IS_ERR(reg1)) 201 return PTR_ERR(reg1); [all...] |
/drivers/media/dvb-frontends/ |
H A D | tua6100.c | 77 u8 reg1[] = { 0x01, 0x00, 0x00, 0x00 }; local 80 struct i2c_msg msg1 = { .addr = priv->i2c_address, .flags = 0, .buf = reg1, .len = 4 }; 95 reg1[1] = 0x2c; 97 reg1[1] = 0x0c; 100 reg1[1] |= 0x40; 102 reg1[1] |= 0x80; 120 reg1[1] |= (div >> 9) & 0x03; 121 reg1[2] = div >> 1; 122 reg1[3] = (div << 7); 126 reg1[ [all...] |
H A D | si21xx.c | 227 static int si21_writeregs(struct si21xx_state *state, u8 reg1, argument 231 u8 buf[60];/* = { reg1, data };*/ 242 msg.buf[0] = reg1; 248 dprintk("%s: writereg error (reg1 == 0x%02x, data == 0x%02x, " 249 "ret == %i)\n", __func__, reg1, data[0], ret); 312 static int si21_readregs(struct si21xx_state *state, u8 reg1, u8 *b, u8 len) argument 319 .buf = ®1, 486 u8 reg1; local 493 reg1 = serit_sp1511lhb_inittab[i]; 495 if (reg1 [all...] |
H A D | s5h1409.c | 568 u16 reg, reg1, reg2; local 583 reg1 = s5h1409_readreg(state, 0xb2); 588 (((reg1 & 0xf000) >> 4) | (reg2 & 0xf0ff))); 606 u16 reg, reg1, reg2; local 614 reg1 = s5h1409_readreg(state, 0xb2); 619 (((reg1 & 0xf000) >> 4) | (reg2 & 0xf0ff)));
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H A D | m88rs2000.c | 253 u8 reg0, reg1; local 258 reg1 = m88rs2000_readreg(state, 0xb2); 260 m88rs2000_writereg(state, 0xb2, reg1); 270 u8 reg0, reg1; local 273 reg1 = m88rs2000_readreg(state, 0xb2); 275 reg1 &= 0x3f; 283 reg1 |= 0x80; 288 m88rs2000_writereg(state, 0xb2, reg1);
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H A D | stv0297.c | 107 static int stv0297_readregs(struct stv0297_state *state, u8 reg1, u8 * b, u8 len) argument 111 ®1,.len = 1}, 118 dprintk("%s: readreg error (reg == 0x%02x, ret == %i)\n", __func__, reg1, ret); 122 dprintk("%s: readreg error (reg == 0x%02x, ret == %i)\n", __func__, reg1, ret); 127 dprintk("%s: readreg error (reg == 0x%02x, ret == %i)\n", __func__, reg1, ret);
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H A D | tda8083.c | 76 static int tda8083_readregs (struct tda8083_state* state, u8 reg1, u8 *b, u8 len) argument 79 struct i2c_msg msg [] = { { .addr = state->config->demod_address, .flags = 0, .buf = ®1, .len = 1 }, 86 __func__, reg1, ret);
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/drivers/gpu/drm/nouveau/core/subdev/devinit/ |
H A D | nv04.c | 180 new_ramdac580(uint32_t reg1, bool ss, uint32_t ramdac580) argument 182 bool head_a = (reg1 == 0x680508); 193 setPLL_double_highregs(struct nouveau_devinit *devinit, u32 reg1, argument 198 uint32_t reg2 = reg1 + ((reg1 == 0x680520) ? 0x5c : 0x70); 199 uint32_t oldpll1 = nv_rd32(devinit, reg1); 206 int shift_powerctrl_1 = powerctrl_1_shift(chip_version, reg1); 214 if (chip_version > 0x40 && reg1 >= 0x680508) { /* !nv40 */ 216 ramdac580 = new_ramdac580(reg1, single_stage, oldramdac580); 240 switch (reg1) { [all...] |
/drivers/mfd/ |
H A D | rtl8411.c | 52 u32 reg1 = 0; local 55 rtsx_pci_read_config_dword(pcr, PCR_SETTING_REG1, ®1); 56 dev_dbg(&(pcr->pci->dev), "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG1, reg1); 58 if (!rtsx_vendor_setting_valid(reg1)) 61 pcr->aspm_en = rtsx_reg_to_aspm(reg1); 63 map_sd_drive(rtsx_reg_to_sd30_drive_sel_1v8(reg1)); 65 pcr->card_drive_sel |= rtsx_reg_to_card_drive_sel(reg1);
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/drivers/gpu/drm/nouveau/core/include/subdev/ |
H A D | clock.h | 100 int (*pll_prog)(struct nouveau_clock *, u32 reg1, 156 int nv04_clock_pll_prog(struct nouveau_clock *, u32 reg1,
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/drivers/ata/ |
H A D | pata_hpt366.c | 356 u32 reg1; local 370 pci_read_config_dword(dev, 0x40, ®1); 374 switch ((reg1 & 0x700) >> 8) {
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/drivers/s390/crypto/ |
H A D | ap_bus.c | 148 register unsigned long reg1 asm ("1") = -ENODEV; 156 : "+d" (reg0), "+d" (reg1), "+d" (reg2) : : "cc" ); 157 return reg1; 195 register struct ap_queue_status reg1 asm ("1"); 199 : "+d" (reg0), "=d" (reg1), "+d" (reg2) : : "cc"); 202 return reg1; 214 register struct ap_queue_status reg1 asm ("1"); 219 : "+d" (reg0), "=d" (reg1), "+d" (reg2) : : "cc"); 220 return reg1; 252 register struct ap_queue_status reg1 as [all...] |
/drivers/gpu/ipu-v3/ |
H A D | ipu-dc.c | 133 u32 reg1, reg2; local 136 reg1 = (operand << 20) & 0xfff00000; 139 reg1 = sync | glue << 4 | ++wave << 11 | ((operand << 15) & 0xffff8000); 142 reg1 = sync | glue << 4 | ++wave << 11 | ++map << 15 | ((operand << 20) & 0xfff00000); 145 writel(reg1, priv->dc_tmpl_reg + word * 8);
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/drivers/net/wireless/ath/ath10k/ |
H A D | spectral.c | 66 u32 reg0, reg1, nf_list1, nf_list2; local 76 reg1 = __le32_to_cpu(fftr->reg1); 107 fft_sample->relpwr_db = MS(reg1, SEARCH_FFT_REPORT_REG1_RELPWR_DB); 108 fft_sample->avgpwr_db = MS(reg1, SEARCH_FFT_REPORT_REG1_AVGPWR_DB); 110 peak_mag = MS(reg1, SEARCH_FFT_REPORT_REG1_PEAK_MAG);
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/drivers/power/ |
H A D | wm831x_power.c | 220 int ret, reg1, reg2; local 230 reg1 = 0; 238 reg1 |= WM831X_CHG_ENA; 242 reg1 |= WM831X_CHG_FAST; 258 pdata->eoc_iterm, ®1, 275 reg1);
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/drivers/gpu/drm/nouveau/dispnv04/ |
H A D | hw.c | 132 nouveau_hw_decode_pll(struct drm_device *dev, uint32_t reg1, uint32_t pll1, argument 143 if (reg1 <= 0x405c) { 170 uint32_t reg1, pll1, pll2 = 0; local 175 if (ret || !(reg1 = pll_lim.reg)) 178 pll1 = nvif_rd32(device, reg1); 179 if (reg1 <= 0x405c) 180 pll2 = nvif_rd32(device, reg1 + 4); 182 uint32_t reg2 = reg1 + (reg1 == NV_RAMDAC_VPLL2 ? 0x5c : 0x70); 187 if (drm->device.info.family == NV_DEVICE_INFO_V0_CELSIUS && reg1 > [all...] |
/drivers/scsi/ |
H A D | mac_esp.c | 313 #define MAC_ESP_PIO_LOOP(operands, reg1) \ 318 : "+a" (addr), "+r" (reg1) \ 321 #define MAC_ESP_PIO_FILL(operands, reg1) \ 341 : "+a" (addr), "+r" (reg1) \
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/drivers/ide/ |
H A D | ali14xx.c | 72 static struct { u8 reg1, reg2, reg3, reg4; } regTab[4] = { member in struct:__anon1359 138 outReg(param1, regTab[driveNum].reg1);
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/drivers/iio/adc/ |
H A D | twl6030-gpadc.c | 696 unsigned int reg1, unsigned int mask0, unsigned int mask1, 702 val |= (trim_regs[reg1] & mask1) >> 1; 703 if (trim_regs[reg1] & 0x01) 695 twl6032_get_trim_value(u8 *trim_regs, unsigned int reg0, unsigned int reg1, unsigned int mask0, unsigned int mask1, unsigned int shift0) argument
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/drivers/net/ethernet/8390/ |
H A D | wd.c | 245 outb(tmp, ioaddr+1); /* Restore original reg1 value. */ 281 int reg1 = inb(ioaddr+1); local 283 if (ancient || reg1 == 0xff) { /* Ack!! No way to read the IRQ! */ 308 dev->irq = irqmap[((reg4 >> 5) & 0x03) + (reg1 & 0x04)];
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