Searched refs:reg_shift (Results 1 - 18 of 18) sorted by relevance

/drivers/ata/
H A Dpata_of_platform.c26 unsigned int reg_shift = 0; local
49 reg_shift = be32_to_cpup(prop);
66 reg_shift, pio_mask);
H A Dpata_pxa.c307 (ATA_REG_DATA << pdata->reg_shift);
309 (ATA_REG_ERR << pdata->reg_shift);
311 (ATA_REG_FEATURE << pdata->reg_shift);
313 (ATA_REG_NSECT << pdata->reg_shift);
315 (ATA_REG_LBAL << pdata->reg_shift);
317 (ATA_REG_LBAM << pdata->reg_shift);
319 (ATA_REG_LBAH << pdata->reg_shift);
321 (ATA_REG_DEVICE << pdata->reg_shift);
323 (ATA_REG_STATUS << pdata->reg_shift);
325 (ATA_REG_CMD << pdata->reg_shift);
[all...]
/drivers/net/ethernet/stmicro/stmmac/
H A Ddwmac-socfpga.c43 u32 reg_shift; member in struct:socfpga_dwmac
83 u32 reg_offset, reg_shift; local
109 ret = of_property_read_u32_index(np, "altr,sysmgr-syscon", 2, &reg_shift);
111 dev_info(dev, "Could not read reg_shift from sysmgr-syscon!\n");
130 dwmac->reg_shift = reg_shift;
142 u32 reg_shift = dwmac->reg_shift; local
167 ctrl &= ~(SYSMGR_EMACGRP_CTRL_PHYSEL_MASK << reg_shift);
168 ctrl |= val << reg_shift;
[all...]
/drivers/i2c/busses/
H A Di2c-ocores.c30 u32 reg_shift; member in struct:ocores_i2c
79 iowrite8(value, i2c->base + (reg << i2c->reg_shift));
84 iowrite16(value, i2c->base + (reg << i2c->reg_shift));
89 iowrite32(value, i2c->base + (reg << i2c->reg_shift));
94 return ioread8(i2c->base + (reg << i2c->reg_shift));
99 return ioread16(i2c->base + (reg << i2c->reg_shift));
104 return ioread32(i2c->base + (reg << i2c->reg_shift));
276 rd = ioread32be(i2c->base + (rreg << i2c->reg_shift));
290 curr = ioread32be(i2c->base + (rreg << i2c->reg_shift));
298 iowrite32be(wr, i2c->base + (rreg << i2c->reg_shift));
[all...]
H A Di2c-omap.c184 int reg_shift; /* bit shift for I2C register addresses */ member in struct:omap_i2c_dev
266 (i2c_dev->regs[reg] << i2c_dev->reg_shift));
272 (i2c_dev->regs[reg] << i2c_dev->reg_shift));
1145 dev->reg_shift = (dev->flags >> OMAP_I2C_FLAG_BUS_SHIFT__SHIFT) & 3;
/drivers/gpio/
H A Dgpio-adnp.c17 #define GPIO_DDR(gpio) (0x00 << (gpio)->reg_shift)
18 #define GPIO_PLR(gpio) (0x01 << (gpio)->reg_shift)
19 #define GPIO_IER(gpio) (0x02 << (gpio)->reg_shift)
20 #define GPIO_ISR(gpio) (0x03 << (gpio)->reg_shift)
21 #define GPIO_PTR(gpio) (0x04 << (gpio)->reg_shift)
26 unsigned int reg_shift; member in struct:adnp
76 unsigned int reg = offset >> adnp->reg_shift;
90 unsigned int reg = offset >> adnp->reg_shift;
119 unsigned int reg = offset >> adnp->reg_shift;
154 unsigned int reg = offset >> adnp->reg_shift;
[all...]
/drivers/mfd/
H A Dhtc-egpio.c36 int reg_shift; /* bit shift */ member in struct:egpio_info
136 return bit >> ei->reg_shift;
141 return 1 << (bit & ((1 << ei->reg_shift)-1));
200 shift = pos << ei->reg_shift;
240 shift += (1<<ei->reg_shift)) {
302 ei->reg_shift = fls(pdata->reg_width - 1);
303 pr_debug("reg_shift = %d\n", ei->reg_shift);
H A Dtimberdale.c86 .reg_shift = 2,
/drivers/tty/serial/8250/
H A D8250_pci.c135 return setup_port(priv, port, bar, offset, board->reg_shift);
156 return setup_port(priv, port, bar, offset, board->reg_shift);
221 return setup_port(priv, port, bar, offset, board->reg_shift);
389 return setup_port(priv, port, bar, offset, board->reg_shift);
648 return setup_port(priv, port, bar, offset, board->reg_shift);
673 return setup_port(priv, port, bar, offset, board->reg_shift);
780 return setup_port(priv, port, bar, offset, board->reg_shift);
796 return setup_port(priv, port, bar, 0, board->reg_shift);
1305 (board->reg_shift + 3);
1310 return setup_port(priv, port, bar, offset, board->reg_shift);
[all...]
/drivers/base/regmap/
H A Dinternal.h106 int reg_shift; member in struct:regmap
H A Dregmap.c570 map->reg_shift = config->pad_bits % 8;
623 switch (config->reg_bits + map->reg_shift) {
1266 map->format.format_reg(map->work_buf, reg, map->reg_shift);
1776 map->format.format_reg(u8, reg, map->reg_shift);
2051 map->format.format_reg(map->work_buf, reg, map->reg_shift);
/drivers/ssb/
H A Ddriver_extif.c77 ports[i].reg_shift = 0;
H A Ddriver_chipcommon.c692 ports[i].reg_shift = 0;
/drivers/bcma/
H A Ddriver_chipcommon.c351 ports[i].reg_shift = 0;
/drivers/pinctrl/
H A Dpinctrl-tz1090.c1249 u32 reg, reg_shift, select, val; local
1263 reg_shift = pin % 30;
1268 val &= ~BIT(reg_shift);
1269 val |= select << reg_shift;
/drivers/mmc/host/
H A Domap.c83 #define OMAP_MMC_REG(host, reg) (OMAP_MMC_REG_##reg << (host)->reg_shift)
138 unsigned int reg_shift; member in struct:mmc_omap_host
1419 host->reg_shift = (mmc_omap7xx() ? 1 : 2);
/drivers/hwmon/
H A Dw83795.c1457 int reg_shift; local
1477 reg_shift = 2 * index;
1479 tmp &= ~(0x03 << reg_shift);
1480 tmp |= val << reg_shift;
/drivers/tty/serial/
H A Dsccnxp.c952 s->port[i].regshift = s->pdata.reg_shift;

Completed in 393 milliseconds