Searched refs:clock (Results 1 - 25 of 30) sorted by relevance

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/include/linux/platform_data/
H A Dmmc-mvsdio.h13 unsigned int clock; member in struct:mvsdio_platform_data
/include/dt-bindings/clock/
H A Drk3066a-cru.h16 #include <dt-bindings/clock/rk3188-cru-common.h>
H A Drk3188-cru.h16 #include <dt-bindings/clock/rk3188-cru-common.h>
/include/linux/
H A Dposix-timers.h33 * Bit 2 indicates whether a cpu clock refers to a thread or a process.
39 #define CPUCLOCK_PID(clock) ((pid_t) ~((clock) >> 3))
40 #define CPUCLOCK_PERTHREAD(clock) \
41 (((clock) & (clockid_t) CPUCLOCK_PERTHREAD_MASK) != 0)
44 #define CPUCLOCK_WHICH(clock) ((clock) & (clockid_t) CPUCLOCK_CLOCK_MASK)
53 #define MAKE_PROCESS_CPUCLOCK(pid, clock) \
54 ((~(clockid_t) (pid) << 3) | (clockid_t) (clock))
55 #define MAKE_THREAD_CPUCLOCK(tid, clock) \
86 unsigned int clock; member in struct:k_itimer::__anon912::__anon914
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H A Dscc.h55 long clock; /* used clock */ member in struct:scc_channel
H A Dtimekeeper_internal.h15 * @clock: Current clocksource used for timekeeping.
16 * @read: Read function of @clock
18 * @cycle_last: @clock cycle value at last update
28 * for a fast NMI safe accessor to clock monotonic.
31 struct clocksource *clock; member in struct:tk_read_base
46 * @offs_real: Offset clock monotonic -> clock realtime
47 * @offs_boot: Offset clock monotonic -> clock boottime
48 * @offs_tai: Offset clock monotoni
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H A Dclocksource.h328 extern int timekeeping_notify(struct clocksource *clock);
H A Dring_buffer.h39 * @RINGBUF_TYPE_TIME_STAMP: Sync time stamp with external clock
182 u64 (*clock)(void));
H A Dhrtimer.h89 * representation. The time is related to the clock on
97 * @base: pointer to the timer base (per cpu and per clock)
134 * struct hrtimer_clock_base - the timer base for a specific clock
135 * @cpu_base: per cpu clock base
136 * @index: clock type index for per_cpu support when moving a
138 * @clockid: clock id for per_cpu support
140 * @resolution: the resolution of the clock, in nanoseconds
141 * @get_time: function to retrieve the current time of the clock
143 * @offset: offset of this clock to the monotonic base
165 * struct hrtimer_cpu_base - the per cpu clock base
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/include/linux/usb/
H A Disp1362.h35 void (*clock) (struct device *dev, int start); member in struct:isp1362_platform_data
H A Dmusb.h106 const char *clock; member in struct:musb_hdrc_platform_data
/include/linux/mfd/
H A Ddbx500-prcmu.h15 #include <dt-bindings/mfd/dbx500-prcmu.h> /* For clock identifiers */
69 * - EPOD_STATE_ON_CLK_OFF: The EPOD is switched on, clock is still off
70 * - EPOD_STATE_ON: Same as above, but with clock enabled
273 static inline int prcmu_request_clock(u8 clock, bool enable) argument
275 return db8500_prcmu_request_clock(clock, enable);
278 unsigned long prcmu_clock_rate(u8 clock);
279 long prcmu_round_clock_rate(u8 clock, unsigned long rate);
280 int prcmu_set_clock_rate(u8 clock, unsigned long rate);
457 static inline int prcmu_request_clock(u8 clock, bool enable) argument
462 static inline long prcmu_round_clock_rate(u8 clock, unsigne argument
467 prcmu_set_clock_rate(u8 clock, unsigned long rate) argument
472 prcmu_clock_rate(u8 clock) argument
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H A Ddb8500-prcmu.h51 * enum clk_arm - ARM Cortex A9 clock schemes
67 * enum clk_gen - GEN#0/GEN#1 clock schemes
504 int prcmu_set_clock_divider(u8 clock, u8 divider);
527 int db8500_prcmu_request_clock(u8 clock, bool enable);
622 static inline int prcmu_set_clock_divider(u8 clock, u8 divider) argument
686 static inline int db8500_prcmu_request_clock(u8 clock, bool enable) argument
/include/sound/
H A Di2c.h42 void (*direction)(struct snd_i2c_bus *bus, int clock, int data); /* set line direction (0 = write, 1 = read) */
43 void (*setlines)(struct snd_i2c_bus *bus, int clock, int data);
/include/uapi/linux/
H A Dscc.h83 /* Tx/Rx clock sources */
89 /* modems without clock regeneration */
91 /* MODEMs without clock recovery */
152 long clock; /* clock */ member in struct:scc_hw_config
/include/drm/
H A Ddrm_modes.h53 MODE_NOCLOCK, /* no fixed clock available */
54 MODE_CLOCK_HIGH, /* clock required is too high */
55 MODE_CLOCK_LOW, /* clock required is too low */
56 MODE_CLOCK_RANGE, /* clock/mode isn't in a ClockRange */
84 .name = nm, .status = 0, .type = (t), .clock = (c), \
107 int clock; /* in kHz */ member in struct:drm_display_mode
H A Ddrm_dp_mst_helper.h482 int drm_dp_calc_pbn_mode(int clock, int bpp);
/include/linux/mmc/
H A Dsdhci.h26 /* Controller doesn't honor resets unless we touch the clock register */
68 /* Controller needs 10ms delay between applying power and clock */
72 /* Controller reports wrong base clock capability */
140 unsigned int clock; /* Current clock (MHz) */ member in struct:sdhci_host
H A Dhost.h24 unsigned int clock; /* clock rate */ member in struct:mmc_ios
299 bool clk_gated; /* clock gated */
300 struct delayed_work clk_gate_work; /* delayed clock gate */
301 unsigned int clk_old; /* old clock value cache */
303 struct mutex clk_gate_mutex; /* mutex for clock gating */
371 unsigned int actual_clock; /* Actual HC clock rate */
507 return host->ios.clock;
/include/linux/can/
H A Ddev.h39 struct can_clock clock; member in struct:can_priv
/include/trace/events/
H A Dpower.h221 * The clock events are used for clock enable/disable and for
222 * clock rate change
224 DECLARE_EVENT_CLASS(clock,
246 DEFINE_EVENT(clock, clock_enable,
253 DEFINE_EVENT(clock, clock_disable,
260 DEFINE_EVENT(clock, clock_set_rate,
/include/video/
H A Dexynos_mipi_dsim.h111 * @e_byte_clk: select byte clock source. (it must be DSIM_PLL_OUT_DIV8)
114 * clock(System clock cycle base)
115 * if the timer value goes to 0x00000000, the clock stable bit of status
117 * @esc_clk: specifies escape clock frequency for getting the escape clock
126 * the direction with respect to Tx escape clock.
129 * after RxLpdt asserts with respect to Tx escape clock.
200 * @clock: pointer to MIPI-DSI clock o
224 struct clk *clock; member in struct:mipi_dsim_device
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H A Dsstfb.h219 #define DACREG_AC0_I 0x48 /* clock A reg C */
221 #define DACREG_BD0_I 0x6c /* clock B reg D */
241 * 8 freq registers (0-7) for video clock (CLK0)
242 * 2 freq registers (a-b) for graphic clock (CLK1)
303 /* used to know witch clock to set */
326 int (*set_pll) (struct fb_info *info, const struct pll_timing *t, const int clock);
/include/linux/spi/
H A Dadi_spi3.h215 u32 clock; member in struct:adi_spi_regs
/include/uapi/drm/
H A Ddrm_mode.h107 __u32 clock; member in struct:drm_mode_modeinfo

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