Searched refs:LE_CSR0 (Results 1 - 6 of 6) sorted by relevance

/drivers/net/ethernet/amd/
H A D7990.c130 WRITERAP(lp, LE_CSR0);
232 WRITERAP(lp, LE_CSR0);
258 WRITERAP(lp, LE_CSR0);
391 WRITERAP(lp, LE_CSR0);
408 WRITERAP(lp, LE_CSR0);
448 WRITERAP(lp, LE_CSR0); /* LANCE Controller Status */
489 WRITERAP(lp, LE_CSR0);
520 WRITERAP(lp, LE_CSR0);
635 WRITERAP(lp, LE_CSR0);
659 WRITERAP(lp, LE_CSR0);
[all...]
H A Da2065.h50 #define LE_CSR0 0x0000 /* LANCE Controller Status */ macro
H A Da2065.c145 ll->rap = LE_CSR0;
226 ll->rap = LE_CSR0;
360 ll->rap = LE_CSR0;
377 ll->rap = LE_CSR0;
420 ll->rap = LE_CSR0; /* LANCE Controller Status */
456 ll->rap = LE_CSR0;
469 ll->rap = LE_CSR0;
495 ll->rap = LE_CSR0;
509 ll->rap = LE_CSR0;
627 ll->rap = LE_CSR0;
[all...]
H A Ddeclance.c92 #define LE_CSR0 0 macro
319 writereg(&ll->rap, LE_CSR0);
530 writereg(&ll->rap, LE_CSR0);
673 writereg(&ll->rap, LE_CSR0);
689 writereg(&ll->rap, LE_CSR0);
739 writereg(&ll->rap, LE_CSR0);
786 writereg(&ll->rap, LE_CSR0);
846 writereg(&ll->rap, LE_CSR0);
875 writereg(&ll->rap, LE_CSR0);
987 writereg(&ll->rap, LE_CSR0);
[all...]
H A D7990.h132 #define LE_CSR0 0x0000 /* LANCE Controller Status */ macro
H A Dsunlance.c125 #define LE_CSR0 0 macro
282 sbus_writew(LE_CSR0, __base + RAP); \
316 sbus_writew(LE_CSR0, lp->lregs + RAP);
474 sbus_writew(LE_CSR0, lp->lregs + RAP);
820 sbus_writew(LE_CSR0, lp->lregs + RAP);

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