Searched refs:intr (Results 1 - 25 of 286) sorted by relevance

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/drivers/scsi/fnic/
H A Dvnic_intr.c27 void vnic_intr_free(struct vnic_intr *intr) argument
29 intr->ctrl = NULL;
32 int vnic_intr_alloc(struct vnic_dev *vdev, struct vnic_intr *intr, argument
35 intr->index = index;
36 intr->vdev = vdev;
38 intr->ctrl = vnic_dev_get_res(vdev, RES_TYPE_INTR_CTRL, index);
39 if (!intr->ctrl) {
48 void vnic_intr_init(struct vnic_intr *intr, unsigned int coalescing_timer, argument
51 iowrite32(coalescing_timer, &intr->ctrl->coalescing_timer);
52 iowrite32(coalescing_type, &intr
57 vnic_intr_clean(struct vnic_intr *intr) argument
[all...]
H A Dvnic_intr.h68 static inline void vnic_intr_unmask(struct vnic_intr *intr) argument
70 iowrite32(0, &intr->ctrl->mask);
73 static inline void vnic_intr_mask(struct vnic_intr *intr) argument
75 iowrite32(1, &intr->ctrl->mask);
78 static inline void vnic_intr_return_credits(struct vnic_intr *intr, argument
88 iowrite32(int_credit_return, &intr->ctrl->int_credit_return);
91 static inline unsigned int vnic_intr_credits(struct vnic_intr *intr) argument
93 return ioread32(&intr->ctrl->int_credits);
96 static inline void vnic_intr_return_all_credits(struct vnic_intr *intr) argument
98 unsigned int credits = vnic_intr_credits(intr);
[all...]
/drivers/net/ethernet/cisco/enic/
H A Dvnic_intr.c29 void vnic_intr_free(struct vnic_intr *intr) argument
31 intr->ctrl = NULL;
34 int vnic_intr_alloc(struct vnic_dev *vdev, struct vnic_intr *intr, argument
37 intr->index = index;
38 intr->vdev = vdev;
40 intr->ctrl = vnic_dev_get_res(vdev, RES_TYPE_INTR_CTRL, index);
41 if (!intr->ctrl) {
49 void vnic_intr_init(struct vnic_intr *intr, u32 coalescing_timer, argument
52 vnic_intr_coalescing_timer_set(intr, coalescing_timer);
53 iowrite32(coalescing_type, &intr
58 vnic_intr_coalescing_timer_set(struct vnic_intr *intr, u32 coalescing_timer) argument
65 vnic_intr_clean(struct vnic_intr *intr) argument
[all...]
H A Dvnic_intr.h54 static inline void vnic_intr_unmask(struct vnic_intr *intr) argument
56 iowrite32(0, &intr->ctrl->mask);
59 static inline void vnic_intr_mask(struct vnic_intr *intr) argument
61 iowrite32(1, &intr->ctrl->mask);
64 static inline int vnic_intr_masked(struct vnic_intr *intr) argument
66 return ioread32(&intr->ctrl->mask);
69 static inline void vnic_intr_return_credits(struct vnic_intr *intr, argument
79 iowrite32(int_credit_return, &intr->ctrl->int_credit_return);
82 static inline unsigned int vnic_intr_credits(struct vnic_intr *intr) argument
84 return ioread32(&intr
87 vnic_intr_return_all_credits(struct vnic_intr *intr) argument
[all...]
/drivers/gpu/drm/nouveau/core/subdev/mc/
H A Dbase.c39 u32 intr = nv_rd32(pmc, 0x000100); local
40 if (intr == 0xffffffff) /* likely fallen off the bus */
41 intr = 0x00000000;
42 return intr;
50 const struct nouveau_mc_intr *map = oclass->intr;
52 u32 intr; local
56 intr = nouveau_mc_intr_mask(pmc);
60 if (intr) {
61 u32 stat = intr = nouveau_mc_intr_mask(pmc);
63 if (intr
[all...]
H A Dgk20a.c36 .intr = nvc0_mc_intr,
H A Dnv94.c36 .intr = nv50_mc_intr,
H A Dnvc3.c36 .intr = nvc0_mc_intr,
H A Dnv40.c43 .intr = nv04_mc_intr,
H A Dnv4c.c43 .intr = nv04_mc_intr,
H A Dnv44.c52 .intr = nv04_mc_intr,
/drivers/gpu/drm/nouveau/core/subdev/bus/
H A Dnv04.h18 void (*intr)(struct nouveau_subdev *); member in struct:nv04_bus_impl
H A Dnv04.c42 if (subdev && subdev->intr)
43 subdev->intr(subdev);
49 nv_error(pbus, "unknown intr 0x%08x\n", stat);
79 nv_subdev(priv)->intr = impl->intr;
94 .intr = nv04_bus_intr,
H A Dnv31.c37 if (subdev && subdev->intr)
38 subdev->intr(subdev);
55 if (subdev && subdev->intr)
56 subdev->intr(subdev);
62 nv_error(pbus, "unknown intr 0x%08x\n", stat);
91 .intr = nv31_bus_intr,
H A Dnv50.c66 if (subdev && subdev->intr)
67 subdev->intr(subdev);
73 nv_error(pbus, "unknown intr 0x%08x\n", stat);
102 .intr = nv50_bus_intr,
/drivers/gpu/drm/msm/mdp/mdp5/
H A Dmdp5_irq.c85 uint32_t intr; local
87 intr = mdp5_read(mdp5_kms, REG_MDP5_HW_INTR_STATUS);
89 VERB("intr=%08x", intr);
91 if (intr & MDP5_HW_INTR_STATUS_INTR_MDP)
94 if (intr & MDP5_HW_INTR_STATUS_INTR_HDMI)
/drivers/gpu/drm/nouveau/core/subdev/fb/
H A Dnvc0.c40 u32 intr = nv_rd32(priv, 0x000100); local
41 if (intr & 0x08000000) {
42 nv_debug(priv, "PFFB intr\n");
43 intr &= ~0x08000000;
45 if (intr & 0x00002000) {
46 nv_debug(priv, "PBFB intr\n");
47 intr &= ~0x00002000;
105 nv_subdev(priv)->intr = nvc0_fb_intr;
/drivers/gpu/drm/nouveau/core/subdev/therm/
H A Dnv84.c144 uint32_t intr; local
148 intr = nv_rd32(therm, 0x20100) & 0x3ff;
151 if (intr & 0x002) {
155 intr &= ~0x002;
159 if (intr & 0x004) {
163 intr &= ~0x004;
167 if (intr & 0x008) {
171 intr &= ~0x008;
175 if (intr & 0x010) {
179 intr
[all...]
/drivers/net/wireless/zd1211rw/
H A Dzd_usb.c373 struct zd_usb_interrupt *intr = &usb->intr; local
375 spin_lock(&intr->lock);
376 if (atomic_read(&intr->read_regs_enabled)) {
377 atomic_set(&intr->read_regs_enabled, 0);
378 intr->read_regs_int_overridden = 1;
379 complete(&intr->read_regs.completion);
381 spin_unlock(&intr->lock);
387 struct zd_usb_interrupt *intr = &usb->intr; local
440 struct zd_usb_interrupt *intr; local
516 struct zd_usb_interrupt *intr = &usb->intr; local
529 struct zd_usb_interrupt *intr = &usb->intr; local
592 struct zd_usb_interrupt *intr = &usb->intr; local
1170 struct zd_usb_interrupt *intr = &usb->intr; local
1615 struct zd_usb_interrupt *intr = &usb->intr; local
1627 struct zd_usb_interrupt *intr = &usb->intr; local
1638 struct zd_usb_interrupt *intr = &usb->intr; local
1679 struct zd_usb_interrupt *intr = &usb->intr; local
[all...]
/drivers/gpu/host1x/
H A DMakefile5 intr.o \
H A Dintr.c27 #include "intr.h"
175 spin_lock(&syncpt->intr.lock);
177 remove_completed_waiters(&syncpt->intr.wait_head, threshold,
180 empty = list_empty(&syncpt->intr.wait_head);
184 reset_threshold_interrupt(host, &syncpt->intr.wait_head,
187 spin_unlock(&syncpt->intr.lock);
204 container_of(syncpt_intr, struct host1x_syncpt, intr);
237 spin_lock(&syncpt->intr.lock);
239 queue_was_empty = list_empty(&syncpt->intr.wait_head);
241 if (add_waiter_to_queue(waiter, &syncpt->intr
[all...]
/drivers/gpu/drm/nouveau/core/subdev/i2c/
H A Dnve0.c30 u32 intr = nv_rd32(i2c, 0x00dc60); local
31 u32 stat = nv_rd32(i2c, 0x00dc68) & intr, i;
38 nv_wr32(i2c, 0x00dc60, intr);
/drivers/gpu/drm/nouveau/core/engine/
H A Dxtensa.c60 u32 intr = nv_ro32(xtensa, 0xc20); local
64 if (intr & 0x10)
66 nv_wo32(xtensa, 0xc20, intr);
67 intr = nv_ro32(xtensa, 0xc20);
68 if (unk104 == 0x10001 && unk10c == 0x200 && chan && !intr) {
90 nv_subdev(xtensa)->intr = _nouveau_xtensa_intr;
/drivers/scsi/
H A Dmac53c94.c45 int intr; member in struct:fsc_state
199 int nb, stat, seq, intr; local
208 intr = readb(&regs->interrupt);
211 printk(KERN_DEBUG "mac53c94_intr, intr=%x stat=%x seq=%x phase=%d\n",
212 intr, stat, seq, state->phase);
215 if (intr & INTR_RESET) {
223 if (intr & INTR_ILL_CMD) {
224 printk(KERN_ERR "53c94: invalid cmd, intr=%x stat=%x seq=%x phase=%d\n",
225 intr, stat, seq, state->phase);
232 printk("53c94: bad error, intr
[all...]
/drivers/gpu/drm/nouveau/core/subdev/pwr/
H A Dbase.c144 u32 intr = nv_rd32(ppwr, 0x10a008) & disp & ~(disp >> 16); local
146 if (intr & 0x00000020) {
152 intr &= ~0x00000020;
156 if (intr & 0x00000040) {
159 intr &= ~0x00000040;
162 if (intr & 0x00000080) {
166 intr &= ~0x00000080;
169 if (intr) {
170 nv_error(ppwr, "intr 0x%08x\n", intr);
[all...]

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