Searched refs:intr_enable (Results 1 - 25 of 34) sorted by relevance

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/drivers/block/
H A Dswim3.c81 REG(intr_enable);
110 /* Bits in intr and intr_enable registers */
413 out_8(&sw->intr_enable, SEEN_SECTOR);
434 out_8(&sw->intr_enable, SEEK_DONE);
498 out_8(&sw->intr_enable, TRANSFER_DONE);
584 out_8(&sw->intr_enable, 0);
609 out_8(&sw->intr_enable, 0);
663 out_8(&sw->intr_enable, 0);
699 out_8(&sw->intr_enable, 0);
729 out_8(&sw->intr_enable,
[all...]
/drivers/usb/host/
H A Dehci-hcd.c199 ehci_writel(ehci, 0, &ehci->regs->intr_enable);
639 &ehci->regs->intr_enable); /* Turn On Interrupts */
816 ehci_writel(ehci, 0, &ehci->regs->intr_enable);
1089 ehci_writel(ehci, 0, &ehci->regs->intr_enable);
1090 (void) ehci_readl(ehci, &ehci->regs->intr_enable);
1138 ehci_writel(ehci, mask, &ehci->regs->intr_enable);
1139 ehci_readl(ehci, &ehci->regs->intr_enable);
H A Dehci-hub.c361 ehci_writel(ehci, mask, &ehci->regs->intr_enable);
362 ehci_readl(ehci, &ehci->regs->intr_enable);
403 power_okay = ehci_readl(ehci, &ehci->regs->intr_enable);
410 ehci_writel(ehci, 0, &ehci->regs->intr_enable);
503 ehci_writel(ehci, INTR_MASK, &ehci->regs->intr_enable);
504 (void) ehci_readl(ehci, &ehci->regs->intr_enable);
H A Dehci-tegra.c131 saved_usbintr = ehci_readl(ehci, &ehci->regs->intr_enable);
133 ehci_writel(ehci, 0, &ehci->regs->intr_enable);
180 ehci_writel(ehci, saved_usbintr, &ehci->regs->intr_enable);
H A Dehci-timer.c212 ehci_writel(ehci, 0, &ehci->regs->intr_enable);
H A Dehci-fsl.c442 pdata->pm_intr_enable = ehci_readl(ehci, &ehci->regs->intr_enable);
508 ehci_writel(ehci, pdata->pm_intr_enable, &ehci->regs->intr_enable);
H A Doxu210hp.h111 /* these STS_* flags are also intr_enable bits (USBINTR) */
122 u32 intr_enable; member in struct:ehci_regs
H A Dfotg210.h241 /* these STS_* flags are also intr_enable bits (USBINTR) */
250 u32 intr_enable; member in struct:fotg210_regs
H A Dfusbh200.h236 /* these STS_* flags are also intr_enable bits (USBINTR) */
245 u32 intr_enable; member in struct:fusbh200_regs
H A Doxu210hp-hcd.c345 writel(0, &oxu->regs->intr_enable);
2761 writel(INTR_MASK, &oxu->regs->intr_enable); /* Turn On Interrupts */
2781 writel(0, &oxu->regs->intr_enable);
3516 writel(mask, &oxu->regs->intr_enable);
3517 readl(&oxu->regs->intr_enable);
3541 temp = readl(&oxu->regs->intr_enable);
3547 writel(0, &oxu->regs->intr_enable);
3600 writel(INTR_MASK, &oxu->regs->intr_enable);
H A Dehci-dbg.c883 ehci_readl(ehci, &ehci->regs->intr_enable));
H A Dfotg210-hcd.c731 fotg210_readl(fotg210, &fotg210->regs->intr_enable));
950 fotg210_writel(fotg210, 0, &fotg210->regs->intr_enable);
1235 fotg210_writel(fotg210, 0, &fotg210->regs->intr_enable);
5307 &fotg210->regs->intr_enable); /* Turn On Interrupts */
5473 fotg210_writel(fotg210, 0, &fotg210->regs->intr_enable);
/drivers/misc/mei/
H A Dhw-me.c228 * @intr_enable: if interrupt should be enabled after reset.
232 static int mei_me_hw_reset(struct mei_device *dev, bool intr_enable) argument
239 if (intr_enable)
259 if (intr_enable == false)
785 .intr_enable = mei_me_intr_enable,
H A Dmei_dev.h270 * @intr_enable : enable interrupts
299 void (*intr_enable)(struct mei_device *dev); member in struct:mei_hw_ops
746 dev->ops->intr_enable(dev);
H A Dhw-txe.c831 * @intr_enable: if interrupt should be enabled after reset.
835 static int mei_txe_hw_reset(struct mei_device *dev, bool intr_enable) argument
1145 .intr_enable = mei_txe_intr_enable,
/drivers/net/ethernet/chelsio/cxgb3/
H A Dvsc8211.c341 .intr_enable = vsc8211_intr_enable,
355 .intr_enable = vsc8211_intr_enable,
H A Dael1002.c203 .intr_enable = ael1002_intr_noop,
229 .intr_enable = t3_phy_lasi_intr_enable,
500 .intr_enable = ael2005_intr_enable,
806 .intr_enable = ael2020_intr_enable,
861 .intr_enable = t3_phy_lasi_intr_enable,
926 .intr_enable = ael1002_intr_noop,
H A Daq100x.c252 .intr_enable = aq100x_intr_enable,
H A Dcommon.h520 int (*intr_enable)(struct cphy *phy); member in struct:cphy_ops
/drivers/net/ethernet/qualcomm/
H A Dqca_spi.c90 u16 intr_enable = (SPI_INT_CPU_ON | local
96 qcaspi_write_register(qca, SPI_REG_INTR_ENABLE, intr_enable);
/drivers/net/ethernet/renesas/
H A Dsh_eth.c1632 unsigned long intr_status, intr_enable; local
1643 intr_enable = sh_eth_read(ndev, EESIPR);
1644 intr_status &= intr_enable | DMAC_M_ECI;
1653 sh_eth_write(ndev, intr_enable & ~EESR_RX_CHECK,
1659 intr_status, intr_enable);
/drivers/scsi/lpfc/
H A Dlpfc_sli4.h562 uint32_t intr_enable; member in struct:lpfc_sli4_hba
/drivers/net/ethernet/3com/
H A D3c59x.c642 u16 intr_enable; member in struct:vortex_private
1717 vp->intr_enable = SetIntrEnb | IntLatch | TxAvailable |
1725 iowrite16(vp->intr_enable, ioaddr + EL3_CMD);
2014 vp->intr_enable &= ~StatsFull;
2020 iowrite16(vp->intr_enable, ioaddr + EL3_CMD);
/drivers/net/ethernet/neterion/vxge/
H A Dvxge-traffic.h175 * @intr_enable: Set to 1, if interrupt is enabled.
235 u32 intr_enable; member in struct:vxge_hw_tim_intr_config
/drivers/tty/
H A Dcyclades.c1330 cy_writel(&ch_ctrl->intr_enable,
1334 cy_writel(&ch_ctrl->intr_enable,
1339 cy_writel(&ch_ctrl->intr_enable,
1343 cy_writel(&ch_ctrl->intr_enable, C_IN_MDCD);

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