Searched refs:mode2 (Results 1 - 16 of 16) sorted by relevance

/drivers/staging/comedi/drivers/
H A Daddi_apci_1032.c48 unsigned int mode2; /* falling-edge/low level channels */ member in struct:apci1032_private
113 devpriv->mode2 = 0;
124 devpriv->mode2 = 0;
128 devpriv->mode2 &= oldmask;
132 devpriv->mode2 |= data[5] << shift;
142 devpriv->mode2 = 0;
146 devpriv->mode2 &= oldmask;
150 devpriv->mode2 |= data[5] << shift;
228 outl(devpriv->mode2, dev->iobase + APCI1032_MODE2_REG);
H A Daddi_apci_1564.c37 unsigned int mode2; /* falling-edge/low level channels */ member in struct:apci1564_private
229 devpriv->mode2 = 0;
243 devpriv->mode2 = 0;
247 devpriv->mode2 &= oldmask;
251 devpriv->mode2 |= data[5] << shift;
261 devpriv->mode2 = 0;
265 devpriv->mode2 &= oldmask;
269 devpriv->mode2 |= data[5] << shift;
346 outl(devpriv->mode2, devpriv->amcc_iobase + APCI1564_DI_INT_MODE2_REG);
H A Dni_mio_common.c2418 int mode2 = 0; local
2464 mode2 &= ~AI_Pre_Trigger;
2465 mode2 &= ~AI_SC_Initial_Load_Source;
2466 mode2 &= ~AI_SC_Reload_Mode;
2467 ni_stc_writew(dev, mode2, AI_Mode_2_Register);
2536 mode2 |= AI_SI_Reload_Mode(0);
2538 mode2 &= ~AI_SI_Initial_Load_Source;
2539 /* mode2 |= AI_SC_Reload_Mode; */
2540 ni_stc_writew(dev, mode2, AI_Mode_2_Register);
2579 mode2
[all...]
/drivers/pwm/
H A Dpwm-pca9685.c218 int mode2; local
234 regmap_read(pca->regmap, PCA9685_MODE2, &mode2);
237 mode2 |= MODE2_INVRT;
239 mode2 &= ~MODE2_INVRT;
242 mode2 &= ~MODE2_OUTDRV;
244 mode2 |= MODE2_OUTDRV;
246 regmap_write(pca->regmap, PCA9685_MODE2, mode2);
/drivers/mfd/
H A Dssbi.c126 u32 mode2 = ssbi_readl(ssbi, SSBI2_MODE2); local
127 mode2 = SET_SSBI_MODE2_REG_ADDR_15_8(mode2, addr);
128 ssbi_writel(ssbi, mode2, SSBI2_MODE2);
154 u32 mode2 = ssbi_readl(ssbi, SSBI2_MODE2); local
155 mode2 = SET_SSBI_MODE2_REG_ADDR_15_8(mode2, addr);
156 ssbi_writel(ssbi, mode2, SSBI2_MODE2);
/drivers/gpu/drm/
H A Ddrm_modes.c851 * @mode2: second mode
853 * Check to see if @mode1 and @mode2 are equivalent.
858 bool drm_mode_equal(const struct drm_display_mode *mode1, const struct drm_display_mode *mode2) argument
862 if (mode1->clock && mode2->clock) {
863 if (KHZ2PICOS(mode1->clock) != KHZ2PICOS(mode2->clock))
865 } else if (mode1->clock != mode2->clock)
869 (mode2->flags & DRM_MODE_FLAG_3D_MASK))
872 return drm_mode_equal_no_clocks_no_stereo(mode1, mode2);
879 * @mode2: second mode
881 * Check to see if @mode1 and @mode2 ar
887 drm_mode_equal_no_clocks_no_stereo(const struct drm_display_mode *mode1, const struct drm_display_mode *mode2) argument
[all...]
/drivers/video/fbdev/core/
H A Dmodedb.c838 * @mode2: second videomode
844 const struct fb_videomode *mode2)
846 return (mode1->xres == mode2->xres &&
847 mode1->yres == mode2->yres &&
848 mode1->pixclock == mode2->pixclock &&
849 mode1->hsync_len == mode2->hsync_len &&
850 mode1->vsync_len == mode2->vsync_len &&
851 mode1->left_margin == mode2->left_margin &&
852 mode1->right_margin == mode2->right_margin &&
853 mode1->upper_margin == mode2
843 fb_mode_is_equal(const struct fb_videomode *mode1, const struct fb_videomode *mode2) argument
[all...]
H A Dfbmem.c951 struct fb_videomode mode1, mode2; local
954 fb_var_to_videomode(&mode2, &info->var);
956 ret = fb_mode_is_equal(&mode1, &mode2);
/drivers/tty/serial/
H A Dsb1250-duart.c265 unsigned int clr = 0, set = 0, mode2; local
278 mode2 = read_sbdchn(sport, R_DUART_MODE_REG_2);
279 mode2 &= ~M_DUART_CHAN_MODE;
281 mode2 |= V_DUART_CHAN_MODE_LCL_LOOP;
283 mode2 |= V_DUART_CHAN_MODE_NORMAL;
287 write_sbdchn(sport, R_DUART_MODE_REG_2, mode2);
546 unsigned int mode1 = 0, mode2 = 0, aux = 0; local
575 mode2 |= M_DUART_STOP_BIT_LEN_2;
577 mode2 |= M_DUART_STOP_BIT_LEN_1;
638 write_sbdchn(sport, R_DUART_MODE_REG_2, mode2 | oldmode
[all...]
/drivers/ide/
H A Dpalm_bk3710.c169 u8 mode2 = mate->pio_mode - XFER_PIO_0; local
171 if (mode2 < mode)
172 mode = mode2;
/drivers/leds/
H A Dleds-pca963x.c160 u8 mode2 = i2c_smbus_read_byte_data(pca963x->chip->client, local
171 if (!(mode2 & PCA963X_MODE2_DMBLNK))
173 mode2 | PCA963X_MODE2_DMBLNK);
/drivers/gpu/drm/radeon/
H A Drs690.c205 struct drm_display_mode *mode2)
226 if (mode1 && mode2) {
227 if (mode1->hdisplay > mode2->hdisplay) {
232 } else if (mode2->hdisplay > mode1->hdisplay) {
233 if (mode2->hdisplay > 2560)
241 } else if (mode2) {
203 rs690_line_buffer_adjust(struct radeon_device *rdev, struct drm_display_mode *mode1, struct drm_display_mode *mode2) argument
H A Dr100.c3206 struct drm_display_mode *mode2 = NULL; local
3221 mode2 = &rdev->mode_info.crtcs[1]->base.mode;
3233 if (mode2)
3260 if (mode2) {
3262 pix_clk2.full = dfixed_const(mode2->clock); /* convert to fixed point */
3482 if (critical_point == 0 && mode2 && rdev->family == CHIP_R300) {
3530 if (mode2) {
3532 stop_req = mode2->hdisplay * pixel_bytes2 / 16;
H A Dradeon_asic.h267 struct drm_display_mode *mode2);
/drivers/media/i2c/
H A Dmt9p031.c146 u16 mode2; member in struct:mt9p031
182 u16 value = (mt9p031->mode2 & ~clear) | set;
189 mt9p031->mode2 = value;
1055 mt9p031->mode2 = MT9P031_READ_MODE_2_ROW_BLC;
/drivers/media/usb/gspca/
H A Dgspca.c1120 int w, h, mode, mode2; local
1136 mode2 = gspca_get_mode(gspca_dev, mode,
1138 if (mode2 >= 0)
1139 mode = mode2;

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