Searched refs:offsets (Results 1 - 25 of 42) sorted by relevance

12

/drivers/gpu/drm/vmwgfx/
H A Dsvga_overlay.h124 * Computes the size, pitches and offsets for YUV frames.
130 * Pitches and offsets for the given YUV frame are put in 'pitches'
131 * and 'offsets' respectively. They are both optional though.
142 uint32 *offsets) /* OUT (optional) */
148 if (offsets) {
149 offsets[0] = 0;
163 if (offsets) {
164 offsets[1] = *size;
176 if (offsets) {
177 offsets[
137 VMwareVideoGetAttributes(const SVGAOverlayFormat format, uint32 *width, uint32 *height, uint32 *size, uint32 *pitches, uint32 *offsets) argument
[all...]
H A Dvmwgfx_surface.c262 const struct vmw_surface_offset *cur_offset = &srf->offsets[i];
631 kfree(srf->offsets);
764 srf->offsets = kmalloc(srf->num_sizes * sizeof(*srf->offsets),
786 cur_offset = srf->offsets;
873 kfree(srf->offsets);
1287 srf->offsets = NULL;
/drivers/mtd/tests/
H A Dstresstest.c48 static int *offsets; variable
108 offs = offsets[eb];
113 offs = offsets[eb] = 0;
124 offsets[eb + 1] = 0;
133 offsets[eb++] = mtd->erasesize;
136 offsets[eb] = offs;
202 offsets = kmalloc(ebcnt * sizeof(int), GFP_KERNEL);
203 if (!readbuf || !writebuf || !offsets)
206 offsets[i] = mtd->erasesize;
229 kfree(offsets);
[all...]
/drivers/media/platform/vsp1/
H A Dvsp1_rpf.c92 /* Source size, stride and crop offsets.
94 * The crop offsets correspond to the location of the crop rectangle top
95 * left corner in the plane buffer. Only two offsets are needed, as
105 rpf->offsets[0] = crop->top * format->plane_fmt[0].bytesperline
110 rpf->offsets[1] = crop->top * format->plane_fmt[1].bytesperline
184 buf->addr[0] + rpf->offsets[0]);
187 buf->addr[1] + rpf->offsets[1]);
190 buf->addr[2] + rpf->offsets[1]);
H A Dvsp1_rwpf.h41 unsigned int offsets[2]; member in struct:vsp1_rwpf
/drivers/gpu/drm/sti/
H A Dsti_layer.c106 layer->offsets[i] = fb->offsets[i];
H A Dsti_layer.h84 * @offsets: offset of 'planes'
104 unsigned int offsets[4]; member in struct:sti_layer
/drivers/gpu/drm/msm/
H A Dmsm_fb.c84 i, fb->offsets[i], fb->pitches[i]);
176 + mode_cmd->offsets[i];
/drivers/gpu/drm/shmobile/
H A Dshmob_drm_plane.c54 splane->dma[0] = gem->paddr + fb->offsets[0]
60 splane->dma[1] = gem->paddr + fb->offsets[1]
/drivers/gpu/drm/omapdrm/
H A Domap_fb.c455 if (size > (omap_gem_mmap_size(bos[i]) - mode_cmd->offsets[i])) {
457 bos[i]->size - mode_cmd->offsets[i], size);
463 plane->offset = mode_cmd->offsets[i];
/drivers/gpu/drm/radeon/
H A Dmkregtable.c544 struct list_head offsets; member in struct:table
565 list_add_tail(&offset->list, &t->offsets);
570 INIT_LIST_HEAD(&t->offsets);
611 list_for_each_entry(offset, &t->offsets, list) {
/drivers/lguest/
H A Dcore.c20 #include <asm/asm-offsets.h>
/drivers/lguest/x86/
H A Dswitcher_32.S59 * Which asm-offsets.h had
72 * These constants are coming from struct offsets
81 // And constants extracted from struct offsets
86 #include <asm/asm-offsets.h>
123 // Distilled into asm-offsets.h
/drivers/staging/android/uapi/
H A Dbinder.h52 * between processes. The 'offsets' supplied as part of a binder transaction
53 * contains offsets into the data where these structures occur. The Binder
147 binder_size_t offsets_size; /* number of bytes of offsets */
157 /* offsets from buffer to flat_binder_object structs */
158 binder_uintptr_t offsets; member in struct:binder_transaction_data::__anon6254::__anon6255
/drivers/staging/comedi/drivers/
H A Djr3_pci.h64 /* The six_axis_array structure shows the layout for the offsets and
381 /* Offsets contains the sensor offsets. These values are subtracted from
382 * the sensor data to obtain the decoupled data. The offsets are set a
389 * values when a new transform is applied. So if the offsets are
394 struct six_axis_array offsets; /* offset 0x0088 */ member in struct:jr3_channel
411 * This data has had the offsets removed.
H A Djr3_pci.c484 * Since it takes up to 10 seconds for offsets to
572 set_s16(&channel->offsets.fx, 0);
573 set_s16(&channel->offsets.fy, 0);
574 set_s16(&channel->offsets.fz, 0);
575 set_s16(&channel->offsets.mx, 0);
576 set_s16(&channel->offsets.my, 0);
577 set_s16(&channel->offsets.mz, 0);
/drivers/net/phy/
H A Dat803x.c95 unsigned int i, offsets[] = { local
114 offsets[i]);
/drivers/gpu/drm/armada/
H A Darmada_overlay.c183 sy = obj->dev_addr + fb->offsets[0] + src_y * fb->pitches[0] +
185 su = obj->dev_addr + fb->offsets[1] + src_y * fb->pitches[1] +
187 sv = obj->dev_addr + fb->offsets[2] + src_y * fb->pitches[2] +
/drivers/gpu/drm/
H A Ddrm_fb_cma_helper.c137 + mode_cmd->offsets[i];
198 i, fb->offsets[i], fb->pitches[i]);
/drivers/gpu/drm/rcar-du/
H A Drcar_du_plane.c148 plane->dma[0] = gem->paddr + fb->offsets[0];
152 plane->dma[1] = gem->paddr + fb->offsets[1];
/drivers/net/ethernet/8390/
H A Dmcf8390.c319 static u32 offsets[] = { local
393 ei_local->reg_offset = offsets;
/drivers/acpi/
H A Dbattery.c404 struct acpi_offsets *offsets, int num)
414 if (offsets[i].mode) {
415 u8 *ptr = (u8 *)battery + offsets[i].offset;
426 int *x = (int *)((u8 *)battery + offsets[i].offset);
651 /* Note: the hardcoded offsets below have been extracted from
402 extract_package(struct acpi_battery *battery, union acpi_object *package, struct acpi_offsets *offsets, int num) argument
/drivers/gpu/drm/exynos/
H A Dexynos_drm_fb.c193 * handles[0] = base1, offsets[0] = 0
194 * handles[1] = base1, offsets[1] = Y_size
197 * handles[0] = base1, offsets[0] = 0
198 * handles[1] = base2, offsets[1] = 0
202 * in case of NV12 format, offsets[1] is not 0 and
205 if (mode_cmd->offsets[1] &&
/drivers/gpu/drm/nouveau/dispnv04/
H A Dtvmodesnv17.c361 uint32_t offsets[] = { base, base + 0x1c, base + 0x40, base + 0x5c }; local
365 regs[i][j] = nv_read_ptv(dev, offsets[i]+4*j);
373 uint32_t offsets[] = { base, base + 0x1c, base + 0x40, base + 0x5c }; local
377 nv_write_ptv(dev, offsets[i]+4*j, regs[i][j]);
/drivers/staging/lustre/lustre/llite/
H A Dlloop.c203 loff_t *offsets = pvec->ldp_offsets; local
226 offsets[page_count] = offset;

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