/arch/ |
H A D | Kconfig | 228 the API needed to access registers and stack entries from pt_regs, 275 Support user stack dumps for perf event samples. This needs 276 access to the user stack pointer which is not unified across 352 - it has implemented a stack canary (e.g. __stack_chk_guard) 357 Set when a stack-protector mode is enabled, so that the build 365 This option turns on the "stack-protector" GCC feature. This 367 the stack just before the return address, and validates 376 Disable "stack-protector" GCC feature. 382 Functions will have the stack-protector canary logic added if they 383 have an 8-byte or larger character array on the stack [all...] |
/arch/alpha/include/asm/ |
H A D | thread_info.h | 49 #define init_stack (init_thread_union.stack)
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/arch/alpha/kernel/ |
H A D | process.c | 253 struct switch_stack *childstack, *stack; local 283 stack = ((struct switch_stack *) regs) - 1; 284 *childstack = *stack; 295 /* switch stack follows right below pt_regs: */ 357 * pointer is the 6th saved long on the kernel stack and that the
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H A D | traps.c | 148 unsigned long *stack; local 158 stack = sp; 160 if (((long) stack & (THREAD_SIZE-1)) == 0) 164 printk("%016lx ", *stack++); 737 * Notice that we have (almost) the regular kernel stack layout here,
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/arch/arc/ |
H A D | Kconfig | 382 bool "Enable DWARF specific kernel stack unwind" 388 to get stack backtraces.
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/arch/arc/include/asm/ |
H A D | entry.h | 10 * if we are NOT in user mode, stack is switched to kernel mode. 12 * it's prologue including stack switching from user mode 163 ; Retrieve orig r25 and save it on stack 228 * given a tsk struct, get to the base of it's kernel mode stack 229 * tsk->thread_info is really a PAGE, whose bottom hoists stack 238 /* Go to end of page where stack begins (grows upwards) */ 244 * Switch to Kernel Mode stack if SP points to User Mode stack 247 * Exit : SP is set to kernel mode stack pointer 254 /* User Mode when this happened ? Yes: Proceed to switch stack */ [all...] |
H A D | thread_info.h | 37 * - this struct shares the supervisor stack pages 71 #define init_stack (init_thread_union.stack)
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/arch/arc/kernel/ |
H A D | asm-offsets.c | 21 DEFINE(TASK_THREAD_INFO, offsetof(struct task_struct, stack));
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H A D | entry.S | 150 ;##################### Scratch Mem for IRQ stack switching ############# 255 ; can clobber scratch regs, hence use of stack to stash it 492 ; unwind stack to discard Callee saved Regs
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H A D | head.S | 98 ; setup stack (fp, sp) 101 ; tsk->thread_info is really a PAGE, whose bottom hoists stack 102 GET_TSK_STACK_BASE r9, sp ; r9 = tsk, sp = stack base(output) 122 ; setup stack (fp, sp) 125 ; set it's stack base to tsk->thread_info bottom
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H A D | unwind.c | 12 * full-blown stack unwinding with all the bells and whistles, so there 152 const u8 *stack[MAX_STACK_DEPTH]; member in struct:unwind_state 785 state->stack[state->stackDepth++] = ptr.p8; 794 state->stack[state->stackDepth - 1];
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/arch/arc/mm/ |
H A D | tlbex.S | 50 ; ARC700 Exception Handling doesn't auto-switch stack and it only provides 59 ; [All of this dance is to avoid stack switching for each TLB Miss, since we 157 ; need to switch to kernel mode stack to call error routine 368 ; (stack switching / save the complete reg-file).
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/arch/arm/boot/compressed/ |
H A D | head.S | 219 /* malloc space is above the relocated stack (64k max) */ 224 * With ZBOOT_ROM the bss/stack is non relocatable, 243 * r10 = end of this image, including bss/stack/malloc space if non XIP 246 * sp = stack pointer 267 * let's temporarily move the stack away into the malloc 334 * r10 = end of this image, including bss/stack/malloc space if non XIP 396 /* cache_clean_flush may use the stack, so relocate it */ 418 * sp = stack pointer 430 * Note that the stack pointer has already been fixed up. 492 mov r1, sp @ malloc space above stack [all...] |
H A D | vmlinux.lds.S | 77 . = ALIGN(8); /* the stack must be 64-bit aligned */ 78 .stack : { *(.stack) }
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/arch/arm/common/ |
H A D | bL_switcher.c | 94 * expecting. This is why we need stack isolation. 117 * piece of our thread's stack space which should be fairly lightly used. 119 * at the very bottom of the stack, aligned to a cache line, and indexed 128 void *stack = current_thread_info() + 1; local 129 stack = PTR_ALIGN(stack, L1_CACHE_BYTES); 130 stack += clusterid * STACK_SIZE + STACK_SIZE; 131 call_with_stack(bL_do_switch, (void *)_arg, stack);
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H A D | fiq_glue_setup.c | 55 void *stack; local 56 stack = (void *)__get_free_pages(GFP_KERNEL, THREAD_SIZE_ORDER); 57 if (WARN_ON(!stack)) { 61 per_cpu(fiq_stack, cpu) = stack;
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/arch/arm/crypto/ |
H A D | bsaes-armv7.pl | 1109 ldr $ivp, [ip] @ IV is 1st arg on the stack 1116 @ allocate the key schedule on the stack 1374 ldr $ctr, [ip] @ ctr is 1st arg on the stack 1380 @ allocate the key schedule on the stack 1538 ldr ip, [sp] @ ctr pointer is passed on stack 1556 mov r1, sp @ output on the stack 1627 @ allocate the key schedule on the stack 2041 @ allocate the key schedule on the stack
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H A D | sha1-armv4-large.S | 478 add sp,sp,#80*4 @ "deallocate" stack frame
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/arch/arm/include/asm/ |
H A D | smp.h | 67 void *stack; member in struct:secondary_data 103 * This also gives us the initial stack to use for this CPU.
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H A D | thread_info.h | 90 #define init_stack (init_thread_union.stack)
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/arch/arm/kernel/ |
H A D | entry-armv.S | 156 SPFIX( tst r0, #4 ) @ test original stack alignment 170 @ from the exception stack 175 @ We are now ready to fill in the remaining blanks on the stack: 250 @ it obviously needs free stack space which then will belong to 383 @ from the exception stack 388 @ We are now ready to fill in the remaining blanks on the stack: 405 @ Clear FP to mark the first stack frame 763 ARM( stmia ip!, {r4 - sl, fp, sp, lr} ) @ Store most regs on stack 764 THUMB( stmia ip!, {r4 - sl, fp} ) @ Store most regs on stack 1191 * Handle a FIQ using the SVC stack allowin [all...] |
H A D | entry-common.S | 30 * stack. 474 stmccia sp, {r4, r5} @ and update the stack args 478 add sp, sp, #S_OFF @ restore stack
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H A D | entry-header.S | 20 @ Most of the stack format comes from struct pt_regs, but with 27 * The SWI code relies on the fact that R0 is at the bottom of the stack 61 * automatically saved on the current stack (32 words) before 62 * switching to the exception stack (SP_main). 78 @ exception happend that is either on the main or the process stack. 79 @ Bit 2 of EXC_RETURN stored in the lr register specifies which stack 90 @ Linux expects to have irqs off. Do it here before taking stack space 102 @ calculate the original stack pointer value. 105 @ The cpu might automatically 8-byte align the stack. Bit 9 106 @ of the saved xPSR specifies if stack alignin [all...] |
H A D | head-nommu.S | 126 ldr sp, [r7, #8] @ set up the stack pointer
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H A D | head.S | 393 ldr sp, [r7, #4] @ get secondary_data.stack
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