/drivers/gpu/drm/nouveau/core/core/ |
H A D | enum.c | 32 nouveau_enum_find(const struct nouveau_enum *en, u32 value) argument 35 if (en->value == value) 44 nouveau_enum_print(const struct nouveau_enum *en, u32 value) argument 46 en = nouveau_enum_find(en, value); 50 pr_cont("(unknown enum 0x%08x)", value); 55 nouveau_bitfield_print(const struct nouveau_bitfield *bf, u32 value) argument 58 if (value & bf->mask) { 60 value &= ~bf->mask; 66 if (value) [all...] |
/drivers/net/ethernet/samsung/sxgbe/ |
H A D | sxgbe_xpcs.c | 21 u32 value; local 24 value = readl(priv->ioaddr + XPCS_OFFSET + reg); 26 return value; 40 u32 value; local 42 value = sxgbe_xpcs_read(ndev, SR_PCS_MMD_CONTROL1); 46 sxgbe_xpcs_write(ndev, VR_PCS_MMD_XAUI_MODE_CONTROL, value | BIT(13)); 47 sxgbe_xpcs_write(ndev, SR_PCS_MMD_CONTROL1, value | BIT(11)); 50 value = sxgbe_xpcs_read(ndev, VR_PCS_MMD_DIGITAL_STATUS); 51 } while ((value & XPCS_QSEQ_STATE_MPLLOFF) == XPCS_QSEQ_STATE_STABLE); 53 value 65 int value; local [all...] |
/drivers/media/dvb-core/ |
H A D | dvb_math.h | 28 * computes log2 of a value; the result is shifted left by 24 bits 31 * intlog2(value) = intlog2(value * 2^x) - x * 2^24 37 * @param value The value (must be != 0) 38 * @return log2(value) * 2^24 40 extern unsigned int intlog2(u32 value); 43 * computes log10 of a value; the result is shifted left by 24 bits 46 * intlog10(value) = intlog10(value * 1 [all...] |
/drivers/gpu/drm/i915/ |
H A D | dvo_ns2501.c | 71 uint8_t value; member in struct:ns2501_reg 80 [0] = { .offset = 0x0a, .value = 0x81, }, 81 [1] = { .offset = 0x18, .value = 0x07, }, 82 [2] = { .offset = 0x19, .value = 0x00, }, 83 [3] = { .offset = 0x1a, .value = 0x00, }, 84 [4] = { .offset = 0x1b, .value = 0x11, }, 85 [5] = { .offset = 0x1c, .value = 0x54, }, 86 [6] = { .offset = 0x1d, .value = 0x03, }, 87 [7] = { .offset = 0x1e, .value = 0x02, }, 88 [8] = { .offset = 0xf3, .value [all...] |
/drivers/gpu/drm/nouveau/core/include/core/ |
H A D | enum.h | 5 u32 value; member in struct:nouveau_enum 12 nouveau_enum_find(const struct nouveau_enum *, u32 value); 15 nouveau_enum_print(const struct nouveau_enum *en, u32 value); 22 void nouveau_bitfield_print(const struct nouveau_bitfield *, u32 value);
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/drivers/usb/dwc3/ |
H A D | io.h | 30 u32 value; local 37 value = readl(base + offs); 44 dwc3_trace(trace_dwc3_readl, "addr %p value %08x", 45 base - DWC3_GLOBALS_REGS_START + offset, value); 47 return value; 50 static inline void dwc3_writel(void __iomem *base, u32 offset, u32 value) argument 59 writel(value, base + offs); 66 dwc3_trace(trace_dwc3_writel, "addr %p value %08x", 67 base - DWC3_GLOBALS_REGS_START + offset, value);
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/drivers/net/ethernet/altera/ |
H A D | altera_utils.c | 22 u32 value = csrrd32(ioaddr, offs); local 23 value |= bit_mask; 24 csrwr32(value, ioaddr, offs); 29 u32 value = csrrd32(ioaddr, offs); local 30 value &= ~bit_mask; 31 csrwr32(value, ioaddr, offs); 36 u32 value = csrrd32(ioaddr, offs); local 37 return (value & bit_mask) ? 1 : 0; 42 u32 value = csrrd32(ioaddr, offs); local 43 return (value [all...] |
/drivers/video/fbdev/riva/ |
H A D | nvreg.h | 34 #define SetBF(mask,value) ((value) << (0?mask)) 37 #define MaskAndSetBF(var,mask,value) (var)=(((var)&(~MASKEXPAND(mask)) \ 38 | SetBF(mask,value))) 47 #define DEVICE_WRITE(device,reg,value) DEVICE_ACCESS(device,reg)=(value) 51 #define DEVICE_DEF(device,mask,value) \ 52 SetBF(NV_##device##_##mask,NV_##device##_##mask##_##value) 53 #define DEVICE_VALUE(device,mask,value) SetBF(NV_##device##_##mask,value) [all...] |
/drivers/net/ethernet/sfc/ |
H A D | io.h | 28 * the BIU collects the written value and does not write to the 82 static inline void _efx_writeq(struct efx_nic *efx, __le64 value, argument 85 __raw_writeq((__force u64)value, efx->membase + reg); 93 static inline void _efx_writed(struct efx_nic *efx, __le32 value, argument 96 __raw_writel((__force u32)value, efx->membase + reg); 104 static inline void efx_writeo(struct efx_nic *efx, const efx_oword_t *value, argument 111 EFX_OWORD_VAL(*value)); 115 _efx_writeq(efx, value->u64[0], reg + 0); 116 _efx_writeq(efx, value->u64[1], reg + 8); 118 _efx_writed(efx, value 128 efx_sram_writeq(struct efx_nic *efx, void __iomem *membase, const efx_qword_t *value, unsigned int index) argument 150 efx_writed(struct efx_nic *efx, const efx_dword_t *value, unsigned int reg) argument 162 efx_reado(struct efx_nic *efx, efx_oword_t *value, unsigned int reg) argument 180 efx_sram_readq(struct efx_nic *efx, void __iomem *membase, efx_qword_t *value, unsigned int index) argument 201 efx_readd(struct efx_nic *efx, efx_dword_t *value, unsigned int reg) argument 212 efx_writeo_table(struct efx_nic *efx, const efx_oword_t *value, unsigned int reg, unsigned int index) argument 219 efx_reado_table(struct efx_nic *efx, efx_oword_t *value, unsigned int reg, unsigned int index) argument 233 _efx_writeo_page(struct efx_nic *efx, efx_oword_t *value, unsigned int reg, unsigned int page) argument 262 _efx_writed_page(struct efx_nic *efx, const efx_dword_t *value, unsigned int reg, unsigned int page) argument 282 _efx_writed_page_locked(struct efx_nic *efx, const efx_dword_t *value, unsigned int reg, unsigned int page) argument [all...] |
/drivers/infiniband/hw/ehca/ |
H A D | hipz_fns.h | 50 #define hipz_galpa_store_eq(gal, offset, value) \ 51 hipz_galpa_store(gal, EQTEMM_OFFSET(offset), value) 56 #define hipz_galpa_store_qped(gal, offset, value) \ 57 hipz_galpa_store(gal, QPEDMM_OFFSET(offset), value) 62 #define hipz_galpa_store_mrmw(gal, offset, value) \ 63 hipz_galpa_store(gal, MRMWMM_OFFSET(offset), value)
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/drivers/staging/lustre/include/linux/libcfs/ |
H A D | libcfs_fail.h | 45 int __cfs_fail_check_set(__u32 id, __u32 value, int set); 46 int __cfs_fail_timeout_set(__u32 id, __u32 value, int ms, int set); 77 static inline int cfs_fail_check_set(__u32 id, __u32 value, argument 83 (ret = __cfs_fail_check_set(id, value, set)))) { 86 id, value); 89 id, value); 102 /* If id hit cfs_fail_loc and cfs_fail_val == (-1 or value) return 1, 104 #define CFS_FAIL_CHECK_VALUE(id, value) \ 105 cfs_fail_check_set(id, value, CFS_FAIL_LOC_VALUE, 0) 106 #define CFS_FAIL_CHECK_VALUE_QUIET(id, value) \ 123 cfs_fail_timeout_set(__u32 id, __u32 value, int ms, int set) argument [all...] |
/drivers/gpu/drm/tegra/ |
H A D | sor.c | 74 static inline void tegra_sor_writel(struct tegra_sor *sor, unsigned long value, argument 77 writel(value, sor->regs + (offset << 2)); 83 unsigned long value; local 89 value = SOR_LANE_DRIVE_CURRENT_LANE3(0x40) | 93 tegra_sor_writel(sor, value, SOR_LANE_DRIVE_CURRENT_0); 95 value = SOR_LANE_PREEMPHASIS_LANE3(0x0f) | 99 tegra_sor_writel(sor, value, SOR_LANE_PREEMPHASIS_0); 101 value = SOR_LANE_POST_CURSOR_LANE3(0x00) | 105 tegra_sor_writel(sor, value, SOR_LANE_POST_CURSOR_0); 110 value 202 unsigned long value; local 231 unsigned long value, timeout; local 262 unsigned long value, timeout; local 291 unsigned long value; local 494 unsigned long value; local 916 unsigned long value, timeout; local 965 unsigned long value, timeout; local 1038 unsigned long value; local 1187 u32 value; local 1208 u32 value; local [all...] |
/drivers/staging/gdm724x/ |
H A D | gdm_endian.h | 19 #define Endian16_Swap(value) \ 20 ((((u16)((value) & 0x00FF)) << 8) | \ 21 (((u16)((value) & 0xFF00)) >> 8)) 23 #define Endian32_Swap(value) \ 24 ((((u32)((value) & 0x000000FF)) << 24) | \ 25 (((u32)((value) & 0x0000FF00)) << 8) | \ 26 (((u32)((value) & 0x00FF0000)) >> 8) | \ 27 (((u32)((value) & 0xFF000000)) >> 24))
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/drivers/media/pci/cx25821/ |
H A D | cx25821-medusa-video.c | 38 u32 value = 0; local 77 value = cx25821_i2c_read(&dev->i2c_bus[0], out_ctrl, &tmp); 78 value &= 0xFFFFFF7F; /* clear BLUE_FIELD_EN */ 80 value |= 0x00000080; /* set BLUE_FIELD_EN */ 81 cx25821_i2c_write(&dev->i2c_bus[0], out_ctrl, value); 83 value = cx25821_i2c_read(&dev->i2c_bus[0], out_ctrl_ns, &tmp); 84 value &= 0xFFFFFF7F; 86 value |= 0x00000080; /* set BLUE_FIELD_EN */ 87 cx25821_i2c_write(&dev->i2c_bus[0], out_ctrl_ns, value); 94 u32 value local 229 u32 value = 0, tmp = 0; local 261 u32 value = 0; local 400 u32 value = 0, tmp = 0; local 568 int value = 0; local 589 int value = 0; local 610 int value = 0; local 634 int value = 0; local 664 u32 value = 0, tmp = 0; local [all...] |
H A D | cx25821-gpio.c | 33 u32 value = 0; local 48 value = gpio_register | Set_GPIO_Bit(bit); 50 value = gpio_register & Clear_GPIO_Bit(bit); 52 cx_write(gpio_oe_reg, value); 61 u32 value = 0; local 75 value = cx_read(gpio_reg); 78 value &= Clear_GPIO_Bit(bit); 80 value |= Set_GPIO_Bit(bit); 82 cx_write(gpio_reg, value);
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/drivers/media/pci/cx18/ |
H A D | cx18-alsa-mixer.c | 42 * v4l2_control value /512 indicated dB actual dB reg 0x8d4 78 uinfo->value.integer.min = -96; 79 uinfo->value.integer.max = 8; 80 uinfo->value.integer.step = 1; 93 vctrl.value = dB_to_cx18_av_vol(uctl->value.integer.value[0]); 100 uctl->value.integer.value[0] = cx18_av_vol_to_dB(vctrl.value); [all...] |
/drivers/media/pci/ivtv/ |
H A D | ivtv-alsa-mixer.c | 42 * v4l2_control value /512 indicated dB actual dB reg 0x8d4 78 uinfo->value.integer.min = -96; 79 uinfo->value.integer.max = 8; 80 uinfo->value.integer.step = 1; 93 vctrl.value = dB_to_cx25840_vol(uctl->value.integer.value[0]); 100 uctl->value.integer.value[0] = cx25840_vol_to_dB(vctrl.value); [all...] |
H A D | ivtv-gpio.h | 27 int ivtv_reset_tuner_gpio(void *dev, int component, int cmd, int value);
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/drivers/hid/ |
H A D | hid-lg2ff.c | 48 lg2ff->report->field[0]->value[0] = 0x51; 49 lg2ff->report->field[0]->value[2] = weak; 50 lg2ff->report->field[0]->value[4] = strong; 52 lg2ff->report->field[0]->value[0] = 0xf3; 53 lg2ff->report->field[0]->value[2] = 0x00; 54 lg2ff->report->field[0]->value[4] = 0x00; 88 report->field[0]->value[0] = 0xf3; 89 report->field[0]->value[1] = 0x00; 90 report->field[0]->value[2] = 0x00; 91 report->field[0]->value[ [all...] |
/drivers/staging/lustre/lustre/obdclass/ |
H A D | uuid.c | 49 __u32 value; local 51 LASSERT(nob <= sizeof(value)); 53 for (value = 0; nob > 0; --nob) 54 value = (value << 8) | *((*ptr)++); 55 return value;
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/drivers/media/usb/cx231xx/ |
H A D | cx231xx-avcore.c | 78 u32 value = 0; local 83 cx231xx_send_gpio_cmd(dev, _gpio_direction, (u8 *)&value, 4, 0, 0); 99 u8 value[4] = { 0, 0, 0, 0 }; local 104 0x68, value, 4); 272 u8 value = 0; local 275 status = afe_read_byte(dev, ADC_INPUT_CH1, &value); 276 value &= ~INPUT_SEL_MASK; 277 value |= (ch1_setting - 1) << 4; 278 value &= 0xff; 279 status = afe_write_byte(dev, ADC_INPUT_CH1, value); 626 u32 value = 0; local 1110 u32 value = 0; local 1239 u32 value; local 1269 u8 value[4] = { 0, 0, 0, 0 }; local 1320 u32 value = 0; local 1353 u8 value[4] = { 0, 0, 0, 0 }; local 1439 u8 value = 0; local 1498 u8 value[4] = { 0, 0, 0, 0 }; local 2147 u32 value; local 2166 u32 value = 0; local 2209 u8 value[4] = { 0, 0, 0, 0 }; local 2438 u8 value[4] = { 0, 0, 0, 0 }; local 2465 u8 value[4] = { 0x0, 0x0, 0x0, 0x0 }; local 2490 u8 value[4] = { 0x0, 0x0, 0x0, 0x0 }; local 2516 u32 value = 0; local 2679 u32 value = 0; local 2713 u32 value = 0; local 2864 u8 value = 0; local [all...] |
/drivers/staging/android/ |
H A D | sw_sync.h | 28 u32 value; member in struct:sw_sync_timeline 34 u32 value; member in struct:sw_sync_pt 41 struct sync_pt *sw_sync_pt_create(struct sw_sync_timeline *obj, u32 value); 53 u32 value) 52 sw_sync_pt_create(struct sw_sync_timeline *obj, u32 value) argument
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/drivers/acpi/acpica/ |
H A D | hwregs.c | 55 acpi_hw_read_multiple(u32 *value, 60 acpi_hw_write_multiple(u32 value, 138 * PARAMETERS: value - Where the value is returned 155 acpi_status acpi_hw_read(u32 *value, struct acpi_generic_address *reg) argument 170 /* Initialize entire 32-bit return value to zero */ 172 *value = 0; 182 *value = (u32)value64; 186 address, value, reg->bit_width); 191 *value, re 212 acpi_hw_write(u32 value, struct acpi_generic_address *reg) argument 369 u32 value = 0; local 462 acpi_hw_register_write(u32 register_id, u32 value) argument 583 acpi_hw_read_multiple(u32 *value, struct acpi_generic_address *register_a, struct acpi_generic_address *register_b) argument 636 acpi_hw_write_multiple(u32 value, struct acpi_generic_address *register_a, struct acpi_generic_address *register_b) argument [all...] |
/drivers/net/ethernet/stmicro/stmmac/ |
H A D | dwmac1000_core.c | 38 u32 value = readl(ioaddr + GMAC_CONTROL); local 39 value |= GMAC_CORE_INIT; 41 value |= GMAC_CONTROL_2K; 43 value |= GMAC_CONTROL_JE; 45 writel(value, ioaddr + GMAC_CONTROL); 59 u32 value = readl(ioaddr + GMAC_CONTROL); local 62 value |= GMAC_CONTROL_IPC; 64 value &= ~GMAC_CONTROL_IPC; 66 writel(value, ioaddr + GMAC_CONTROL); 68 value 135 unsigned int value = 0; local 312 u32 value; local 326 u32 value; local 336 u32 value; local 351 int value = ((tw & 0xffff)) | ((ls & 0x7ff) << 16); local 367 u32 value = GMAC_AN_CTRL_ANE | GMAC_AN_CTRL_ELE; local 378 u32 value = readl(ioaddr + GMAC_ANE_ADV); local [all...] |
/drivers/iio/common/hid-sensors/ |
H A D | hid-sensor-attributes.c | 109 static void convert_from_vtf_format(u32 value, int size, int exp, argument 114 if (value & BIT(size*8 - 1)) { 115 value = ((1LL << (size * 8)) - value); 120 *val1 = sign * value * pow_10(exp); 123 split_micro_fraction(value, -exp, val1, val2); 133 u32 value; local 140 value = abs(val1) * pow_10(-exp); 141 value += abs(val2) / pow_10(6+exp); 143 value 152 s32 value = 0; local 173 s32 value; local 200 s32 value; local 228 s32 value; local 250 s32 value; local [all...] |