Searched defs:instr (Results 1 - 25 of 48) sorted by path

12

/arch/alpha/lib/
H A Dstacktrace.c3 typedef unsigned int instr; typedef
33 (((instr)(INSTR) >= BR_OP) | ((instr)(INSTR) < LDA_OP) | \
34 ((((instr)(INSTR) ^ 0x60000000) < 0x20000000) & \
35 (((instr)(INSTR) & 0x0c000000) != 0)))
47 static instr *
48 display_stored_regs(instr * pro_pc, unsigned char * sp)
50 instr * ret_pc = 0;
60 ret_pc = (instr *)value;
66 static instr *
[all...]
/arch/arc/kernel/
H A Ddisasm.c241 /* still need to check for limm to extract instr len */
263 /* still need to check for limm to extract instr len */
507 struct disasm_state instr; local
509 memset(&instr, 0, sizeof(struct disasm_state));
510 disasm_instr(pc, &instr, 0, regs, cregs);
512 *next_pc = pc + instr.instr_len;
515 if (instr.is_branch)
516 *tgt_if_br = instr.target;
521 if (instr.delay_slot) {
535 return instr
[all...]
/arch/arm/include/asm/
H A Dassembler.h229 #define ALT_SMP(instr...) \
230 9998: instr
234 * ALT_SMP( W(instr) ... )
236 #define ALT_UP(instr...) \
239 9997: instr ;\
251 #define ALT_SMP(instr...)
252 #define ALT_UP(instr...) instr
346 .macro usraccoff, instr, reg, ptr, inc, off, cond, abort, t=TUSER() variable
349 \instr\con
362 .macro usracc, instr, reg, ptr, inc, cond, rept, abort variable
[all...]
/arch/arm/kernel/
H A Dhw_breakpoint.c893 static int debug_reg_trap(struct pt_regs *regs, unsigned int instr) argument
898 instr, cpu);
H A Dkgdb.c149 static int kgdb_brk_fn(struct pt_regs *regs, unsigned int instr) argument
158 static int kgdb_compiled_brk_fn(struct pt_regs *regs, unsigned int instr) argument
H A Dkprobes.c310 static int __kprobes kprobe_trap_handler(struct pt_regs *regs, unsigned int instr) argument
H A Dptrace.c215 static int break_trap(struct pt_regs *regs, unsigned int instr) argument
H A Dswp_emulate.c171 static int swp_handler(struct pt_regs *regs, unsigned int instr) argument
178 res = arm_check_condition(instr, regs->ARM_cpsr);
199 address = regs->uregs[EXTRACT_REG_NUM(instr, RN_OFFSET)];
200 data = regs->uregs[EXTRACT_REG_NUM(instr, RT2_OFFSET)];
201 destreg = EXTRACT_REG_NUM(instr, RT_OFFSET);
203 type = instr & TYPE_SWPB;
206 EXTRACT_REG_NUM(instr, RN_OFFSET), address,
207 destreg, EXTRACT_REG_NUM(instr, RT2_OFFSET), data);
H A Dtraps.c390 static int call_undef_hook(struct pt_regs *regs, unsigned int instr) argument
394 int (*fn)(struct pt_regs *regs, unsigned int instr) = NULL;
398 if ((instr & hook->instr_mask) == hook->instr_val &&
403 return fn ? fn(regs, instr) : 1;
408 unsigned int instr; local
417 instr = __mem_to_opcode_thumb16(((u16 *)pc)[0]);
418 if (is_wide_instruction(instr)) {
421 instr = __opcode_thumb32_compose(instr, inst2);
425 instr
726 get_tp_trap(struct pt_regs *regs, unsigned int instr) argument
767 baddataabort(int code, unsigned long instr, struct pt_regs *regs) argument
[all...]
H A Duprobes.c187 static int uprobe_trap_handler(struct pt_regs *regs, unsigned int instr) argument
192 instr &= 0x0fffffff;
193 if (instr == (UPROBE_SWBP_ARM_INSN & 0x0fffffff))
195 else if (instr == (UPROBE_SS_ARM_INSN & 0x0fffffff))
/arch/arm/lib/
H A Dbacktrace.S115 #define instr r4 define
119 .Ldumpstm: stmfd sp!, {instr, reg, stack, r7, lr}
121 mov instr, r1
125 ARM( tst instr, r3, lsl reg )
127 THUMB( tst instr, r3 )
143 ldmfd sp!, {instr, reg, stack, r7, pc}
H A Dbitops.h5 .macro bitop, name, instr
21 \instr r2, r2, r3
30 .macro testop, name, instr, store variable
48 \instr r2, r2, r3 @ toggle bit
60 .macro bitop, name, instr
71 \instr r2, r2, r3
81 * @instr: operational instruction
87 .macro testop, name, instr, store
98 \instr r2, r2, r0, lsl r3
/arch/arm/mach-integrator/
H A Dpci_v3.c563 unsigned long instr = *(unsigned long *)pc; local
568 addr, fsr, pc, instr, __raw_readl(ap_syscon_base + INTEGRATOR_SC_LBFADDR_OFFSET), __raw_readl(ap_syscon_base + INTEGRATOR_SC_LBFCODE_OFFSET) & 255,
580 if ((instr & 0x0c100000) == 0x04100000) {
581 int reg = (instr >> 12) & 15;
584 if (instr & 0x00400000)
594 if ((instr & 0x0e100090) == 0x00100090) {
595 int reg = (instr >> 12) & 15;
610 unsigned long instr = *(unsigned long *)pc; local
615 "ISTAT=%02x\n", irq, pc, instr,
631 if ((instr
[all...]
/arch/arm/mach-ixp4xx/
H A Dixp4xx_npe.c216 static int __must_check npe_debug_instr(struct npe *npe, u32 instr, u32 ctx, argument
239 npe_cmd_write(npe, ECS_INSTRUCT_REG, CMD_WR_ECS_REG, instr);
263 u32 instr = INSTR_WR_REG_BYTE | /* OpCode */ local
266 (val & ~0x1F) << (18 - 5);/* higher 3 bits to CoProc instr. */
267 return npe_debug_instr(npe, instr, ctx, 1); /* execute it */
274 u32 instr = INSTR_WR_REG_SHORT | /* OpCode */ local
277 (val & ~0x1F) << (18 - 5);/* higher 11 bits to CoProc instr. */
278 return npe_debug_instr(npe, instr, ctx, 1); /* execute it */
/arch/arm/mach-ks8695/
H A Dpci.c195 unsigned long instr = *(unsigned long *)pc; local
215 if ((instr & 0x0c100000) == 0x04100000) {
216 int reg = (instr >> 12) & 15;
219 if (instr & 0x00400000)
229 if ((instr & 0x0e100090) == 0x00100090) {
230 int reg = (instr >> 12) & 15;
/arch/arm/mm/
H A Dalignment.c329 do_alignment_finish_ldst(unsigned long addr, unsigned long instr, struct pt_regs *regs, union offset_union offset) argument
331 if (!LDST_U_BIT(instr))
334 if (!LDST_P_BIT(instr))
337 if (!LDST_P_BIT(instr) || LDST_W_BIT(instr))
338 regs->uregs[RN_BITS(instr)] = addr;
342 do_alignment_ldrhstrh(unsigned long addr, unsigned long instr, struct pt_regs *regs) argument
344 unsigned int rd = RD_BITS(instr);
351 if (LDST_L_BIT(instr)) {
356 if (instr
385 do_alignment_ldrdstrd(unsigned long addr, unsigned long instr, struct pt_regs *regs) argument
441 do_alignment_ldrstr(unsigned long addr, unsigned long instr, struct pt_regs *regs) argument
485 do_alignment_ldmstm(unsigned long addr, unsigned long instr, struct pt_regs *regs) argument
704 unsigned long instr = *pinstr; local
754 unsigned long instr = 0, instrptr; local
[all...]
/arch/arm/plat-iop/
H A Dcp6.c23 static int cp6_trap(struct pt_regs *regs, unsigned int instr) argument
/arch/arm64/kernel/
H A Darmv8_deprecated.c368 static int swp_handler(struct pt_regs *regs, u32 instr) argument
375 type = instr & TYPE_SWPB;
377 switch (arm_check_condition(instr, regs->pstate)) {
390 rn = aarch32_insn_extract_reg_num(instr, A32_RN_OFFSET);
391 rt2 = aarch32_insn_extract_reg_num(instr, A32_RT2_OFFSET);
395 destreg = aarch32_insn_extract_reg_num(instr, A32_RT_OFFSET);
399 aarch32_insn_extract_reg_num(instr, A32_RT2_OFFSET), data);
454 static int cp15barrier_handler(struct pt_regs *regs, u32 instr) argument
458 switch (arm_check_condition(instr, regs->pstate)) {
471 switch (aarch32_insn_mcr_extract_crm(instr)) {
584 a32_setend_handler(struct pt_regs *regs, u32 instr) argument
591 t16_setend_handler(struct pt_regs *regs, u32 instr) argument
[all...]
H A Dtraps.c287 u32 instr; local
288 int (*fn)(struct pt_regs *regs, u32 instr) = NULL;
296 if (get_user(instr, (u16 __user *)pc))
298 instr = le16_to_cpu(instr);
299 if (aarch32_insn_is_wide(instr)) {
305 instr = (instr << 16) | instr2;
309 if (get_user(instr, (u32 __user *)pc))
311 instr
[all...]
/arch/ia64/kernel/
H A Dparavirt_patch.c45 paravirt_flush_i_cache_range(const void *instr, unsigned long size) argument
51 paravirt_fc_i(instr + i);
/arch/microblaze/kernel/
H A Dunwind.c58 * @instr : Microblaze instruction
62 inline long get_frame_size(unsigned long instr) argument
64 return abs((s16)(instr & 0xFFFF));
86 unsigned long instr; local
92 instr = *pc;
95 if ((instr & 0xFFFF0000) != 0x30210000)
98 frame_size = get_frame_size(instr);
/arch/mips/alchemy/devboards/
H A Dpm.c149 const char *instr,
156 tmp = kstrtoul(instr, 0, &l);
163 if (instr[0] != '0')
172 if (instr[0] != '0') {
179 tmp = kstrtoul(instr, 0, &l);
147 db1x_pmattr_store(struct kobject *kobj, struct kobj_attribute *attr, const char *instr, size_t bytes) argument
/arch/mips/kernel/
H A Dtraps.c862 u16 instr[2]; local
874 if ((__get_user(instr[0], (u16 __user *)msk_isa16_mode(epc)) ||
875 (__get_user(instr[1], (u16 __user *)msk_isa16_mode(epc + 2)))))
877 opcode = (instr[0] << 16) | instr[1];
880 if (__get_user(instr[0],
883 bcode = (instr[0] >> 6) & 0x3f;
940 u16 instr[2]; local
950 if (__get_user(instr[0], (u16 __user *)(epc + 0)) ||
951 __get_user(instr[
[all...]
/arch/mips/math-emu/
H A Dcp1emu.c743 ir = dec_insn.next_insn; /* process delay slot instr */
746 ir = dec_insn.insn; /* process current instr */
1862 u16 instr[4]; local
1875 if ((get_user(instr[0], (u16 __user *)msk_isa16_mode(xcp->cp0_epc))) ||
1876 (get_user(instr[1], (u16 __user *)msk_isa16_mode(xcp->cp0_epc + 2))) ||
1877 (get_user(instr[2], (u16 __user *)msk_isa16_mode(xcp->cp0_epc + 4))) ||
1878 (get_user(instr[3], (u16 __user *)msk_isa16_mode(xcp->cp0_epc + 6)))) {
1882 instr_ptr = instr;
H A Ddsemul.c108 u16 instr[2]; local
127 err = __get_user(instr[0], (u16 __user *)(&fr->badinst));
128 err |= __get_user(instr[1], (u16 __user *)((long)(&fr->badinst) + 2));
129 insn = (instr[0] << 16) | instr[1];

Completed in 555 milliseconds

12