Searched refs:section (Results 1 - 25 of 49) sorted by path

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/drivers/acpi/apei/
H A Dapei-internal.h123 #define apei_estatus_for_each_section(estatus, section) \
124 for (section = (struct acpi_hest_generic_data *)(estatus + 1); \
125 (void *)section - (void *)estatus < estatus->data_length; \
126 section = (void *)(section+1) + section->error_data_length)
/drivers/base/
H A Dmemory.c97 /* Validate blk_sz is a power of 2 and not less than section size */
107 * use this as the physical section index that this memsection
122 * Show whether the section of memory is likely to be hot-removable
196 * SPARSEMEM_VMEMMAP. We lookup the page once per section
197 * and assume memmap is contiguous within each section
208 printk(KERN_WARNING "section number %ld page number %d "
521 * section belongs to...
532 struct memory_block *find_memory_block_hinted(struct mem_section *section, argument
535 int block_id = base_memory_block_id(__section_nr(section));
555 struct memory_block *find_memory_block(struct mem_section *section) argument
595 init_memory_block(struct memory_block **memory, struct mem_section *section, unsigned long state) argument
651 register_new_memory(int nid, struct mem_section *section) argument
686 remove_memory_block(unsigned long node_id, struct mem_section *section, int phys_device) argument
705 unregister_memory_section(struct mem_section *section) argument
[all...]
/drivers/crypto/qat/qat_common/
H A Dadf_cfg.c267 * @section_name: Name of the section where the param will be added
272 * Function adds configuration key - value entry in the appropriate section
285 struct adf_cfg_section *section = adf_cfg_sec_find(accel_dev, local
287 if (!section)
312 adf_cfg_keyval_add(key_val, section);
319 * adf_cfg_section_add() - Add config section entry to config table.
321 * @name: Name of the section
323 * Function adds configuration section where key - value entries
351 const char *section, const char *name,
358 ret = adf_cfg_key_val_get(accel_dev, section, nam
350 adf_cfg_get_param_value(struct adf_accel_dev *accel_dev, const char *section, const char *name, char *value) argument
[all...]
H A Dadf_cfg.h85 const char *section, const char *name, char *value);
H A Dadf_ctl_drv.c151 const char *section,
158 if (adf_cfg_add_key_value_param(accel_dev, section,
165 if (adf_cfg_add_key_value_param(accel_dev, section,
180 struct adf_user_cfg_section section, *section_head; local
185 if (copy_from_user(&section, (void __user *)section_head,
187 pr_err("QAT: failed to copy section info\n");
191 if (adf_cfg_section_add(accel_dev, section.name)) {
192 pr_err("QAT: failed to add section.\n");
204 if (adf_add_key_value_data(accel_dev, section.name,
210 section_head = section
150 adf_add_key_value_data(struct adf_accel_dev *accel_dev, const char *section, const struct adf_user_cfg_key_val *key_val) argument
[all...]
H A Dadf_transport.c231 int adf_create_ring(struct adf_accel_dev *accel_dev, const char *section, argument
257 if (adf_cfg_get_param_value(accel_dev, section, ring_name, val)) {
259 section, ring_name);
363 const char *section, const char *format,
371 if (adf_cfg_get_param_value(accel_dev, section, key_buf, val_buf))
380 const char *section, uint32_t bank_num_in_accel)
382 if (adf_get_cfg_int(bank->accel_dev, section,
362 adf_get_cfg_int(struct adf_accel_dev *accel_dev, const char *section, const char *format, uint32_t key, uint32_t *value) argument
379 adf_enable_coalesc(struct adf_etr_bank_data *bank, const char *section, uint32_t bank_num_in_accel) argument
H A Dadf_transport.h56 int adf_create_ring(struct adf_accel_dev *accel_dev, const char *section,
/drivers/edac/
H A DKconfig126 - inject_section (0..3, 16-byte section of 64-byte cacheline),
127 - inject_word (0..8, 16-bit word of 16-byte section),
H A Damd64_edac.h62 * Therefore, comments that refer to a Document section might be off.
116 * (section 3.4.4.1) and DRAM Limit (section 3.4.4.2) registers
124 * section 3.4.8 and the comments in amd64_get_dram_hole_info() and
129 * base address for the node that the SysAddr maps to. See section
140 * See section 3.4.4 for more information.
276 /* Bits [2:1] are used to select 16-byte section within a 64-byte cacheline */
277 #define SET_NB_ARRAY_ADDR(section) (((section) & 0x3) << 1)
311 u32 section; member in struct:error_injection
[all...]
H A Damd64_edac_inj.c9 return sprintf(buf, "0x%x\n", pvt->injection.section);
13 * store error injection section value which refers to one of 4 16-byte sections
32 amd64_warn("%s: invalid section 0x%lx\n", __func__, value);
36 pvt->injection.section = (u32) value;
51 * 16-byte (128-bit + ECC bits) section
124 u32 section, word_bits; local
131 /* Form value to choose 16-byte section of cacheline */
132 section = F10_NB_ARRAY_DRAM | SET_NB_ARRAY_ADDR(pvt->injection.section);
134 amd64_write_pci_cfg(pvt->F3, F10_NB_ARRAY_ADDR, section);
156 u32 section, word_bits, tmp; local
[all...]
H A Di7core_edac.c215 u32 section; member in struct:i7core_inject
689 * i7core inject inject.section
691 * accept and store error injection inject.section value
711 pvt->inject.section = (u32) value;
721 return sprintf(data, "0x%08x\n", pvt->inject.section);
727 * accept and store error injection inject.section value
994 (pvt->inject.section & 0x3) << 1 |
/drivers/gpu/drm/nouveau/core/engine/crypt/fuc/
H A Dnv98.fuc20 .section #nv98_pcrypt_data
97 .section #nv98_pcrypt_code
/drivers/gpu/drm/nouveau/core/engine/graph/fuc/
H A Dgpcgm107.fuc530 .section #gm107_grgpc_data
36 .section #gm107_grgpc_code
H A Dgpcnv108.fuc530 .section #nv108_grgpc_data
36 .section #nv108_grgpc_code
H A Dgpcnvc0.fuc30 .section #nvc0_grgpc_data
36 .section #nvc0_grgpc_code
H A Dgpcnvd7.fuc30 .section #nvd7_grgpc_data
36 .section #nvd7_grgpc_code
H A Dgpcnve0.fuc30 .section #nve0_grgpc_data
36 .section #nve0_grgpc_code
H A Dgpcnvf0.fuc30 .section #nvf0_grgpc_data
36 .section #nvf0_grgpc_code
H A Dhubgm107.fuc528 .section #gm107_grhub_data
34 .section #gm107_grhub_code
H A Dhubnv108.fuc528 .section #nv108_grhub_data
34 .section #nv108_grhub_code
H A Dhubnvc0.fuc28 .section #nvc0_grhub_data
34 .section #nvc0_grhub_code
H A Dhubnvd7.fuc28 .section #nvd7_grhub_data
34 .section #nvd7_grhub_code
H A Dhubnve0.fuc28 .section #nve0_grhub_data
34 .section #nve0_grhub_code
H A Dhubnvf0.fuc28 .section #nvf0_grhub_data
34 .section #nvf0_grhub_code
/drivers/gpu/drm/nouveau/core/subdev/pwr/fuc/
H A Dnv108.fuc35 .section #nv108_pwr_data
59 .section #nv108_pwr_code

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