1/*
2 * Alpha specific irq code.
3 */
4
5#include <linux/init.h>
6#include <linux/sched.h>
7#include <linux/irq.h>
8#include <linux/kernel_stat.h>
9#include <linux/module.h>
10
11#include <asm/machvec.h>
12#include <asm/dma.h>
13#include <asm/perf_event.h>
14#include <asm/mce.h>
15
16#include "proto.h"
17#include "irq_impl.h"
18
19/* Hack minimum IPL during interrupt processing for broken hardware.  */
20#ifdef CONFIG_ALPHA_BROKEN_IRQ_MASK
21int __min_ipl;
22EXPORT_SYMBOL(__min_ipl);
23#endif
24
25/*
26 * Performance counter hook.  A module can override this to
27 * do something useful.
28 */
29static void
30dummy_perf(unsigned long vector, struct pt_regs *regs)
31{
32	irq_err_count++;
33	printk(KERN_CRIT "Performance counter interrupt!\n");
34}
35
36void (*perf_irq)(unsigned long, struct pt_regs *) = dummy_perf;
37EXPORT_SYMBOL(perf_irq);
38
39/*
40 * The main interrupt entry point.
41 */
42
43asmlinkage void
44do_entInt(unsigned long type, unsigned long vector,
45	  unsigned long la_ptr, struct pt_regs *regs)
46{
47	struct pt_regs *old_regs;
48
49	/*
50	 * Disable interrupts during IRQ handling.
51	 * Note that there is no matching local_irq_enable() due to
52	 * severe problems with RTI at IPL0 and some MILO PALcode
53	 * (namely LX164).
54	 */
55	local_irq_disable();
56	switch (type) {
57	case 0:
58#ifdef CONFIG_SMP
59		handle_ipi(regs);
60		return;
61#else
62		irq_err_count++;
63		printk(KERN_CRIT "Interprocessor interrupt? "
64		       "You must be kidding!\n");
65#endif
66		break;
67	case 1:
68		old_regs = set_irq_regs(regs);
69		handle_irq(RTC_IRQ);
70		set_irq_regs(old_regs);
71		return;
72	case 2:
73		old_regs = set_irq_regs(regs);
74		alpha_mv.machine_check(vector, la_ptr);
75		set_irq_regs(old_regs);
76		return;
77	case 3:
78		old_regs = set_irq_regs(regs);
79		alpha_mv.device_interrupt(vector);
80		set_irq_regs(old_regs);
81		return;
82	case 4:
83		perf_irq(la_ptr, regs);
84		return;
85	default:
86		printk(KERN_CRIT "Hardware intr %ld %lx? Huh?\n",
87		       type, vector);
88	}
89	printk(KERN_CRIT "PC = %016lx PS=%04lx\n", regs->pc, regs->ps);
90}
91
92void __init
93common_init_isa_dma(void)
94{
95	outb(0, DMA1_RESET_REG);
96	outb(0, DMA2_RESET_REG);
97	outb(0, DMA1_CLR_MASK_REG);
98	outb(0, DMA2_CLR_MASK_REG);
99}
100
101void __init
102init_IRQ(void)
103{
104	/* Just in case the platform init_irq() causes interrupts/mchecks
105	   (as is the case with RAWHIDE, at least).  */
106	wrent(entInt, 0);
107
108	alpha_mv.init_irq();
109}
110
111/*
112 * machine error checks
113 */
114#define MCHK_K_TPERR           0x0080
115#define MCHK_K_TCPERR          0x0082
116#define MCHK_K_HERR            0x0084
117#define MCHK_K_ECC_C           0x0086
118#define MCHK_K_ECC_NC          0x0088
119#define MCHK_K_OS_BUGCHECK     0x008A
120#define MCHK_K_PAL_BUGCHECK    0x0090
121
122#ifndef CONFIG_SMP
123struct mcheck_info __mcheck_info;
124#endif
125
126void
127process_mcheck_info(unsigned long vector, unsigned long la_ptr,
128		    const char *machine, int expected)
129{
130	struct el_common *mchk_header;
131	const char *reason;
132
133	/*
134	 * See if the machine check is due to a badaddr() and if so,
135	 * ignore it.
136	 */
137
138#ifdef CONFIG_VERBOSE_MCHECK
139	if (alpha_verbose_mcheck > 1) {
140		printk(KERN_CRIT "%s machine check %s\n", machine,
141		       expected ? "expected." : "NOT expected!!!");
142	}
143#endif
144
145	if (expected) {
146		int cpu = smp_processor_id();
147		mcheck_expected(cpu) = 0;
148		mcheck_taken(cpu) = 1;
149		return;
150	}
151
152	mchk_header = (struct el_common *)la_ptr;
153
154	printk(KERN_CRIT "%s machine check: vector=0x%lx pc=0x%lx code=0x%x\n",
155	       machine, vector, get_irq_regs()->pc, mchk_header->code);
156
157	switch (mchk_header->code) {
158	/* Machine check reasons.  Defined according to PALcode sources.  */
159	case 0x80: reason = "tag parity error"; break;
160	case 0x82: reason = "tag control parity error"; break;
161	case 0x84: reason = "generic hard error"; break;
162	case 0x86: reason = "correctable ECC error"; break;
163	case 0x88: reason = "uncorrectable ECC error"; break;
164	case 0x8A: reason = "OS-specific PAL bugcheck"; break;
165	case 0x90: reason = "callsys in kernel mode"; break;
166	case 0x96: reason = "i-cache read retryable error"; break;
167	case 0x98: reason = "processor detected hard error"; break;
168
169	/* System specific (these are for Alcor, at least): */
170	case 0x202: reason = "system detected hard error"; break;
171	case 0x203: reason = "system detected uncorrectable ECC error"; break;
172	case 0x204: reason = "SIO SERR occurred on PCI bus"; break;
173	case 0x205: reason = "parity error detected by core logic"; break;
174	case 0x206: reason = "SIO IOCHK occurred on ISA bus"; break;
175	case 0x207: reason = "non-existent memory error"; break;
176	case 0x208: reason = "MCHK_K_DCSR"; break;
177	case 0x209: reason = "PCI SERR detected"; break;
178	case 0x20b: reason = "PCI data parity error detected"; break;
179	case 0x20d: reason = "PCI address parity error detected"; break;
180	case 0x20f: reason = "PCI master abort error"; break;
181	case 0x211: reason = "PCI target abort error"; break;
182	case 0x213: reason = "scatter/gather PTE invalid error"; break;
183	case 0x215: reason = "flash ROM write error"; break;
184	case 0x217: reason = "IOA timeout detected"; break;
185	case 0x219: reason = "IOCHK#, EISA add-in board parity or other catastrophic error"; break;
186	case 0x21b: reason = "EISA fail-safe timer timeout"; break;
187	case 0x21d: reason = "EISA bus time-out"; break;
188	case 0x21f: reason = "EISA software generated NMI"; break;
189	case 0x221: reason = "unexpected ev5 IRQ[3] interrupt"; break;
190	default: reason = "unknown"; break;
191	}
192
193	printk(KERN_CRIT "machine check type: %s%s\n",
194	       reason, mchk_header->retry ? " (retryable)" : "");
195
196	dik_show_regs(get_irq_regs(), NULL);
197
198#ifdef CONFIG_VERBOSE_MCHECK
199	if (alpha_verbose_mcheck > 1) {
200		/* Dump the logout area to give all info.  */
201		unsigned long *ptr = (unsigned long *)la_ptr;
202		long i;
203		for (i = 0; i < mchk_header->size / sizeof(long); i += 2) {
204			printk(KERN_CRIT "   +%8lx %016lx %016lx\n",
205			       i*sizeof(long), ptr[i], ptr[i+1]);
206		}
207	}
208#endif /* CONFIG_VERBOSE_MCHECK */
209}
210
211/*
212 * The special RTC interrupt type.  The interrupt itself was
213 * processed by PALcode, and comes in via entInt vector 1.
214 */
215
216struct irqaction timer_irqaction = {
217	.handler	= rtc_timer_interrupt,
218	.name		= "timer",
219};
220
221void __init
222init_rtc_irq(void)
223{
224	irq_set_chip_and_handler_name(RTC_IRQ, &dummy_irq_chip,
225				      handle_percpu_irq, "RTC");
226	setup_irq(RTC_IRQ, &timer_irqaction);
227}
228
229/* Dummy irqactions.  */
230struct irqaction isa_cascade_irqaction = {
231	.handler	= no_action,
232	.name		= "isa-cascade"
233};
234
235struct irqaction timer_cascade_irqaction = {
236	.handler	= no_action,
237	.name		= "timer-cascade"
238};
239
240struct irqaction halt_switch_irqaction = {
241	.handler	= no_action,
242	.name		= "halt-switch"
243};
244