1/* 2 * Device Tree file for Marvell RD-AXPWiFiAP. 3 * 4 * Note: this board is shipped with a new generation boot loader that 5 * remaps internal registers at 0xf1000000. Therefore, if earlyprintk 6 * is used, the CONFIG_DEBUG_MVEBU_UART_ALTERNATE option should be 7 * used. 8 * 9 * Copyright (C) 2013 Marvell 10 * 11 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com> 12 * 13 * This file is licensed under the terms of the GNU General Public 14 * License version 2. This program is licensed "as is" without any 15 * warranty of any kind, whether express or implied. 16 */ 17 18/dts-v1/; 19#include <dt-bindings/gpio/gpio.h> 20#include <dt-bindings/input/input.h> 21#include "armada-xp-mv78230.dtsi" 22 23/ { 24 model = "Marvell RD-AXPWiFiAP"; 25 compatible = "marvell,rd-axpwifiap", "marvell,armadaxp-mv78230", "marvell,armadaxp", "marvell,armada-370-xp"; 26 27 chosen { 28 bootargs = "console=ttyS0,115200 earlyprintk"; 29 }; 30 31 memory { 32 device_type = "memory"; 33 reg = <0x00000000 0x00000000 0x00000000 0x40000000>; /* 1GB */ 34 }; 35 36 soc { 37 ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xf1000000 0x100000 38 MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000>; 39 40 pcie-controller { 41 status = "okay"; 42 43 /* First mini-PCIe port */ 44 pcie@1,0 { 45 /* Port 0, Lane 0 */ 46 status = "okay"; 47 }; 48 49 /* Second mini-PCIe port */ 50 pcie@2,0 { 51 /* Port 0, Lane 1 */ 52 status = "okay"; 53 }; 54 55 /* Renesas uPD720202 USB 3.0 controller */ 56 pcie@3,0 { 57 /* Port 0, Lane 3 */ 58 status = "okay"; 59 }; 60 }; 61 62 internal-regs { 63 pinctrl { 64 pinctrl-0 = <&pmx_phy_int>; 65 pinctrl-names = "default"; 66 67 pmx_ge0: pmx-ge0 { 68 marvell,pins = "mpp0", "mpp1", "mpp2", "mpp3", 69 "mpp4", "mpp5", "mpp6", "mpp7", 70 "mpp8", "mpp9", "mpp10", "mpp11"; 71 marvell,function = "ge0"; 72 }; 73 74 pmx_ge1: pmx-ge1 { 75 marvell,pins = "mpp12", "mpp13", "mpp14", "mpp15", 76 "mpp16", "mpp17", "mpp18", "mpp19", 77 "mpp20", "mpp21", "mpp22", "mpp23"; 78 marvell,function = "ge1"; 79 }; 80 81 pmx_keys: pmx-keys { 82 marvell,pins = "mpp33"; 83 marvell,function = "gpio"; 84 }; 85 86 pmx_spi: pmx-spi { 87 marvell,pins = "mpp36", "mpp37", "mpp38", "mpp39"; 88 marvell,function = "spi"; 89 }; 90 91 pmx_phy_int: pmx-phy-int { 92 marvell,pins = "mpp32"; 93 marvell,function = "gpio"; 94 }; 95 }; 96 97 serial@12000 { 98 status = "okay"; 99 }; 100 101 serial@12100 { 102 status = "okay"; 103 }; 104 105 sata@a0000 { 106 nr-ports = <1>; 107 status = "okay"; 108 }; 109 110 mdio { 111 phy0: ethernet-phy@0 { 112 reg = <0>; 113 }; 114 115 phy1: ethernet-phy@1 { 116 reg = <1>; 117 }; 118 }; 119 120 ethernet@70000 { 121 pinctrl-0 = <&pmx_ge0>; 122 pinctrl-names = "default"; 123 status = "okay"; 124 phy = <&phy0>; 125 phy-mode = "rgmii-id"; 126 }; 127 ethernet@74000 { 128 pinctrl-0 = <&pmx_ge1>; 129 pinctrl-names = "default"; 130 status = "okay"; 131 phy = <&phy1>; 132 phy-mode = "rgmii-id"; 133 }; 134 135 spi0: spi@10600 { 136 status = "okay"; 137 pinctrl-0 = <&pmx_spi>; 138 pinctrl-names = "default"; 139 140 spi-flash@0 { 141 #address-cells = <1>; 142 #size-cells = <1>; 143 compatible = "n25q128a13"; 144 reg = <0>; /* Chip select 0 */ 145 spi-max-frequency = <108000000>; 146 }; 147 }; 148 }; 149 }; 150 151 gpio_keys { 152 compatible = "gpio-keys"; 153 #address-cells = <1>; 154 #size-cells = <0>; 155 pinctrl-0 = <&pmx_keys>; 156 pinctrl-names = "default"; 157 158 button@1 { 159 label = "Factory Reset Button"; 160 linux,code = <KEY_SETUP>; 161 gpios = <&gpio1 1 GPIO_ACTIVE_LOW>; 162 }; 163 }; 164}; 165