hw_breakpoint.c revision c512de955f0982aafa49d3f00d5643052a6790e5
1f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon/* 2f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon * This program is free software; you can redistribute it and/or modify 3f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon * it under the terms of the GNU General Public License version 2 as 4f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon * published by the Free Software Foundation. 5f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon * 6f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon * This program is distributed in the hope that it will be useful, 7f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon * but WITHOUT ANY WARRANTY; without even the implied warranty of 8f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 9f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon * GNU General Public License for more details. 10f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon * 11f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon * You should have received a copy of the GNU General Public License 12f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon * along with this program; if not, write to the Free Software 13f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. 14f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon * 15f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon * Copyright (C) 2009, 2010 ARM Limited 16f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon * 17f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon * Author: Will Deacon <will.deacon@arm.com> 18f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon */ 19f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon 20f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon/* 21f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon * HW_breakpoint: a unified kernel/user-space hardware breakpoint facility, 22f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon * using the CPU's debug registers. 23f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon */ 24f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon#define pr_fmt(fmt) "hw-breakpoint: " fmt 25f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon 26f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon#include <linux/errno.h> 277e20269647169e7ea08a62bdc4979a3ba32e615cWill Deacon#include <linux/hardirq.h> 28f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon#include <linux/perf_event.h> 29f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon#include <linux/hw_breakpoint.h> 30f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon#include <linux/smp.h> 31f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon 32f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon#include <asm/cacheflush.h> 33f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon#include <asm/cputype.h> 34f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon#include <asm/current.h> 35f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon#include <asm/hw_breakpoint.h> 36f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon#include <asm/kdebug.h> 37f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon#include <asm/system.h> 38f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon#include <asm/traps.h> 39f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon 40f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon/* Breakpoint currently in use for each BRP. */ 41f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deaconstatic DEFINE_PER_CPU(struct perf_event *, bp_on_reg[ARM_MAX_BRP]); 42f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon 43f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon/* Watchpoint currently in use for each WRP. */ 44f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deaconstatic DEFINE_PER_CPU(struct perf_event *, wp_on_reg[ARM_MAX_WRP]); 45f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon 46f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon/* Number of BRP/WRP registers on this CPU. */ 47f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deaconstatic int core_num_brps; 48f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deaconstatic int core_num_wrps; 49f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon 50f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon/* Debug architecture version. */ 51f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deaconstatic u8 debug_arch; 52f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon 53f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon/* Maximum supported watchpoint length. */ 54f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deaconstatic u8 max_watchpoint_len; 55f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon 56f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon#define READ_WB_REG_CASE(OP2, M, VAL) \ 57f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon case ((OP2 << 4) + M): \ 58f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon ARM_DBG_READ(c ## M, OP2, VAL); \ 59f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon break 60f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon 61f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon#define WRITE_WB_REG_CASE(OP2, M, VAL) \ 62f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon case ((OP2 << 4) + M): \ 63f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon ARM_DBG_WRITE(c ## M, OP2, VAL);\ 64f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon break 65f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon 66f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon#define GEN_READ_WB_REG_CASES(OP2, VAL) \ 67f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon READ_WB_REG_CASE(OP2, 0, VAL); \ 68f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon READ_WB_REG_CASE(OP2, 1, VAL); \ 69f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon READ_WB_REG_CASE(OP2, 2, VAL); \ 70f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon READ_WB_REG_CASE(OP2, 3, VAL); \ 71f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon READ_WB_REG_CASE(OP2, 4, VAL); \ 72f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon READ_WB_REG_CASE(OP2, 5, VAL); \ 73f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon READ_WB_REG_CASE(OP2, 6, VAL); \ 74f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon READ_WB_REG_CASE(OP2, 7, VAL); \ 75f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon READ_WB_REG_CASE(OP2, 8, VAL); \ 76f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon READ_WB_REG_CASE(OP2, 9, VAL); \ 77f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon READ_WB_REG_CASE(OP2, 10, VAL); \ 78f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon READ_WB_REG_CASE(OP2, 11, VAL); \ 79f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon READ_WB_REG_CASE(OP2, 12, VAL); \ 80f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon READ_WB_REG_CASE(OP2, 13, VAL); \ 81f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon READ_WB_REG_CASE(OP2, 14, VAL); \ 82f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon READ_WB_REG_CASE(OP2, 15, VAL) 83f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon 84f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon#define GEN_WRITE_WB_REG_CASES(OP2, VAL) \ 85f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon WRITE_WB_REG_CASE(OP2, 0, VAL); \ 86f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon WRITE_WB_REG_CASE(OP2, 1, VAL); \ 87f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon WRITE_WB_REG_CASE(OP2, 2, VAL); \ 88f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon WRITE_WB_REG_CASE(OP2, 3, VAL); \ 89f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon WRITE_WB_REG_CASE(OP2, 4, VAL); \ 90f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon WRITE_WB_REG_CASE(OP2, 5, VAL); \ 91f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon WRITE_WB_REG_CASE(OP2, 6, VAL); \ 92f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon WRITE_WB_REG_CASE(OP2, 7, VAL); \ 93f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon WRITE_WB_REG_CASE(OP2, 8, VAL); \ 94f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon WRITE_WB_REG_CASE(OP2, 9, VAL); \ 95f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon WRITE_WB_REG_CASE(OP2, 10, VAL); \ 96f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon WRITE_WB_REG_CASE(OP2, 11, VAL); \ 97f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon WRITE_WB_REG_CASE(OP2, 12, VAL); \ 98f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon WRITE_WB_REG_CASE(OP2, 13, VAL); \ 99f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon WRITE_WB_REG_CASE(OP2, 14, VAL); \ 100f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon WRITE_WB_REG_CASE(OP2, 15, VAL) 101f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon 102f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deaconstatic u32 read_wb_reg(int n) 103f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon{ 104f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon u32 val = 0; 105f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon 106f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon switch (n) { 107f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon GEN_READ_WB_REG_CASES(ARM_OP2_BVR, val); 108f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon GEN_READ_WB_REG_CASES(ARM_OP2_BCR, val); 109f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon GEN_READ_WB_REG_CASES(ARM_OP2_WVR, val); 110f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon GEN_READ_WB_REG_CASES(ARM_OP2_WCR, val); 111f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon default: 112f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon pr_warning("attempt to read from unknown breakpoint " 113f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon "register %d\n", n); 114f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon } 115f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon 116f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon return val; 117f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon} 118f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon 119f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deaconstatic void write_wb_reg(int n, u32 val) 120f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon{ 121f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon switch (n) { 122f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon GEN_WRITE_WB_REG_CASES(ARM_OP2_BVR, val); 123f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon GEN_WRITE_WB_REG_CASES(ARM_OP2_BCR, val); 124f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon GEN_WRITE_WB_REG_CASES(ARM_OP2_WVR, val); 125f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon GEN_WRITE_WB_REG_CASES(ARM_OP2_WCR, val); 126f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon default: 127f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon pr_warning("attempt to write to unknown breakpoint " 128f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon "register %d\n", n); 129f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon } 130f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon isb(); 131f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon} 132f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon 1330017ff42ac37ff6aeb87d0b006c5d32b9a39f5fcWill Deacon/* Determine debug architecture. */ 1340017ff42ac37ff6aeb87d0b006c5d32b9a39f5fcWill Deaconstatic u8 get_debug_arch(void) 1350017ff42ac37ff6aeb87d0b006c5d32b9a39f5fcWill Deacon{ 1360017ff42ac37ff6aeb87d0b006c5d32b9a39f5fcWill Deacon u32 didr; 1370017ff42ac37ff6aeb87d0b006c5d32b9a39f5fcWill Deacon 1380017ff42ac37ff6aeb87d0b006c5d32b9a39f5fcWill Deacon /* Do we implement the extended CPUID interface? */ 13966e1cfe6d52c69d317e9df76ebc8538a34af0d51Will Deacon if (WARN_ONCE((((read_cpuid_id() >> 16) & 0xf) != 0xf), 14066e1cfe6d52c69d317e9df76ebc8538a34af0d51Will Deacon "CPUID feature registers not supported. " 14166e1cfe6d52c69d317e9df76ebc8538a34af0d51Will Deacon "Assuming v6 debug is present.\n")) 1420017ff42ac37ff6aeb87d0b006c5d32b9a39f5fcWill Deacon return ARM_DEBUG_ARCH_V6; 1430017ff42ac37ff6aeb87d0b006c5d32b9a39f5fcWill Deacon 1440017ff42ac37ff6aeb87d0b006c5d32b9a39f5fcWill Deacon ARM_DBG_READ(c0, 0, didr); 1450017ff42ac37ff6aeb87d0b006c5d32b9a39f5fcWill Deacon return (didr >> 16) & 0xf; 1460017ff42ac37ff6aeb87d0b006c5d32b9a39f5fcWill Deacon} 1470017ff42ac37ff6aeb87d0b006c5d32b9a39f5fcWill Deacon 1480017ff42ac37ff6aeb87d0b006c5d32b9a39f5fcWill Deaconu8 arch_get_debug_arch(void) 1490017ff42ac37ff6aeb87d0b006c5d32b9a39f5fcWill Deacon{ 1500017ff42ac37ff6aeb87d0b006c5d32b9a39f5fcWill Deacon return debug_arch; 1510017ff42ac37ff6aeb87d0b006c5d32b9a39f5fcWill Deacon} 1520017ff42ac37ff6aeb87d0b006c5d32b9a39f5fcWill Deacon 15366e1cfe6d52c69d317e9df76ebc8538a34af0d51Will Deaconstatic int debug_arch_supported(void) 15466e1cfe6d52c69d317e9df76ebc8538a34af0d51Will Deacon{ 15566e1cfe6d52c69d317e9df76ebc8538a34af0d51Will Deacon u8 arch = get_debug_arch(); 156b5d5b8f98641edac6641af9e19e933083ade603bWill Deacon 157b5d5b8f98641edac6641af9e19e933083ade603bWill Deacon /* We don't support the memory-mapped interface. */ 158b5d5b8f98641edac6641af9e19e933083ade603bWill Deacon return (arch >= ARM_DEBUG_ARCH_V6 && arch <= ARM_DEBUG_ARCH_V7_ECP14) || 159b5d5b8f98641edac6641af9e19e933083ade603bWill Deacon arch >= ARM_DEBUG_ARCH_V7_1; 16066e1cfe6d52c69d317e9df76ebc8538a34af0d51Will Deacon} 16166e1cfe6d52c69d317e9df76ebc8538a34af0d51Will Deacon 162c512de955f0982aafa49d3f00d5643052a6790e5Will Deacon/* Determine number of WRP registers available. */ 163c512de955f0982aafa49d3f00d5643052a6790e5Will Deaconstatic int get_num_wrp_resources(void) 164c512de955f0982aafa49d3f00d5643052a6790e5Will Deacon{ 165c512de955f0982aafa49d3f00d5643052a6790e5Will Deacon u32 didr; 166c512de955f0982aafa49d3f00d5643052a6790e5Will Deacon ARM_DBG_READ(c0, 0, didr); 167c512de955f0982aafa49d3f00d5643052a6790e5Will Deacon return ((didr >> 28) & 0xf) + 1; 168c512de955f0982aafa49d3f00d5643052a6790e5Will Deacon} 169c512de955f0982aafa49d3f00d5643052a6790e5Will Deacon 170c512de955f0982aafa49d3f00d5643052a6790e5Will Deacon/* Determine number of BRP registers available. */ 1710017ff42ac37ff6aeb87d0b006c5d32b9a39f5fcWill Deaconstatic int get_num_brp_resources(void) 1720017ff42ac37ff6aeb87d0b006c5d32b9a39f5fcWill Deacon{ 1730017ff42ac37ff6aeb87d0b006c5d32b9a39f5fcWill Deacon u32 didr; 1740017ff42ac37ff6aeb87d0b006c5d32b9a39f5fcWill Deacon ARM_DBG_READ(c0, 0, didr); 1750017ff42ac37ff6aeb87d0b006c5d32b9a39f5fcWill Deacon return ((didr >> 24) & 0xf) + 1; 1760017ff42ac37ff6aeb87d0b006c5d32b9a39f5fcWill Deacon} 1770017ff42ac37ff6aeb87d0b006c5d32b9a39f5fcWill Deacon 1780017ff42ac37ff6aeb87d0b006c5d32b9a39f5fcWill Deacon/* Does this core support mismatch breakpoints? */ 1790017ff42ac37ff6aeb87d0b006c5d32b9a39f5fcWill Deaconstatic int core_has_mismatch_brps(void) 1800017ff42ac37ff6aeb87d0b006c5d32b9a39f5fcWill Deacon{ 1810017ff42ac37ff6aeb87d0b006c5d32b9a39f5fcWill Deacon return (get_debug_arch() >= ARM_DEBUG_ARCH_V7_ECP14 && 1820017ff42ac37ff6aeb87d0b006c5d32b9a39f5fcWill Deacon get_num_brp_resources() > 1); 1830017ff42ac37ff6aeb87d0b006c5d32b9a39f5fcWill Deacon} 1840017ff42ac37ff6aeb87d0b006c5d32b9a39f5fcWill Deacon 1850017ff42ac37ff6aeb87d0b006c5d32b9a39f5fcWill Deacon/* Determine number of usable WRPs available. */ 1860017ff42ac37ff6aeb87d0b006c5d32b9a39f5fcWill Deaconstatic int get_num_wrps(void) 1870017ff42ac37ff6aeb87d0b006c5d32b9a39f5fcWill Deacon{ 1880017ff42ac37ff6aeb87d0b006c5d32b9a39f5fcWill Deacon /* 189c512de955f0982aafa49d3f00d5643052a6790e5Will Deacon * On debug architectures prior to 7.1, when a watchpoint fires, the 190c512de955f0982aafa49d3f00d5643052a6790e5Will Deacon * only way to work out which watchpoint it was is by disassembling 191c512de955f0982aafa49d3f00d5643052a6790e5Will Deacon * the faulting instruction and working out the address of the memory 192c512de955f0982aafa49d3f00d5643052a6790e5Will Deacon * access. 1930017ff42ac37ff6aeb87d0b006c5d32b9a39f5fcWill Deacon * 1940017ff42ac37ff6aeb87d0b006c5d32b9a39f5fcWill Deacon * Furthermore, we can only do this if the watchpoint was precise 1950017ff42ac37ff6aeb87d0b006c5d32b9a39f5fcWill Deacon * since imprecise watchpoints prevent us from calculating register 1960017ff42ac37ff6aeb87d0b006c5d32b9a39f5fcWill Deacon * based addresses. 1970017ff42ac37ff6aeb87d0b006c5d32b9a39f5fcWill Deacon * 1980017ff42ac37ff6aeb87d0b006c5d32b9a39f5fcWill Deacon * Providing we have more than 1 breakpoint register, we only report 1990017ff42ac37ff6aeb87d0b006c5d32b9a39f5fcWill Deacon * a single watchpoint register for the time being. This way, we always 2000017ff42ac37ff6aeb87d0b006c5d32b9a39f5fcWill Deacon * know which watchpoint fired. In the future we can either add a 2010017ff42ac37ff6aeb87d0b006c5d32b9a39f5fcWill Deacon * disassembler and address generation emulator, or we can insert a 2020017ff42ac37ff6aeb87d0b006c5d32b9a39f5fcWill Deacon * check to see if the DFAR is set on watchpoint exception entry 2030017ff42ac37ff6aeb87d0b006c5d32b9a39f5fcWill Deacon * [the ARM ARM states that the DFAR is UNKNOWN, but experience shows 2040017ff42ac37ff6aeb87d0b006c5d32b9a39f5fcWill Deacon * that it is set on some implementations]. 2050017ff42ac37ff6aeb87d0b006c5d32b9a39f5fcWill Deacon */ 206c512de955f0982aafa49d3f00d5643052a6790e5Will Deacon if (get_debug_arch() < ARM_DEBUG_ARCH_V7_1) 207c512de955f0982aafa49d3f00d5643052a6790e5Will Deacon return 1; 2080017ff42ac37ff6aeb87d0b006c5d32b9a39f5fcWill Deacon 209c512de955f0982aafa49d3f00d5643052a6790e5Will Deacon return get_num_wrp_resources(); 2100017ff42ac37ff6aeb87d0b006c5d32b9a39f5fcWill Deacon} 2110017ff42ac37ff6aeb87d0b006c5d32b9a39f5fcWill Deacon 2120017ff42ac37ff6aeb87d0b006c5d32b9a39f5fcWill Deacon/* Determine number of usable BRPs available. */ 2130017ff42ac37ff6aeb87d0b006c5d32b9a39f5fcWill Deaconstatic int get_num_brps(void) 2140017ff42ac37ff6aeb87d0b006c5d32b9a39f5fcWill Deacon{ 2150017ff42ac37ff6aeb87d0b006c5d32b9a39f5fcWill Deacon int brps = get_num_brp_resources(); 216c512de955f0982aafa49d3f00d5643052a6790e5Will Deacon return core_has_mismatch_brps() ? brps - 1 : brps; 2170017ff42ac37ff6aeb87d0b006c5d32b9a39f5fcWill Deacon} 2180017ff42ac37ff6aeb87d0b006c5d32b9a39f5fcWill Deacon 219f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon/* 220f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon * In order to access the breakpoint/watchpoint control registers, 221f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon * we must be running in debug monitor mode. Unfortunately, we can 222f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon * be put into halting debug mode at any time by an external debugger 223f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon * but there is nothing we can do to prevent that. 224f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon */ 225f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deaconstatic int enable_monitor_mode(void) 226f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon{ 227f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon u32 dscr; 228f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon int ret = 0; 229f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon 230f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon ARM_DBG_READ(c1, 0, dscr); 231f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon 232f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon /* Ensure that halting mode is disabled. */ 2337d85d61f6ad6e2d6a14b5c20369bc9569f634855Stephen Boyd if (WARN_ONCE(dscr & ARM_DSCR_HDBGEN, 2347d85d61f6ad6e2d6a14b5c20369bc9569f634855Stephen Boyd "halting debug mode enabled. Unable to access hardware resources.\n")) { 235f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon ret = -EPERM; 236f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon goto out; 237f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon } 238f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon 2398fbf397c3389c1dedfa9ee412715046ab28fd82dWill Deacon /* If monitor mode is already enabled, just return. */ 2408fbf397c3389c1dedfa9ee412715046ab28fd82dWill Deacon if (dscr & ARM_DSCR_MDBGEN) 2418fbf397c3389c1dedfa9ee412715046ab28fd82dWill Deacon goto out; 2428fbf397c3389c1dedfa9ee412715046ab28fd82dWill Deacon 243f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon /* Write to the corresponding DSCR. */ 2448fbf397c3389c1dedfa9ee412715046ab28fd82dWill Deacon switch (get_debug_arch()) { 245f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon case ARM_DEBUG_ARCH_V6: 246f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon case ARM_DEBUG_ARCH_V6_1: 247f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon ARM_DBG_WRITE(c1, 0, (dscr | ARM_DSCR_MDBGEN)); 248f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon break; 249f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon case ARM_DEBUG_ARCH_V7_ECP14: 250b5d5b8f98641edac6641af9e19e933083ade603bWill Deacon case ARM_DEBUG_ARCH_V7_1: 251f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon ARM_DBG_WRITE(c2, 2, (dscr | ARM_DSCR_MDBGEN)); 252f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon break; 253f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon default: 254f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon ret = -ENODEV; 255f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon goto out; 256f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon } 257f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon 258f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon /* Check that the write made it through. */ 259f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon ARM_DBG_READ(c1, 0, dscr); 2608fbf397c3389c1dedfa9ee412715046ab28fd82dWill Deacon if (!(dscr & ARM_DSCR_MDBGEN)) 261f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon ret = -EPERM; 262f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon 263f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deaconout: 264f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon return ret; 265f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon} 266f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon 2678fbf397c3389c1dedfa9ee412715046ab28fd82dWill Deaconint hw_breakpoint_slots(int type) 2688fbf397c3389c1dedfa9ee412715046ab28fd82dWill Deacon{ 26966e1cfe6d52c69d317e9df76ebc8538a34af0d51Will Deacon if (!debug_arch_supported()) 27066e1cfe6d52c69d317e9df76ebc8538a34af0d51Will Deacon return 0; 27166e1cfe6d52c69d317e9df76ebc8538a34af0d51Will Deacon 2728fbf397c3389c1dedfa9ee412715046ab28fd82dWill Deacon /* 2738fbf397c3389c1dedfa9ee412715046ab28fd82dWill Deacon * We can be called early, so don't rely on 2748fbf397c3389c1dedfa9ee412715046ab28fd82dWill Deacon * our static variables being initialised. 2758fbf397c3389c1dedfa9ee412715046ab28fd82dWill Deacon */ 2768fbf397c3389c1dedfa9ee412715046ab28fd82dWill Deacon switch (type) { 2778fbf397c3389c1dedfa9ee412715046ab28fd82dWill Deacon case TYPE_INST: 2788fbf397c3389c1dedfa9ee412715046ab28fd82dWill Deacon return get_num_brps(); 2798fbf397c3389c1dedfa9ee412715046ab28fd82dWill Deacon case TYPE_DATA: 2808fbf397c3389c1dedfa9ee412715046ab28fd82dWill Deacon return get_num_wrps(); 2818fbf397c3389c1dedfa9ee412715046ab28fd82dWill Deacon default: 2828fbf397c3389c1dedfa9ee412715046ab28fd82dWill Deacon pr_warning("unknown slot type: %d\n", type); 2838fbf397c3389c1dedfa9ee412715046ab28fd82dWill Deacon return 0; 2848fbf397c3389c1dedfa9ee412715046ab28fd82dWill Deacon } 2858fbf397c3389c1dedfa9ee412715046ab28fd82dWill Deacon} 2868fbf397c3389c1dedfa9ee412715046ab28fd82dWill Deacon 287f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon/* 288f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon * Check if 8-bit byte-address select is available. 289f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon * This clobbers WRP 0. 290f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon */ 291f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deaconstatic u8 get_max_wp_len(void) 292f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon{ 293f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon u32 ctrl_reg; 294f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon struct arch_hw_breakpoint_ctrl ctrl; 295f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon u8 size = 4; 296f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon 297f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon if (debug_arch < ARM_DEBUG_ARCH_V7_ECP14) 298f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon goto out; 299f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon 300f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon memset(&ctrl, 0, sizeof(ctrl)); 301f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon ctrl.len = ARM_BREAKPOINT_LEN_8; 302f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon ctrl_reg = encode_ctrl_reg(ctrl); 303f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon 304f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon write_wb_reg(ARM_BASE_WVR, 0); 305f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon write_wb_reg(ARM_BASE_WCR, ctrl_reg); 306f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon if ((read_wb_reg(ARM_BASE_WCR) & ctrl_reg) == ctrl_reg) 307f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon size = 8; 308f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon 309f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deaconout: 310f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon return size; 311f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon} 312f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon 313f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deaconu8 arch_get_max_wp_len(void) 314f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon{ 315f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon return max_watchpoint_len; 316f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon} 317f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon 318f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon/* 319f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon * Install a perf counter breakpoint. 320f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon */ 321f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deaconint arch_install_hw_breakpoint(struct perf_event *bp) 322f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon{ 323f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon struct arch_hw_breakpoint *info = counter_arch_bp(bp); 324f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon struct perf_event **slot, **slots; 325f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon int i, max_slots, ctrl_base, val_base, ret = 0; 32693a04a3416da12647c47840ebe2bb812fcb801d0Will Deacon u32 addr, ctrl; 327f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon 328f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon /* Ensure that we are in monitor mode and halting mode is disabled. */ 329f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon ret = enable_monitor_mode(); 330f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon if (ret) 331f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon goto out; 332f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon 33393a04a3416da12647c47840ebe2bb812fcb801d0Will Deacon addr = info->address; 33493a04a3416da12647c47840ebe2bb812fcb801d0Will Deacon ctrl = encode_ctrl_reg(info->ctrl) | 0x1; 33593a04a3416da12647c47840ebe2bb812fcb801d0Will Deacon 336f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon if (info->ctrl.type == ARM_BREAKPOINT_EXECUTE) { 337f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon /* Breakpoint */ 338f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon ctrl_base = ARM_BASE_BCR; 339f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon val_base = ARM_BASE_BVR; 3404a55c18e2023096c8684fae5fa1cfa96a03172ffWill Deacon slots = (struct perf_event **)__get_cpu_var(bp_on_reg); 3410017ff42ac37ff6aeb87d0b006c5d32b9a39f5fcWill Deacon max_slots = core_num_brps; 3429ebb3cbcc39d4e61ae6751167086acfb5c201e6fWill Deacon if (info->step_ctrl.enabled) { 3439ebb3cbcc39d4e61ae6751167086acfb5c201e6fWill Deacon /* Override the breakpoint data with the step data. */ 3449ebb3cbcc39d4e61ae6751167086acfb5c201e6fWill Deacon addr = info->trigger & ~0x3; 3459ebb3cbcc39d4e61ae6751167086acfb5c201e6fWill Deacon ctrl = encode_ctrl_reg(info->step_ctrl); 3469ebb3cbcc39d4e61ae6751167086acfb5c201e6fWill Deacon } 347f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon } else { 348f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon /* Watchpoint */ 34993a04a3416da12647c47840ebe2bb812fcb801d0Will Deacon if (info->step_ctrl.enabled) { 35093a04a3416da12647c47840ebe2bb812fcb801d0Will Deacon /* Install into the reserved breakpoint region. */ 35193a04a3416da12647c47840ebe2bb812fcb801d0Will Deacon ctrl_base = ARM_BASE_BCR + core_num_brps; 35293a04a3416da12647c47840ebe2bb812fcb801d0Will Deacon val_base = ARM_BASE_BVR + core_num_brps; 35393a04a3416da12647c47840ebe2bb812fcb801d0Will Deacon /* Override the watchpoint data with the step data. */ 35493a04a3416da12647c47840ebe2bb812fcb801d0Will Deacon addr = info->trigger & ~0x3; 35593a04a3416da12647c47840ebe2bb812fcb801d0Will Deacon ctrl = encode_ctrl_reg(info->step_ctrl); 35693a04a3416da12647c47840ebe2bb812fcb801d0Will Deacon } else { 35793a04a3416da12647c47840ebe2bb812fcb801d0Will Deacon ctrl_base = ARM_BASE_WCR; 35893a04a3416da12647c47840ebe2bb812fcb801d0Will Deacon val_base = ARM_BASE_WVR; 35993a04a3416da12647c47840ebe2bb812fcb801d0Will Deacon } 3604a55c18e2023096c8684fae5fa1cfa96a03172ffWill Deacon slots = (struct perf_event **)__get_cpu_var(wp_on_reg); 361f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon max_slots = core_num_wrps; 362f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon } 363f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon 364f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon for (i = 0; i < max_slots; ++i) { 365f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon slot = &slots[i]; 366f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon 367f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon if (!*slot) { 368f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon *slot = bp; 369f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon break; 370f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon } 371f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon } 372f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon 3737d85d61f6ad6e2d6a14b5c20369bc9569f634855Stephen Boyd if (WARN_ONCE(i == max_slots, "Can't find any breakpoint slot\n")) { 374f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon ret = -EBUSY; 375f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon goto out; 376f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon } 377f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon 378f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon /* Setup the address register. */ 37993a04a3416da12647c47840ebe2bb812fcb801d0Will Deacon write_wb_reg(val_base + i, addr); 380f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon 381f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon /* Setup the control register. */ 38293a04a3416da12647c47840ebe2bb812fcb801d0Will Deacon write_wb_reg(ctrl_base + i, ctrl); 383f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon 384f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deaconout: 385f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon return ret; 386f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon} 387f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon 388f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deaconvoid arch_uninstall_hw_breakpoint(struct perf_event *bp) 389f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon{ 390f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon struct arch_hw_breakpoint *info = counter_arch_bp(bp); 391f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon struct perf_event **slot, **slots; 392f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon int i, max_slots, base; 393f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon 394f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon if (info->ctrl.type == ARM_BREAKPOINT_EXECUTE) { 395f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon /* Breakpoint */ 396f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon base = ARM_BASE_BCR; 3974a55c18e2023096c8684fae5fa1cfa96a03172ffWill Deacon slots = (struct perf_event **)__get_cpu_var(bp_on_reg); 3980017ff42ac37ff6aeb87d0b006c5d32b9a39f5fcWill Deacon max_slots = core_num_brps; 399f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon } else { 400f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon /* Watchpoint */ 40193a04a3416da12647c47840ebe2bb812fcb801d0Will Deacon if (info->step_ctrl.enabled) 40293a04a3416da12647c47840ebe2bb812fcb801d0Will Deacon base = ARM_BASE_BCR + core_num_brps; 40393a04a3416da12647c47840ebe2bb812fcb801d0Will Deacon else 40493a04a3416da12647c47840ebe2bb812fcb801d0Will Deacon base = ARM_BASE_WCR; 4054a55c18e2023096c8684fae5fa1cfa96a03172ffWill Deacon slots = (struct perf_event **)__get_cpu_var(wp_on_reg); 406f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon max_slots = core_num_wrps; 407f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon } 408f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon 409f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon /* Remove the breakpoint. */ 410f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon for (i = 0; i < max_slots; ++i) { 411f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon slot = &slots[i]; 412f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon 413f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon if (*slot == bp) { 414f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon *slot = NULL; 415f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon break; 416f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon } 417f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon } 418f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon 4197d85d61f6ad6e2d6a14b5c20369bc9569f634855Stephen Boyd if (WARN_ONCE(i == max_slots, "Can't find any breakpoint slot\n")) 420f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon return; 421f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon 422f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon /* Reset the control register. */ 423f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon write_wb_reg(base + i, 0); 424f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon} 425f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon 426f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deaconstatic int get_hbp_len(u8 hbp_len) 427f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon{ 428f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon unsigned int len_in_bytes = 0; 429f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon 430f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon switch (hbp_len) { 431f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon case ARM_BREAKPOINT_LEN_1: 432f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon len_in_bytes = 1; 433f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon break; 434f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon case ARM_BREAKPOINT_LEN_2: 435f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon len_in_bytes = 2; 436f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon break; 437f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon case ARM_BREAKPOINT_LEN_4: 438f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon len_in_bytes = 4; 439f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon break; 440f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon case ARM_BREAKPOINT_LEN_8: 441f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon len_in_bytes = 8; 442f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon break; 443f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon } 444f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon 445f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon return len_in_bytes; 446f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon} 447f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon 448f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon/* 449f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon * Check whether bp virtual address is in kernel space. 450f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon */ 451f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deaconint arch_check_bp_in_kernelspace(struct perf_event *bp) 452f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon{ 453f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon unsigned int len; 454f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon unsigned long va; 455f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon struct arch_hw_breakpoint *info = counter_arch_bp(bp); 456f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon 457f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon va = info->address; 458f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon len = get_hbp_len(info->ctrl.len); 459f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon 460f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon return (va >= TASK_SIZE) && ((va + len - 1) >= TASK_SIZE); 461f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon} 462f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon 463f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon/* 464f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon * Extract generic type and length encodings from an arch_hw_breakpoint_ctrl. 465f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon * Hopefully this will disappear when ptrace can bypass the conversion 466f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon * to generic breakpoint descriptions. 467f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon */ 468f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deaconint arch_bp_generic_fields(struct arch_hw_breakpoint_ctrl ctrl, 469f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon int *gen_len, int *gen_type) 470f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon{ 471f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon /* Type */ 472f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon switch (ctrl.type) { 473f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon case ARM_BREAKPOINT_EXECUTE: 474f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon *gen_type = HW_BREAKPOINT_X; 475f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon break; 476f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon case ARM_BREAKPOINT_LOAD: 477f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon *gen_type = HW_BREAKPOINT_R; 478f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon break; 479f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon case ARM_BREAKPOINT_STORE: 480f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon *gen_type = HW_BREAKPOINT_W; 481f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon break; 482f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon case ARM_BREAKPOINT_LOAD | ARM_BREAKPOINT_STORE: 483f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon *gen_type = HW_BREAKPOINT_RW; 484f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon break; 485f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon default: 486f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon return -EINVAL; 487f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon } 488f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon 489f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon /* Len */ 490f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon switch (ctrl.len) { 491f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon case ARM_BREAKPOINT_LEN_1: 492f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon *gen_len = HW_BREAKPOINT_LEN_1; 493f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon break; 494f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon case ARM_BREAKPOINT_LEN_2: 495f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon *gen_len = HW_BREAKPOINT_LEN_2; 496f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon break; 497f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon case ARM_BREAKPOINT_LEN_4: 498f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon *gen_len = HW_BREAKPOINT_LEN_4; 499f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon break; 500f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon case ARM_BREAKPOINT_LEN_8: 501f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon *gen_len = HW_BREAKPOINT_LEN_8; 502f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon break; 503f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon default: 504f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon return -EINVAL; 505f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon } 506f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon 507f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon return 0; 508f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon} 509f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon 510f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon/* 511f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon * Construct an arch_hw_breakpoint from a perf_event. 512f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon */ 513f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deaconstatic int arch_build_bp_info(struct perf_event *bp) 514f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon{ 515f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon struct arch_hw_breakpoint *info = counter_arch_bp(bp); 516f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon 517f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon /* Type */ 518f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon switch (bp->attr.bp_type) { 519f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon case HW_BREAKPOINT_X: 520f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon info->ctrl.type = ARM_BREAKPOINT_EXECUTE; 521f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon break; 522f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon case HW_BREAKPOINT_R: 523f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon info->ctrl.type = ARM_BREAKPOINT_LOAD; 524f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon break; 525f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon case HW_BREAKPOINT_W: 526f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon info->ctrl.type = ARM_BREAKPOINT_STORE; 527f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon break; 528f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon case HW_BREAKPOINT_RW: 529f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon info->ctrl.type = ARM_BREAKPOINT_LOAD | ARM_BREAKPOINT_STORE; 530f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon break; 531f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon default: 532f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon return -EINVAL; 533f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon } 534f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon 535f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon /* Len */ 536f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon switch (bp->attr.bp_len) { 537f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon case HW_BREAKPOINT_LEN_1: 538f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon info->ctrl.len = ARM_BREAKPOINT_LEN_1; 539f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon break; 540f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon case HW_BREAKPOINT_LEN_2: 541f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon info->ctrl.len = ARM_BREAKPOINT_LEN_2; 542f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon break; 543f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon case HW_BREAKPOINT_LEN_4: 544f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon info->ctrl.len = ARM_BREAKPOINT_LEN_4; 545f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon break; 546f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon case HW_BREAKPOINT_LEN_8: 547f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon info->ctrl.len = ARM_BREAKPOINT_LEN_8; 548f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon if ((info->ctrl.type != ARM_BREAKPOINT_EXECUTE) 549f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon && max_watchpoint_len >= 8) 550f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon break; 551f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon default: 552f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon return -EINVAL; 553f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon } 554f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon 5556ee33c2712fcdff2568d9bbadb25c8e5a7c36212Will Deacon /* 5566ee33c2712fcdff2568d9bbadb25c8e5a7c36212Will Deacon * Breakpoints must be of length 2 (thumb) or 4 (ARM) bytes. 5576ee33c2712fcdff2568d9bbadb25c8e5a7c36212Will Deacon * Watchpoints can be of length 1, 2, 4 or 8 bytes if supported 5586ee33c2712fcdff2568d9bbadb25c8e5a7c36212Will Deacon * by the hardware and must be aligned to the appropriate number of 5596ee33c2712fcdff2568d9bbadb25c8e5a7c36212Will Deacon * bytes. 5606ee33c2712fcdff2568d9bbadb25c8e5a7c36212Will Deacon */ 5616ee33c2712fcdff2568d9bbadb25c8e5a7c36212Will Deacon if (info->ctrl.type == ARM_BREAKPOINT_EXECUTE && 5626ee33c2712fcdff2568d9bbadb25c8e5a7c36212Will Deacon info->ctrl.len != ARM_BREAKPOINT_LEN_2 && 5636ee33c2712fcdff2568d9bbadb25c8e5a7c36212Will Deacon info->ctrl.len != ARM_BREAKPOINT_LEN_4) 5646ee33c2712fcdff2568d9bbadb25c8e5a7c36212Will Deacon return -EINVAL; 5656ee33c2712fcdff2568d9bbadb25c8e5a7c36212Will Deacon 566f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon /* Address */ 567f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon info->address = bp->attr.bp_addr; 568f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon 569f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon /* Privilege */ 570f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon info->ctrl.privilege = ARM_BREAKPOINT_USER; 57193a04a3416da12647c47840ebe2bb812fcb801d0Will Deacon if (arch_check_bp_in_kernelspace(bp)) 572f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon info->ctrl.privilege |= ARM_BREAKPOINT_PRIV; 573f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon 574f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon /* Enabled? */ 575f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon info->ctrl.enabled = !bp->attr.disabled; 576f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon 577f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon /* Mismatch */ 578f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon info->ctrl.mismatch = 0; 579f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon 580f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon return 0; 581f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon} 582f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon 583f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon/* 584f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon * Validate the arch-specific HW Breakpoint register settings. 585f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon */ 586f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deaconint arch_validate_hwbkpt_settings(struct perf_event *bp) 587f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon{ 588f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon struct arch_hw_breakpoint *info = counter_arch_bp(bp); 589f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon int ret = 0; 5906ee33c2712fcdff2568d9bbadb25c8e5a7c36212Will Deacon u32 offset, alignment_mask = 0x3; 591f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon 592f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon /* Build the arch_hw_breakpoint. */ 593f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon ret = arch_build_bp_info(bp); 594f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon if (ret) 595f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon goto out; 596f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon 597f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon /* Check address alignment. */ 598f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon if (info->ctrl.len == ARM_BREAKPOINT_LEN_8) 599f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon alignment_mask = 0x7; 6006ee33c2712fcdff2568d9bbadb25c8e5a7c36212Will Deacon offset = info->address & alignment_mask; 6016ee33c2712fcdff2568d9bbadb25c8e5a7c36212Will Deacon switch (offset) { 6026ee33c2712fcdff2568d9bbadb25c8e5a7c36212Will Deacon case 0: 6036ee33c2712fcdff2568d9bbadb25c8e5a7c36212Will Deacon /* Aligned */ 6046ee33c2712fcdff2568d9bbadb25c8e5a7c36212Will Deacon break; 6056ee33c2712fcdff2568d9bbadb25c8e5a7c36212Will Deacon case 1: 6066ee33c2712fcdff2568d9bbadb25c8e5a7c36212Will Deacon /* Allow single byte watchpoint. */ 6076ee33c2712fcdff2568d9bbadb25c8e5a7c36212Will Deacon if (info->ctrl.len == ARM_BREAKPOINT_LEN_1) 6086ee33c2712fcdff2568d9bbadb25c8e5a7c36212Will Deacon break; 6096ee33c2712fcdff2568d9bbadb25c8e5a7c36212Will Deacon case 2: 6106ee33c2712fcdff2568d9bbadb25c8e5a7c36212Will Deacon /* Allow halfword watchpoints and breakpoints. */ 6116ee33c2712fcdff2568d9bbadb25c8e5a7c36212Will Deacon if (info->ctrl.len == ARM_BREAKPOINT_LEN_2) 6126ee33c2712fcdff2568d9bbadb25c8e5a7c36212Will Deacon break; 6136ee33c2712fcdff2568d9bbadb25c8e5a7c36212Will Deacon default: 6146ee33c2712fcdff2568d9bbadb25c8e5a7c36212Will Deacon ret = -EINVAL; 6156ee33c2712fcdff2568d9bbadb25c8e5a7c36212Will Deacon goto out; 616f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon } 617f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon 6186ee33c2712fcdff2568d9bbadb25c8e5a7c36212Will Deacon info->address &= ~alignment_mask; 6196ee33c2712fcdff2568d9bbadb25c8e5a7c36212Will Deacon info->ctrl.len <<= offset; 6206ee33c2712fcdff2568d9bbadb25c8e5a7c36212Will Deacon 621f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon /* 622f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon * Currently we rely on an overflow handler to take 623f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon * care of single-stepping the breakpoint when it fires. 624f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon * In the case of userspace breakpoints on a core with V7 debug, 6253ce70b2e24cd35cc9f2df8cf5205b8ab4e6178e1Will Deacon * we can use the mismatch feature as a poor-man's hardware 6263ce70b2e24cd35cc9f2df8cf5205b8ab4e6178e1Will Deacon * single-step, but this only works for per-task breakpoints. 627f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon */ 628f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon if (WARN_ONCE(!bp->overflow_handler && 6293ce70b2e24cd35cc9f2df8cf5205b8ab4e6178e1Will Deacon (arch_check_bp_in_kernelspace(bp) || !core_has_mismatch_brps() 6303ce70b2e24cd35cc9f2df8cf5205b8ab4e6178e1Will Deacon || !bp->hw.bp_target), 6317d85d61f6ad6e2d6a14b5c20369bc9569f634855Stephen Boyd "overflow handler required but none found\n")) { 632f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon ret = -EINVAL; 633f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon } 634f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deaconout: 635f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon return ret; 636f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon} 637f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon 6389ebb3cbcc39d4e61ae6751167086acfb5c201e6fWill Deacon/* 6399ebb3cbcc39d4e61ae6751167086acfb5c201e6fWill Deacon * Enable/disable single-stepping over the breakpoint bp at address addr. 6409ebb3cbcc39d4e61ae6751167086acfb5c201e6fWill Deacon */ 6419ebb3cbcc39d4e61ae6751167086acfb5c201e6fWill Deaconstatic void enable_single_step(struct perf_event *bp, u32 addr) 642f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon{ 6439ebb3cbcc39d4e61ae6751167086acfb5c201e6fWill Deacon struct arch_hw_breakpoint *info = counter_arch_bp(bp); 644f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon 6459ebb3cbcc39d4e61ae6751167086acfb5c201e6fWill Deacon arch_uninstall_hw_breakpoint(bp); 6469ebb3cbcc39d4e61ae6751167086acfb5c201e6fWill Deacon info->step_ctrl.mismatch = 1; 6479ebb3cbcc39d4e61ae6751167086acfb5c201e6fWill Deacon info->step_ctrl.len = ARM_BREAKPOINT_LEN_4; 6489ebb3cbcc39d4e61ae6751167086acfb5c201e6fWill Deacon info->step_ctrl.type = ARM_BREAKPOINT_EXECUTE; 6499ebb3cbcc39d4e61ae6751167086acfb5c201e6fWill Deacon info->step_ctrl.privilege = info->ctrl.privilege; 6509ebb3cbcc39d4e61ae6751167086acfb5c201e6fWill Deacon info->step_ctrl.enabled = 1; 6519ebb3cbcc39d4e61ae6751167086acfb5c201e6fWill Deacon info->trigger = addr; 6529ebb3cbcc39d4e61ae6751167086acfb5c201e6fWill Deacon arch_install_hw_breakpoint(bp); 6539ebb3cbcc39d4e61ae6751167086acfb5c201e6fWill Deacon} 654f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon 6559ebb3cbcc39d4e61ae6751167086acfb5c201e6fWill Deaconstatic void disable_single_step(struct perf_event *bp) 6569ebb3cbcc39d4e61ae6751167086acfb5c201e6fWill Deacon{ 6579ebb3cbcc39d4e61ae6751167086acfb5c201e6fWill Deacon arch_uninstall_hw_breakpoint(bp); 6589ebb3cbcc39d4e61ae6751167086acfb5c201e6fWill Deacon counter_arch_bp(bp)->step_ctrl.enabled = 0; 6599ebb3cbcc39d4e61ae6751167086acfb5c201e6fWill Deacon arch_install_hw_breakpoint(bp); 660f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon} 661f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon 662f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deaconstatic void watchpoint_handler(unsigned long unknown, struct pt_regs *regs) 663f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon{ 664f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon int i; 6654a55c18e2023096c8684fae5fa1cfa96a03172ffWill Deacon struct perf_event *wp, **slots; 666f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon struct arch_hw_breakpoint *info; 667f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon 6684a55c18e2023096c8684fae5fa1cfa96a03172ffWill Deacon slots = (struct perf_event **)__get_cpu_var(wp_on_reg); 6694a55c18e2023096c8684fae5fa1cfa96a03172ffWill Deacon 670f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon /* Without a disassembler, we can only handle 1 watchpoint. */ 671f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon BUG_ON(core_num_wrps > 1); 672f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon 673f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon for (i = 0; i < core_num_wrps; ++i) { 674f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon rcu_read_lock(); 675f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon 67693a04a3416da12647c47840ebe2bb812fcb801d0Will Deacon wp = slots[i]; 67793a04a3416da12647c47840ebe2bb812fcb801d0Will Deacon 67893a04a3416da12647c47840ebe2bb812fcb801d0Will Deacon if (wp == NULL) { 679f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon rcu_read_unlock(); 680f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon continue; 681f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon } 682f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon 683f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon /* 684f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon * The DFAR is an unknown value. Since we only allow a 685f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon * single watchpoint, we can set the trigger to the lowest 686f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon * possible faulting address. 687f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon */ 68893a04a3416da12647c47840ebe2bb812fcb801d0Will Deacon info = counter_arch_bp(wp); 68993a04a3416da12647c47840ebe2bb812fcb801d0Will Deacon info->trigger = wp->attr.bp_addr; 690f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon pr_debug("watchpoint fired: address = 0x%x\n", info->trigger); 69193a04a3416da12647c47840ebe2bb812fcb801d0Will Deacon perf_bp_event(wp, regs); 692f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon 693f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon /* 694f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon * If no overflow handler is present, insert a temporary 695f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon * mismatch breakpoint so we can single-step over the 696f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon * watchpoint trigger. 697f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon */ 6989ebb3cbcc39d4e61ae6751167086acfb5c201e6fWill Deacon if (!wp->overflow_handler) 6999ebb3cbcc39d4e61ae6751167086acfb5c201e6fWill Deacon enable_single_step(wp, instruction_pointer(regs)); 700f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon 701f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon rcu_read_unlock(); 702f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon } 703f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon} 704f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon 70593a04a3416da12647c47840ebe2bb812fcb801d0Will Deaconstatic void watchpoint_single_step_handler(unsigned long pc) 70693a04a3416da12647c47840ebe2bb812fcb801d0Will Deacon{ 70793a04a3416da12647c47840ebe2bb812fcb801d0Will Deacon int i; 7084a55c18e2023096c8684fae5fa1cfa96a03172ffWill Deacon struct perf_event *wp, **slots; 70993a04a3416da12647c47840ebe2bb812fcb801d0Will Deacon struct arch_hw_breakpoint *info; 71093a04a3416da12647c47840ebe2bb812fcb801d0Will Deacon 7114a55c18e2023096c8684fae5fa1cfa96a03172ffWill Deacon slots = (struct perf_event **)__get_cpu_var(wp_on_reg); 7124a55c18e2023096c8684fae5fa1cfa96a03172ffWill Deacon 713c512de955f0982aafa49d3f00d5643052a6790e5Will Deacon for (i = 0; i < core_num_wrps; ++i) { 71493a04a3416da12647c47840ebe2bb812fcb801d0Will Deacon rcu_read_lock(); 71593a04a3416da12647c47840ebe2bb812fcb801d0Will Deacon 71693a04a3416da12647c47840ebe2bb812fcb801d0Will Deacon wp = slots[i]; 71793a04a3416da12647c47840ebe2bb812fcb801d0Will Deacon 71893a04a3416da12647c47840ebe2bb812fcb801d0Will Deacon if (wp == NULL) 71993a04a3416da12647c47840ebe2bb812fcb801d0Will Deacon goto unlock; 72093a04a3416da12647c47840ebe2bb812fcb801d0Will Deacon 72193a04a3416da12647c47840ebe2bb812fcb801d0Will Deacon info = counter_arch_bp(wp); 72293a04a3416da12647c47840ebe2bb812fcb801d0Will Deacon if (!info->step_ctrl.enabled) 72393a04a3416da12647c47840ebe2bb812fcb801d0Will Deacon goto unlock; 72493a04a3416da12647c47840ebe2bb812fcb801d0Will Deacon 72593a04a3416da12647c47840ebe2bb812fcb801d0Will Deacon /* 72693a04a3416da12647c47840ebe2bb812fcb801d0Will Deacon * Restore the original watchpoint if we've completed the 72793a04a3416da12647c47840ebe2bb812fcb801d0Will Deacon * single-step. 72893a04a3416da12647c47840ebe2bb812fcb801d0Will Deacon */ 7299ebb3cbcc39d4e61ae6751167086acfb5c201e6fWill Deacon if (info->trigger != pc) 7309ebb3cbcc39d4e61ae6751167086acfb5c201e6fWill Deacon disable_single_step(wp); 73193a04a3416da12647c47840ebe2bb812fcb801d0Will Deacon 73293a04a3416da12647c47840ebe2bb812fcb801d0Will Deaconunlock: 73393a04a3416da12647c47840ebe2bb812fcb801d0Will Deacon rcu_read_unlock(); 73493a04a3416da12647c47840ebe2bb812fcb801d0Will Deacon } 73593a04a3416da12647c47840ebe2bb812fcb801d0Will Deacon} 73693a04a3416da12647c47840ebe2bb812fcb801d0Will Deacon 737f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deaconstatic void breakpoint_handler(unsigned long unknown, struct pt_regs *regs) 738f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon{ 739f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon int i; 740f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon u32 ctrl_reg, val, addr; 7414a55c18e2023096c8684fae5fa1cfa96a03172ffWill Deacon struct perf_event *bp, **slots; 742f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon struct arch_hw_breakpoint *info; 743f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon struct arch_hw_breakpoint_ctrl ctrl; 744f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon 7454a55c18e2023096c8684fae5fa1cfa96a03172ffWill Deacon slots = (struct perf_event **)__get_cpu_var(bp_on_reg); 7464a55c18e2023096c8684fae5fa1cfa96a03172ffWill Deacon 747f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon /* The exception entry code places the amended lr in the PC. */ 748f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon addr = regs->ARM_pc; 749f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon 75093a04a3416da12647c47840ebe2bb812fcb801d0Will Deacon /* Check the currently installed breakpoints first. */ 75193a04a3416da12647c47840ebe2bb812fcb801d0Will Deacon for (i = 0; i < core_num_brps; ++i) { 752f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon rcu_read_lock(); 753f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon 754f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon bp = slots[i]; 755f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon 7569ebb3cbcc39d4e61ae6751167086acfb5c201e6fWill Deacon if (bp == NULL) 7579ebb3cbcc39d4e61ae6751167086acfb5c201e6fWill Deacon goto unlock; 758f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon 7599ebb3cbcc39d4e61ae6751167086acfb5c201e6fWill Deacon info = counter_arch_bp(bp); 760f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon 761f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon /* Check if the breakpoint value matches. */ 762f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon val = read_wb_reg(ARM_BASE_BVR + i); 763f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon if (val != (addr & ~0x3)) 7649ebb3cbcc39d4e61ae6751167086acfb5c201e6fWill Deacon goto mismatch; 765f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon 766f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon /* Possible match, check the byte address select to confirm. */ 767f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon ctrl_reg = read_wb_reg(ARM_BASE_BCR + i); 768f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon decode_ctrl_reg(ctrl_reg, &ctrl); 769f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon if ((1 << (addr & 0x3)) & ctrl.len) { 770f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon info->trigger = addr; 771f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon pr_debug("breakpoint fired: address = 0x%x\n", addr); 772f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon perf_bp_event(bp, regs); 7739ebb3cbcc39d4e61ae6751167086acfb5c201e6fWill Deacon if (!bp->overflow_handler) 7749ebb3cbcc39d4e61ae6751167086acfb5c201e6fWill Deacon enable_single_step(bp, addr); 7759ebb3cbcc39d4e61ae6751167086acfb5c201e6fWill Deacon goto unlock; 776f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon } 777f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon 7789ebb3cbcc39d4e61ae6751167086acfb5c201e6fWill Deaconmismatch: 7799ebb3cbcc39d4e61ae6751167086acfb5c201e6fWill Deacon /* If we're stepping a breakpoint, it can now be restored. */ 7809ebb3cbcc39d4e61ae6751167086acfb5c201e6fWill Deacon if (info->step_ctrl.enabled) 7819ebb3cbcc39d4e61ae6751167086acfb5c201e6fWill Deacon disable_single_step(bp); 7829ebb3cbcc39d4e61ae6751167086acfb5c201e6fWill Deaconunlock: 783f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon rcu_read_unlock(); 784f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon } 78593a04a3416da12647c47840ebe2bb812fcb801d0Will Deacon 78693a04a3416da12647c47840ebe2bb812fcb801d0Will Deacon /* Handle any pending watchpoint single-step breakpoints. */ 78793a04a3416da12647c47840ebe2bb812fcb801d0Will Deacon watchpoint_single_step_handler(addr); 788f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon} 789f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon 790f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon/* 791f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon * Called from either the Data Abort Handler [watchpoint] or the 79202fe2845d6a837ab02f0738f6cf4591a02cc88d4Russell King * Prefetch Abort Handler [breakpoint] with interrupts disabled. 793f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon */ 794f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deaconstatic int hw_breakpoint_pending(unsigned long addr, unsigned int fsr, 795f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon struct pt_regs *regs) 796f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon{ 7977e20269647169e7ea08a62bdc4979a3ba32e615cWill Deacon int ret = 0; 798f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon u32 dscr; 799f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon 80002fe2845d6a837ab02f0738f6cf4591a02cc88d4Russell King preempt_disable(); 80102fe2845d6a837ab02f0738f6cf4591a02cc88d4Russell King 80202fe2845d6a837ab02f0738f6cf4591a02cc88d4Russell King if (interrupts_enabled(regs)) 80302fe2845d6a837ab02f0738f6cf4591a02cc88d4Russell King local_irq_enable(); 8047e20269647169e7ea08a62bdc4979a3ba32e615cWill Deacon 805f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon /* We only handle watchpoints and hardware breakpoints. */ 806f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon ARM_DBG_READ(c1, 0, dscr); 807f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon 808f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon /* Perform perf callbacks. */ 809f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon switch (ARM_DSCR_MOE(dscr)) { 810f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon case ARM_ENTRY_BREAKPOINT: 811f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon breakpoint_handler(addr, regs); 812f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon break; 813f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon case ARM_ENTRY_ASYNC_WATCHPOINT: 814235584b6f3b71bc1381be13a963a16f7107650cfJoe Perches WARN(1, "Asynchronous watchpoint exception taken. Debugging results may be unreliable\n"); 815f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon case ARM_ENTRY_SYNC_WATCHPOINT: 816f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon watchpoint_handler(addr, regs); 817f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon break; 818f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon default: 8197e20269647169e7ea08a62bdc4979a3ba32e615cWill Deacon ret = 1; /* Unhandled fault. */ 820f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon } 821f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon 8227e20269647169e7ea08a62bdc4979a3ba32e615cWill Deacon preempt_enable(); 8237e20269647169e7ea08a62bdc4979a3ba32e615cWill Deacon 824f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon return ret; 825f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon} 826f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon 827f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon/* 828f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon * One-time initialisation. 829f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon */ 830c09bae709182046ab104757115dfbd74a1ba1a15Will Deaconstatic void reset_ctrl_regs(void *info) 831f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon{ 832c512de955f0982aafa49d3f00d5643052a6790e5Will Deacon int i, raw_num_brps, err = 0, cpu = smp_processor_id(); 833c09bae709182046ab104757115dfbd74a1ba1a15Will Deacon u32 dbg_power; 834c09bae709182046ab104757115dfbd74a1ba1a15Will Deacon cpumask_t *cpumask = info; 835f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon 836ac88e07122fc0eb5cbad403be97ef02c317a06b7Will Deacon /* 837ac88e07122fc0eb5cbad403be97ef02c317a06b7Will Deacon * v7 debug contains save and restore registers so that debug state 838ed19b739c5c76ad241d30f6c6a5ee96fb284f4cfWill Deacon * can be maintained across low-power modes without leaving the debug 839ed19b739c5c76ad241d30f6c6a5ee96fb284f4cfWill Deacon * logic powered up. It is IMPLEMENTATION DEFINED whether we can access 840ed19b739c5c76ad241d30f6c6a5ee96fb284f4cfWill Deacon * the debug registers out of reset, so we must unlock the OS Lock 841ed19b739c5c76ad241d30f6c6a5ee96fb284f4cfWill Deacon * Access Register to avoid taking undefined instruction exceptions 842ed19b739c5c76ad241d30f6c6a5ee96fb284f4cfWill Deacon * later on. 843ac88e07122fc0eb5cbad403be97ef02c317a06b7Will Deacon */ 844b5d5b8f98641edac6641af9e19e933083ade603bWill Deacon switch (debug_arch) { 845b5d5b8f98641edac6641af9e19e933083ade603bWill Deacon case ARM_DEBUG_ARCH_V7_ECP14: 846ac88e07122fc0eb5cbad403be97ef02c317a06b7Will Deacon /* 847c09bae709182046ab104757115dfbd74a1ba1a15Will Deacon * Ensure sticky power-down is clear (i.e. debug logic is 848c09bae709182046ab104757115dfbd74a1ba1a15Will Deacon * powered up). 849c09bae709182046ab104757115dfbd74a1ba1a15Will Deacon */ 850c09bae709182046ab104757115dfbd74a1ba1a15Will Deacon asm volatile("mrc p14, 0, %0, c1, c5, 4" : "=r" (dbg_power)); 851b5d5b8f98641edac6641af9e19e933083ade603bWill Deacon if ((dbg_power & 0x1) == 0) 852b5d5b8f98641edac6641af9e19e933083ade603bWill Deacon err = -EPERM; 853b5d5b8f98641edac6641af9e19e933083ade603bWill Deacon break; 854b5d5b8f98641edac6641af9e19e933083ade603bWill Deacon case ARM_DEBUG_ARCH_V7_1: 855c09bae709182046ab104757115dfbd74a1ba1a15Will Deacon /* 856b5d5b8f98641edac6641af9e19e933083ade603bWill Deacon * Ensure the OS double lock is clear. 857ac88e07122fc0eb5cbad403be97ef02c317a06b7Will Deacon */ 858b5d5b8f98641edac6641af9e19e933083ade603bWill Deacon asm volatile("mrc p14, 0, %0, c1, c3, 4" : "=r" (dbg_power)); 859b5d5b8f98641edac6641af9e19e933083ade603bWill Deacon if ((dbg_power & 0x1) == 1) 860b5d5b8f98641edac6641af9e19e933083ade603bWill Deacon err = -EPERM; 861b5d5b8f98641edac6641af9e19e933083ade603bWill Deacon break; 862b5d5b8f98641edac6641af9e19e933083ade603bWill Deacon } 863e89c0d7090c54d7b11b9b091e495a1ae345dd3ffWill Deacon 864b5d5b8f98641edac6641af9e19e933083ade603bWill Deacon if (err) { 865b5d5b8f98641edac6641af9e19e933083ade603bWill Deacon pr_warning("CPU %d debug is powered down!\n", cpu); 866b5d5b8f98641edac6641af9e19e933083ade603bWill Deacon cpumask_or(cpumask, cpumask, cpumask_of(cpu)); 867b5d5b8f98641edac6641af9e19e933083ade603bWill Deacon return; 868ac88e07122fc0eb5cbad403be97ef02c317a06b7Will Deacon } 869ac88e07122fc0eb5cbad403be97ef02c317a06b7Will Deacon 870b5d5b8f98641edac6641af9e19e933083ade603bWill Deacon /* 871b5d5b8f98641edac6641af9e19e933083ade603bWill Deacon * Unconditionally clear the lock by writing a value 872b5d5b8f98641edac6641af9e19e933083ade603bWill Deacon * other than 0xC5ACCE55 to the access register. 873b5d5b8f98641edac6641af9e19e933083ade603bWill Deacon */ 874b5d5b8f98641edac6641af9e19e933083ade603bWill Deacon asm volatile("mcr p14, 0, %0, c1, c0, 4" : : "r" (0)); 875b5d5b8f98641edac6641af9e19e933083ade603bWill Deacon isb(); 876b5d5b8f98641edac6641af9e19e933083ade603bWill Deacon 877b5d5b8f98641edac6641af9e19e933083ade603bWill Deacon /* 878b5d5b8f98641edac6641af9e19e933083ade603bWill Deacon * Clear any configured vector-catch events before 879b5d5b8f98641edac6641af9e19e933083ade603bWill Deacon * enabling monitor mode. 880b5d5b8f98641edac6641af9e19e933083ade603bWill Deacon */ 881b5d5b8f98641edac6641af9e19e933083ade603bWill Deacon asm volatile("mcr p14, 0, %0, c0, c7, 0" : : "r" (0)); 882b5d5b8f98641edac6641af9e19e933083ade603bWill Deacon isb(); 883b5d5b8f98641edac6641af9e19e933083ade603bWill Deacon 884f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon if (enable_monitor_mode()) 885f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon return; 886f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon 8870017ff42ac37ff6aeb87d0b006c5d32b9a39f5fcWill Deacon /* We must also reset any reserved registers. */ 888c512de955f0982aafa49d3f00d5643052a6790e5Will Deacon raw_num_brps = get_num_brp_resources(); 889c512de955f0982aafa49d3f00d5643052a6790e5Will Deacon for (i = 0; i < raw_num_brps; ++i) { 890f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon write_wb_reg(ARM_BASE_BCR + i, 0UL); 891f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon write_wb_reg(ARM_BASE_BVR + i, 0UL); 892f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon } 893f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon 894f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon for (i = 0; i < core_num_wrps; ++i) { 895f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon write_wb_reg(ARM_BASE_WCR + i, 0UL); 896f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon write_wb_reg(ARM_BASE_WVR + i, 0UL); 897f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon } 898f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon} 899f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon 9007d99331e4793b52d488e911876ef11d843c6c8c9Will Deaconstatic int __cpuinit dbg_reset_notify(struct notifier_block *self, 9017d99331e4793b52d488e911876ef11d843c6c8c9Will Deacon unsigned long action, void *cpu) 9027d99331e4793b52d488e911876ef11d843c6c8c9Will Deacon{ 9037d99331e4793b52d488e911876ef11d843c6c8c9Will Deacon if (action == CPU_ONLINE) 9047d99331e4793b52d488e911876ef11d843c6c8c9Will Deacon smp_call_function_single((int)cpu, reset_ctrl_regs, NULL, 1); 9057d99331e4793b52d488e911876ef11d843c6c8c9Will Deacon return NOTIFY_OK; 9067d99331e4793b52d488e911876ef11d843c6c8c9Will Deacon} 9077d99331e4793b52d488e911876ef11d843c6c8c9Will Deacon 9087d99331e4793b52d488e911876ef11d843c6c8c9Will Deaconstatic struct notifier_block __cpuinitdata dbg_reset_nb = { 9097d99331e4793b52d488e911876ef11d843c6c8c9Will Deacon .notifier_call = dbg_reset_notify, 9107d99331e4793b52d488e911876ef11d843c6c8c9Will Deacon}; 9117d99331e4793b52d488e911876ef11d843c6c8c9Will Deacon 912f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deaconstatic int __init arch_hw_breakpoint_init(void) 913f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon{ 914f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon u32 dscr; 915c09bae709182046ab104757115dfbd74a1ba1a15Will Deacon cpumask_t cpumask = { CPU_BITS_NONE }; 916f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon 917f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon debug_arch = get_debug_arch(); 918f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon 91966e1cfe6d52c69d317e9df76ebc8538a34af0d51Will Deacon if (!debug_arch_supported()) { 920f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon pr_info("debug architecture 0x%x unsupported.\n", debug_arch); 9218fbf397c3389c1dedfa9ee412715046ab28fd82dWill Deacon return 0; 922f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon } 923f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon 924f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon /* Determine how many BRPs/WRPs are available. */ 925f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon core_num_brps = get_num_brps(); 926f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon core_num_wrps = get_num_wrps(); 927f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon 928c512de955f0982aafa49d3f00d5643052a6790e5Will Deacon pr_info("found %d " "%s" "breakpoint and %d watchpoint registers.\n", 929c512de955f0982aafa49d3f00d5643052a6790e5Will Deacon core_num_brps, core_has_mismatch_brps() ? "(+1 reserved) " : 930c512de955f0982aafa49d3f00d5643052a6790e5Will Deacon "", core_num_wrps); 931f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon 932ed19b739c5c76ad241d30f6c6a5ee96fb284f4cfWill Deacon /* 933ed19b739c5c76ad241d30f6c6a5ee96fb284f4cfWill Deacon * Reset the breakpoint resources. We assume that a halting 934ed19b739c5c76ad241d30f6c6a5ee96fb284f4cfWill Deacon * debugger will leave the world in a nice state for us. 935ed19b739c5c76ad241d30f6c6a5ee96fb284f4cfWill Deacon */ 936c09bae709182046ab104757115dfbd74a1ba1a15Will Deacon on_each_cpu(reset_ctrl_regs, &cpumask, 1); 937c09bae709182046ab104757115dfbd74a1ba1a15Will Deacon if (!cpumask_empty(&cpumask)) { 938c09bae709182046ab104757115dfbd74a1ba1a15Will Deacon core_num_brps = 0; 939c09bae709182046ab104757115dfbd74a1ba1a15Will Deacon core_num_wrps = 0; 940c09bae709182046ab104757115dfbd74a1ba1a15Will Deacon return 0; 941c09bae709182046ab104757115dfbd74a1ba1a15Will Deacon } 942ed19b739c5c76ad241d30f6c6a5ee96fb284f4cfWill Deacon 943f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon ARM_DBG_READ(c1, 0, dscr); 944f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon if (dscr & ARM_DSCR_HDBGEN) { 945ed19b739c5c76ad241d30f6c6a5ee96fb284f4cfWill Deacon max_watchpoint_len = 4; 9467d85d61f6ad6e2d6a14b5c20369bc9569f634855Stephen Boyd pr_warning("halting debug mode enabled. Assuming maximum watchpoint size of %u bytes.\n", 9477d85d61f6ad6e2d6a14b5c20369bc9569f634855Stephen Boyd max_watchpoint_len); 948f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon } else { 949ac88e07122fc0eb5cbad403be97ef02c317a06b7Will Deacon /* Work out the maximum supported watchpoint length. */ 950ac88e07122fc0eb5cbad403be97ef02c317a06b7Will Deacon max_watchpoint_len = get_max_wp_len(); 951ac88e07122fc0eb5cbad403be97ef02c317a06b7Will Deacon pr_info("maximum watchpoint size is %u bytes.\n", 952ac88e07122fc0eb5cbad403be97ef02c317a06b7Will Deacon max_watchpoint_len); 953f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon } 954f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon 955f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon /* Register debug fault handler. */ 956f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon hook_fault_code(2, hw_breakpoint_pending, SIGTRAP, TRAP_HWBKPT, 957f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon "watchpoint debug exception"); 958f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon hook_ifault_code(2, hw_breakpoint_pending, SIGTRAP, TRAP_HWBKPT, 959f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon "breakpoint debug exception"); 960f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon 9617d99331e4793b52d488e911876ef11d843c6c8c9Will Deacon /* Register hotplug notifier. */ 9627d99331e4793b52d488e911876ef11d843c6c8c9Will Deacon register_cpu_notifier(&dbg_reset_nb); 9638fbf397c3389c1dedfa9ee412715046ab28fd82dWill Deacon return 0; 964f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon} 965f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deaconarch_initcall(arch_hw_breakpoint_init); 966f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon 967f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deaconvoid hw_breakpoint_pmu_read(struct perf_event *bp) 968f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon{ 969f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon} 970f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon 971f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon/* 972f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon * Dummy function to register with die_notifier. 973f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon */ 974f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deaconint hw_breakpoint_exceptions_notify(struct notifier_block *unused, 975f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon unsigned long val, void *data) 976f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon{ 977f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon return NOTIFY_DONE; 978f81ef4a920c8e1af75adf9f15042c2daa49d3cb3Will Deacon} 979