1/* 2 * Head of the kernel - alter with care 3 * 4 * Copyright (C) 2000, 2001, 2010 Axis Communications AB 5 * 6 */ 7 8#define ASSEMBLER_MACROS_ONLY 9/* The IO_* macros use the ## token concatenation operator, so 10 -traditional must not be used when assembling this file. */ 11#include <arch/sv_addr_ag.h> 12 13#define CRAMFS_MAGIC 0x28cd3d45 14#define RAM_INIT_MAGIC 0x56902387 15#define COMMAND_LINE_MAGIC 0x87109563 16 17#define START_ETHERNET_CLOCK IO_STATE(R_NETWORK_GEN_CONFIG, enable, on) |\ 18 IO_STATE(R_NETWORK_GEN_CONFIG, phy, mii_clk) 19 20 ;; exported symbols 21 22 .globl etrax_irv 23 .globl romfs_start 24 .globl romfs_length 25 .globl romfs_in_flash 26 .globl swapper_pg_dir 27 28 .text 29 30 ;; This is the entry point of the kernel. We are in supervisor mode. 31 ;; 0x00000000 if Flash, 0x40004000 if DRAM 32 ;; since etrax actually starts at address 2 when booting from flash, we 33 ;; put a nop (2 bytes) here first so we dont accidentally skip the di 34 ;; 35 ;; NOTICE! The registers r8 and r9 are used as parameters carrying 36 ;; information from the decompressor (if the kernel was compressed). 37 ;; They should not be used in the code below until read. 38 39 nop 40 di 41 42 ;; First setup the kseg_c mapping from where the kernel is linked 43 ;; to 0x40000000 (where the actual DRAM resides) otherwise 44 ;; we cannot do very much! See arch/cris/README.mm 45 ;; 46 ;; Notice that since we're potentially running at 0x00 or 0x40 right now, 47 ;; we will get a fault as soon as we enable the MMU if we dont 48 ;; temporarily map those segments linearily. 49 ;; 50 ;; Due to a bug in Etrax-100 LX version 1 we need to map the memory 51 ;; slightly different. The bug is that you can't remap bit 31 of 52 ;; an address. Though we can check the version register for 53 ;; whether the bug is present, some constants would then have to 54 ;; be variables, so we don't. The drawback is that you can "only" map 55 ;; 1G per process with CONFIG_CRIS_LOW_MAP. 56 57#ifdef CONFIG_CRIS_LOW_MAP 58 ; kseg mappings, temporary map of 0xc0->0x40 59 move.d IO_FIELD (R_MMU_KBASE_HI, base_c, 4) \ 60 | IO_FIELD (R_MMU_KBASE_HI, base_b, 0xb) \ 61 | IO_FIELD (R_MMU_KBASE_HI, base_9, 9) \ 62 | IO_FIELD (R_MMU_KBASE_HI, base_8, 8), $r0 63 move.d $r0, [R_MMU_KBASE_HI] 64 65 ; temporary map of 0x40->0x40 and 0x60->0x40 66 move.d IO_FIELD (R_MMU_KBASE_LO, base_6, 4) \ 67 | IO_FIELD (R_MMU_KBASE_LO, base_4, 4), $r0 68 move.d $r0, [R_MMU_KBASE_LO] 69 70 ; mmu enable, segs e,c,b,a,6,5,4,0 segment mapped 71 move.d IO_STATE (R_MMU_CONFIG, mmu_enable, enable) \ 72 | IO_STATE (R_MMU_CONFIG, inv_excp, enable) \ 73 | IO_STATE (R_MMU_CONFIG, acc_excp, enable) \ 74 | IO_STATE (R_MMU_CONFIG, we_excp, enable) \ 75 | IO_STATE (R_MMU_CONFIG, seg_f, page) \ 76 | IO_STATE (R_MMU_CONFIG, seg_e, seg) \ 77 | IO_STATE (R_MMU_CONFIG, seg_d, page) \ 78 | IO_STATE (R_MMU_CONFIG, seg_c, seg) \ 79 | IO_STATE (R_MMU_CONFIG, seg_b, seg) \ 80 | IO_STATE (R_MMU_CONFIG, seg_a, seg) \ 81 | IO_STATE (R_MMU_CONFIG, seg_9, page) \ 82 | IO_STATE (R_MMU_CONFIG, seg_8, page) \ 83 | IO_STATE (R_MMU_CONFIG, seg_7, page) \ 84 | IO_STATE (R_MMU_CONFIG, seg_6, seg) \ 85 | IO_STATE (R_MMU_CONFIG, seg_5, seg) \ 86 | IO_STATE (R_MMU_CONFIG, seg_4, seg) \ 87 | IO_STATE (R_MMU_CONFIG, seg_3, page) \ 88 | IO_STATE (R_MMU_CONFIG, seg_2, page) \ 89 | IO_STATE (R_MMU_CONFIG, seg_1, page) \ 90 | IO_STATE (R_MMU_CONFIG, seg_0, seg), $r0 91 move.d $r0, [R_MMU_CONFIG] 92#else 93 ; kseg mappings 94 move.d IO_FIELD (R_MMU_KBASE_HI, base_e, 8) \ 95 | IO_FIELD (R_MMU_KBASE_HI, base_c, 4) \ 96 | IO_FIELD (R_MMU_KBASE_HI, base_b, 0xb), $r0 97 move.d $r0, [R_MMU_KBASE_HI] 98 99 ; temporary map of 0x40->0x40 and 0x00->0x00 100 move.d IO_FIELD (R_MMU_KBASE_LO, base_4, 4), $r0 101 move.d $r0, [R_MMU_KBASE_LO] 102 103 ; mmu enable, segs f,e,c,b,4,0 segment mapped 104 move.d IO_STATE (R_MMU_CONFIG, mmu_enable, enable) \ 105 | IO_STATE (R_MMU_CONFIG, inv_excp, enable) \ 106 | IO_STATE (R_MMU_CONFIG, acc_excp, enable) \ 107 | IO_STATE (R_MMU_CONFIG, we_excp, enable) \ 108 | IO_STATE (R_MMU_CONFIG, seg_f, seg) \ 109 | IO_STATE (R_MMU_CONFIG, seg_e, seg) \ 110 | IO_STATE (R_MMU_CONFIG, seg_d, page) \ 111 | IO_STATE (R_MMU_CONFIG, seg_c, seg) \ 112 | IO_STATE (R_MMU_CONFIG, seg_b, seg) \ 113 | IO_STATE (R_MMU_CONFIG, seg_a, page) \ 114 | IO_STATE (R_MMU_CONFIG, seg_9, page) \ 115 | IO_STATE (R_MMU_CONFIG, seg_8, page) \ 116 | IO_STATE (R_MMU_CONFIG, seg_7, page) \ 117 | IO_STATE (R_MMU_CONFIG, seg_6, page) \ 118 | IO_STATE (R_MMU_CONFIG, seg_5, page) \ 119 | IO_STATE (R_MMU_CONFIG, seg_4, seg) \ 120 | IO_STATE (R_MMU_CONFIG, seg_3, page) \ 121 | IO_STATE (R_MMU_CONFIG, seg_2, page) \ 122 | IO_STATE (R_MMU_CONFIG, seg_1, page) \ 123 | IO_STATE (R_MMU_CONFIG, seg_0, seg), $r0 124 move.d $r0, [R_MMU_CONFIG] 125#endif 126 127 ;; Now we need to sort out the segments and their locations in RAM or 128 ;; Flash. The image in the Flash (or in DRAM) consists of 3 pieces: 129 ;; 1) kernel text, 2) kernel data, 3) ROM filesystem image 130 ;; But the linker has linked the kernel to expect this layout in 131 ;; DRAM memory: 132 ;; 1) kernel text, 2) kernel data, 3) kernel BSS 133 ;; (the location of the ROM filesystem is determined by the krom driver) 134 ;; If we boot this from Flash, we want to keep the ROM filesystem in 135 ;; the flash, we want to copy the text and need to copy the data to DRAM. 136 ;; But if we boot from DRAM, we need to move the ROMFS image 137 ;; from its position after kernel data, to after kernel BSS, BEFORE the 138 ;; kernel starts using the BSS area (since its "overlayed" with the ROMFS) 139 ;; 140 ;; In both cases, we start in un-cached mode, and need to jump into a 141 ;; cached PC after we're done fiddling around with the segments. 142 ;; 143 ;; arch/etrax100/etrax100.ld sets some symbols that define the start 144 ;; and end of each segment. 145 146 ;; Check if we start from DRAM or FLASH by testing PC 147 148 move.d $pc,$r0 149 and.d 0x7fffffff,$r0 ; get rid of the non-cache bit 150 cmp.d 0x10000,$r0 ; arbitrary... just something above this code 151 blo _inflash0 152 nop 153 154 jump _inram ; enter cached ram 155 156 ;; Jumpgate for branches. 157_inflash0: 158 jump _inflash 159 160 ;; Put this in a suitable section where we can reclaim storage 161 ;; after init. 162 .section ".init.text", "ax" 163_inflash: 164#ifdef CONFIG_ETRAX_ETHERNET 165 ;; Start MII clock to make sure it is running when tranceiver is reset 166 move.d START_ETHERNET_CLOCK, $r0 167 move.d $r0, [R_NETWORK_GEN_CONFIG] 168#endif 169 170 ;; Set up waitstates etc according to kernel configuration. 171 move.d CONFIG_ETRAX_DEF_R_WAITSTATES, $r0 172 move.d $r0, [R_WAITSTATES] 173 174 move.d CONFIG_ETRAX_DEF_R_BUS_CONFIG, $r0 175 move.d $r0, [R_BUS_CONFIG] 176 177 ;; We need to initialze DRAM registers before we start using the DRAM 178 179 cmp.d RAM_INIT_MAGIC, $r8 ; Already initialized? 180 beq _dram_init_finished 181 nop 182 183#include "../lib/dram_init.S" 184 185_dram_init_finished: 186 ;; Copy text+data to DRAM 187 ;; This is fragile - the calculation of r4 as the image size depends 188 ;; on that the labels below actually are the first and last positions 189 ;; in the linker-script. 190 ;; 191 ;; Then the locating of the cramfs image depends on the aforementioned 192 ;; image being located in the flash at 0. This is most often not true, 193 ;; thus the following does not work (normally there is a rescue-block 194 ;; between the physical start of the flash and the flash-image start, 195 ;; and when run with compression, the kernel is actually unpacked to 196 ;; DRAM and we never get here in the first place :)) 197 198 moveq 0, $r0 ; source 199 move.d text_start, $r1 ; destination 200 move.d __vmlinux_end, $r2 ; end destination 201 move.d $r2, $r4 202 sub.d $r1, $r4 ; r4=__vmlinux_end in flash, used below 2031: move.w [$r0+], $r3 204 move.w $r3, [$r1+] 205 cmp.d $r2, $r1 206 blo 1b 207 nop 208 209 ;; We keep the cramfs in the flash. 210 ;; There might be none, but that does not matter because 211 ;; we don't do anything than read some bytes here. 212 213 moveq 0, $r0 214 move.d $r0, [romfs_length] ; default if there is no cramfs 215 216 move.d [$r4], $r0 ; cramfs_super.magic 217 cmp.d CRAMFS_MAGIC, $r0 218 bne 1f 219 nop 220 move.d [$r4 + 4], $r0 ; cramfs_super.size 221 move.d $r0, [romfs_length] 222#ifdef CONFIG_CRIS_LOW_MAP 223 add.d 0x50000000, $r4 ; add flash start in virtual memory (cached) 224#else 225 add.d 0xf0000000, $r4 ; add flash start in virtual memory (cached) 226#endif 227 move.d $r4, [romfs_start] 2281: 229 moveq 1, $r0 230 move.d $r0, [romfs_in_flash] 231 232 jump _start_it ; enter code, cached this time 233 234_inram: 235 ;; Move the ROM fs to after BSS end. This assumes that the cramfs 236 ;; second longword contains the length of the cramfs 237 238 moveq 0, $r0 239 move.d $r0, [romfs_length] ; default if there is no cramfs 240 241 ;; The kernel could have been unpacked to DRAM by the loader, but 242 ;; the cramfs image could still be in the Flash directly after the 243 ;; compressed kernel image. The loader passes the address of the 244 ;; byte succeeding the last compressed byte in the flash in the 245 ;; register r9 when starting the kernel. Check if r9 points to a 246 ;; decent cramfs image! 247 ;; (Notice that if this is not booted from the loader, r9 will be 248 ;; garbage but we do sanity checks on it, the chance that it points 249 ;; to a cramfs magic is small.. ) 250 251 cmp.d 0x0ffffff8, $r9 252 bhs _no_romfs_in_flash ; r9 points outside the flash area 253 nop 254 move.d [$r9], $r0 ; cramfs_super.magic 255 cmp.d CRAMFS_MAGIC, $r0 256 bne _no_romfs_in_flash 257 nop 258 move.d [$r9+4], $r0 ; cramfs_super.length 259 move.d $r0, [romfs_length] 260#ifdef CONFIG_CRIS_LOW_MAP 261 add.d 0x50000000, $r9 ; add flash start in virtual memory (cached) 262#else 263 add.d 0xf0000000, $r9 ; add flash start in virtual memory (cached) 264#endif 265 move.d $r9, [romfs_start] 266 267 moveq 1, $r0 268 move.d $r0, [romfs_in_flash] 269 270 jump _start_it ; enter code, cached this time 271 272_no_romfs_in_flash: 273 274 ;; Check if there is a cramfs (magic value). 275 ;; Notice that we check for cramfs magic value - which is 276 ;; the "rom fs" we'll possibly use in 2.4 if not JFFS (which does 277 ;; not need this mechanism anyway) 278 279 move.d __init_end, $r0; the image will be after the end of init 280 move.d [$r0], $r1 ; cramfs assumes same endian on host/target 281 cmp.d CRAMFS_MAGIC, $r1; magic value in cramfs superblock 282 bne 2f 283 nop 284 285 ;; Ok. What is its size ? 286 287 move.d [$r0 + 4], $r2 ; cramfs_super.size (again, no need to swapwb) 288 289 ;; We want to copy it to the end of the BSS 290 291 move.d _end, $r1 292 293 ;; Remember values so cramfs and setup can find this info 294 295 move.d $r1, [romfs_start] ; new romfs location 296 move.d $r2, [romfs_length] 297 298 ;; We need to copy it backwards, since they can be overlapping 299 300 add.d $r2, $r0 301 add.d $r2, $r1 302 303 ;; Go ahead. Make my loop. 304 305 lsrq 1, $r2 ; size is in bytes, we copy words 306 3071: move.w [$r0=$r0-2],$r3 308 move.w $r3,[$r1=$r1-2] 309 subq 1, $r2 310 bne 1b 311 nop 312 3132: 314 ;; Dont worry that the BSS is tainted. It will be cleared later. 315 316 moveq 0, $r0 317 move.d $r0, [romfs_in_flash] 318 319 jump _start_it ; better skip the additional cramfs check below 320 321_start_it: 322 323 ;; Check if kernel command line is supplied 324 cmp.d COMMAND_LINE_MAGIC, $r10 325 bne no_command_line 326 nop 327 328 move.d 256, $r13 329 move.d cris_command_line, $r10 330 or.d 0x80000000, $r11 ; Make it virtual 3311: 332 move.b [$r11+], $r12 333 move.b $r12, [$r10+] 334 subq 1, $r13 335 bne 1b 336 nop 337 338no_command_line: 339 340 ;; the kernel stack is overlayed with the task structure for each 341 ;; task. thus the initial kernel stack is in the same page as the 342 ;; init_task (but starts in the top of the page, size 8192) 343 move.d init_thread_union + 8192, $sp 344 move.d ibr_start,$r0 ; this symbol is set by the linker script 345 move $r0,$ibr 346 move.d $r0,[etrax_irv] ; set the interrupt base register and pointer 347 348 ;; Clear BSS region, from _bss_start to _end 349 350 move.d __bss_start, $r0 351 move.d _end, $r1 3521: clear.d [$r0+] 353 cmp.d $r1, $r0 354 blo 1b 355 nop 356 357#ifdef CONFIG_BLK_DEV_ETRAXIDE 358 ;; disable ATA before enabling it in genconfig below 359 moveq 0,$r0 360 move.d $r0,[R_ATA_CTRL_DATA] 361 move.d $r0,[R_ATA_TRANSFER_CNT] 362 move.d $r0,[R_ATA_CONFIG] 363#if 0 364 move.d R_PORT_G_DATA, $r1 365 move.d $r0, [$r1]; assert ATA bus-reset 366 nop 367 nop 368 nop 369 nop 370 nop 371 nop 372 move.d 0x08000000,$r0 373 move.d $r0,[$r1] 374#endif 375#endif 376 377#ifdef CONFIG_JULIETTE 378 ;; configure external DMA channel 0 before enabling it in genconfig 379 380 moveq 0,$r0 381 move.d $r0,[R_EXT_DMA_0_ADDR] 382 ; cnt enable, word size, output, stop, size 0 383 move.d IO_STATE (R_EXT_DMA_0_CMD, cnt, enable) \ 384 | IO_STATE (R_EXT_DMA_0_CMD, rqpol, ahigh) \ 385 | IO_STATE (R_EXT_DMA_0_CMD, apol, ahigh) \ 386 | IO_STATE (R_EXT_DMA_0_CMD, rq_ack, burst) \ 387 | IO_STATE (R_EXT_DMA_0_CMD, wid, word) \ 388 | IO_STATE (R_EXT_DMA_0_CMD, dir, output) \ 389 | IO_STATE (R_EXT_DMA_0_CMD, run, stop) \ 390 | IO_FIELD (R_EXT_DMA_0_CMD, trf_count, 0),$r0 391 move.d $r0,[R_EXT_DMA_0_CMD] 392 393 ;; reset dma4 and wait for completion 394 395 moveq IO_STATE (R_DMA_CH4_CMD, cmd, reset),$r0 396 move.b $r0,[R_DMA_CH4_CMD] 3971: move.b [R_DMA_CH4_CMD],$r0 398 and.b IO_MASK (R_DMA_CH4_CMD, cmd),$r0 399 cmp.b IO_STATE (R_DMA_CH4_CMD, cmd, reset),$r0 400 beq 1b 401 nop 402 403 ;; reset dma5 and wait for completion 404 405 moveq IO_STATE (R_DMA_CH5_CMD, cmd, reset),$r0 406 move.b $r0,[R_DMA_CH5_CMD] 4071: move.b [R_DMA_CH5_CMD],$r0 408 and.b IO_MASK (R_DMA_CH5_CMD, cmd),$r0 409 cmp.b IO_STATE (R_DMA_CH5_CMD, cmd, reset),$r0 410 beq 1b 411 nop 412#endif 413 414 ;; Etrax product HW genconfig setup 415 416 moveq 0,$r0 417 418 ;; Select or disable serial port 2 419#ifdef CONFIG_ETRAX_SERIAL_PORT2 420 or.d IO_STATE (R_GEN_CONFIG, ser2, select),$r0 421#else 422 or.d IO_STATE (R_GEN_CONFIG, ser2, disable),$r0 423#endif 424 425 ;; Init interfaces (disable them). 426 or.d IO_STATE (R_GEN_CONFIG, scsi0, disable) \ 427 | IO_STATE (R_GEN_CONFIG, ata, disable) \ 428 | IO_STATE (R_GEN_CONFIG, par0, disable) \ 429 | IO_STATE (R_GEN_CONFIG, mio, disable) \ 430 | IO_STATE (R_GEN_CONFIG, scsi1, disable) \ 431 | IO_STATE (R_GEN_CONFIG, scsi0w, disable) \ 432 | IO_STATE (R_GEN_CONFIG, par1, disable) \ 433 | IO_STATE (R_GEN_CONFIG, ser3, disable) \ 434 | IO_STATE (R_GEN_CONFIG, mio_w, disable) \ 435 | IO_STATE (R_GEN_CONFIG, usb1, disable) \ 436 | IO_STATE (R_GEN_CONFIG, usb2, disable) \ 437 | IO_STATE (R_GEN_CONFIG, par_w, disable),$r0 438 439 ;; Init DMA channel muxing (set to unused clients). 440 or.d IO_STATE (R_GEN_CONFIG, dma2, ata) \ 441 | IO_STATE (R_GEN_CONFIG, dma3, ata) \ 442 | IO_STATE (R_GEN_CONFIG, dma4, scsi1) \ 443 | IO_STATE (R_GEN_CONFIG, dma5, scsi1) \ 444 | IO_STATE (R_GEN_CONFIG, dma6, unused) \ 445 | IO_STATE (R_GEN_CONFIG, dma7, unused) \ 446 | IO_STATE (R_GEN_CONFIG, dma8, usb) \ 447 | IO_STATE (R_GEN_CONFIG, dma9, usb),$r0 448 449 450#if defined(CONFIG_ETRAX_DEF_R_PORT_G0_DIR_OUT) 451 or.d IO_STATE (R_GEN_CONFIG, g0dir, out),$r0 452#endif 453 454#if defined(CONFIG_ETRAX_DEF_R_PORT_G8_15_DIR_OUT) 455 or.d IO_STATE (R_GEN_CONFIG, g8_15dir, out),$r0 456#endif 457#if defined(CONFIG_ETRAX_DEF_R_PORT_G16_23_DIR_OUT) 458 or.d IO_STATE (R_GEN_CONFIG, g16_23dir, out),$r0 459#endif 460 461#if defined(CONFIG_ETRAX_DEF_R_PORT_G24_DIR_OUT) 462 or.d IO_STATE (R_GEN_CONFIG, g24dir, out),$r0 463#endif 464 465 move.d $r0,[genconfig_shadow] ; init a shadow register of R_GEN_CONFIG 466 467 move.d $r0,[R_GEN_CONFIG] 468 469#if 0 470 moveq 4,$r0 471 move.b $r0,[R_DMA_CH6_CMD] ; reset (ser0 dma out) 472 move.b $r0,[R_DMA_CH7_CMD] ; reset (ser0 dma in) 4731: move.b [R_DMA_CH6_CMD],$r0 ; wait for reset cycle to finish 474 and.b 7,$r0 475 cmp.b 4,$r0 476 beq 1b 477 nop 4781: move.b [R_DMA_CH7_CMD],$r0 ; wait for reset cycle to finish 479 and.b 7,$r0 480 cmp.b 4,$r0 481 beq 1b 482 nop 483#endif 484 485 moveq IO_STATE (R_DMA_CH8_CMD, cmd, reset),$r0 486 move.b $r0,[R_DMA_CH8_CMD] ; reset (ser1 dma out) 487 move.b $r0,[R_DMA_CH9_CMD] ; reset (ser1 dma in) 4881: move.b [R_DMA_CH8_CMD],$r0 ; wait for reset cycle to finish 489 andq IO_MASK (R_DMA_CH8_CMD, cmd),$r0 490 cmpq IO_STATE (R_DMA_CH8_CMD, cmd, reset),$r0 491 beq 1b 492 nop 4931: move.b [R_DMA_CH9_CMD],$r0 ; wait for reset cycle to finish 494 andq IO_MASK (R_DMA_CH9_CMD, cmd),$r0 495 cmpq IO_STATE (R_DMA_CH9_CMD, cmd, reset),$r0 496 beq 1b 497 nop 498 499 ;; setup port PA and PB default initial directions and data 500 ;; including their shadow registers 501 502 move.b CONFIG_ETRAX_DEF_R_PORT_PA_DIR,$r0 503#if defined(CONFIG_BLUETOOTH) && defined(CONFIG_BLUETOOTH_RESET_PA7) 504 or.b IO_STATE (R_PORT_PA_DIR, dir7, output),$r0 505#endif 506 move.b $r0,[port_pa_dir_shadow] 507 move.b $r0,[R_PORT_PA_DIR] 508 move.b CONFIG_ETRAX_DEF_R_PORT_PA_DATA,$r0 509#if defined(CONFIG_BLUETOOTH) && defined(CONFIG_BLUETOOTH_RESET_PA7) 510#if defined(CONFIG_BLUETOOTH_RESET_ACTIVE_HIGH) 511 and.b ~(1 << 7),$r0 512#else 513 or.b (1 << 7),$r0 514#endif 515#endif 516 move.b $r0,[port_pa_data_shadow] 517 move.b $r0,[R_PORT_PA_DATA] 518 519 move.b CONFIG_ETRAX_DEF_R_PORT_PB_CONFIG,$r0 520 move.b $r0,[port_pb_config_shadow] 521 move.b $r0,[R_PORT_PB_CONFIG] 522 move.b CONFIG_ETRAX_DEF_R_PORT_PB_DIR,$r0 523#if defined(CONFIG_BLUETOOTH) && defined(CONFIG_BLUETOOTH_RESET_PB5) 524 or.b IO_STATE (R_PORT_PB_DIR, dir5, output),$r0 525#endif 526 move.b $r0,[port_pb_dir_shadow] 527 move.b $r0,[R_PORT_PB_DIR] 528 move.b CONFIG_ETRAX_DEF_R_PORT_PB_DATA,$r0 529#if defined(CONFIG_BLUETOOTH) && defined(CONFIG_BLUETOOTH_RESET_PB5) 530#if defined(CONFIG_BLUETOOTH_RESET_ACTIVE_HIGH) 531 and.b ~(1 << 5),$r0 532#else 533 or.b (1 << 5),$r0 534#endif 535#endif 536 move.b $r0,[port_pb_data_shadow] 537 move.b $r0,[R_PORT_PB_DATA] 538 539 moveq 0, $r0 540 move.d $r0,[port_pb_i2c_shadow] 541 move.d $r0, [R_PORT_PB_I2C] 542 543 moveq 0,$r0 544#if defined(CONFIG_BLUETOOTH) && defined(CONFIG_BLUETOOTH_RESET_G10) 545#if defined(CONFIG_BLUETOOTH_RESET_ACTIVE_HIGH) 546 and.d ~(1 << 10),$r0 547#else 548 or.d (1 << 10),$r0 549#endif 550#endif 551#if defined(CONFIG_BLUETOOTH) && defined(CONFIG_BLUETOOTH_RESET_G11) 552#if defined(CONFIG_BLUETOOTH_RESET_ACTIVE_HIGH) 553 and.d ~(1 << 11),$r0 554#else 555 or.d (1 << 11),$r0 556#endif 557#endif 558 move.d $r0,[port_g_data_shadow] 559 move.d $r0,[R_PORT_G_DATA] 560 561 ;; setup the serial port 0 at 115200 baud for debug purposes 562 563 moveq IO_STATE (R_SERIAL0_XOFF, tx_stop, enable) \ 564 | IO_STATE (R_SERIAL0_XOFF, auto_xoff, disable) \ 565 | IO_FIELD (R_SERIAL0_XOFF, xoff_char, 0),$r0 566 move.d $r0,[R_SERIAL0_XOFF] 567 568 ; 115.2kbaud for both transmit and receive 569 move.b IO_STATE (R_SERIAL0_BAUD, tr_baud, c115k2Hz) \ 570 | IO_STATE (R_SERIAL0_BAUD, rec_baud, c115k2Hz),$r0 571 move.b $r0,[R_SERIAL0_BAUD] 572 573 ; Set up and enable the serial0 receiver. 574 move.b IO_STATE (R_SERIAL0_REC_CTRL, dma_err, stop) \ 575 | IO_STATE (R_SERIAL0_REC_CTRL, rec_enable, enable) \ 576 | IO_STATE (R_SERIAL0_REC_CTRL, rts_, active) \ 577 | IO_STATE (R_SERIAL0_REC_CTRL, sampling, middle) \ 578 | IO_STATE (R_SERIAL0_REC_CTRL, rec_stick_par, normal) \ 579 | IO_STATE (R_SERIAL0_REC_CTRL, rec_par, even) \ 580 | IO_STATE (R_SERIAL0_REC_CTRL, rec_par_en, disable) \ 581 | IO_STATE (R_SERIAL0_REC_CTRL, rec_bitnr, rec_8bit),$r0 582 move.b $r0,[R_SERIAL0_REC_CTRL] 583 584 ; Set up and enable the serial0 transmitter. 585 move.b IO_FIELD (R_SERIAL0_TR_CTRL, txd, 0) \ 586 | IO_STATE (R_SERIAL0_TR_CTRL, tr_enable, enable) \ 587 | IO_STATE (R_SERIAL0_TR_CTRL, auto_cts, disabled) \ 588 | IO_STATE (R_SERIAL0_TR_CTRL, stop_bits, one_bit) \ 589 | IO_STATE (R_SERIAL0_TR_CTRL, tr_stick_par, normal) \ 590 | IO_STATE (R_SERIAL0_TR_CTRL, tr_par, even) \ 591 | IO_STATE (R_SERIAL0_TR_CTRL, tr_par_en, disable) \ 592 | IO_STATE (R_SERIAL0_TR_CTRL, tr_bitnr, tr_8bit),$r0 593 move.b $r0,[R_SERIAL0_TR_CTRL] 594 595 ;; setup the serial port 1 at 115200 baud for debug purposes 596 597 moveq IO_STATE (R_SERIAL1_XOFF, tx_stop, enable) \ 598 | IO_STATE (R_SERIAL1_XOFF, auto_xoff, disable) \ 599 | IO_FIELD (R_SERIAL1_XOFF, xoff_char, 0),$r0 600 move.d $r0,[R_SERIAL1_XOFF] 601 602 ; 115.2kbaud for both transmit and receive 603 move.b IO_STATE (R_SERIAL1_BAUD, tr_baud, c115k2Hz) \ 604 | IO_STATE (R_SERIAL1_BAUD, rec_baud, c115k2Hz),$r0 605 move.b $r0,[R_SERIAL1_BAUD] 606 607 ; Set up and enable the serial1 receiver. 608 move.b IO_STATE (R_SERIAL1_REC_CTRL, dma_err, stop) \ 609 | IO_STATE (R_SERIAL1_REC_CTRL, rec_enable, enable) \ 610 | IO_STATE (R_SERIAL1_REC_CTRL, rts_, active) \ 611 | IO_STATE (R_SERIAL1_REC_CTRL, sampling, middle) \ 612 | IO_STATE (R_SERIAL1_REC_CTRL, rec_stick_par, normal) \ 613 | IO_STATE (R_SERIAL1_REC_CTRL, rec_par, even) \ 614 | IO_STATE (R_SERIAL1_REC_CTRL, rec_par_en, disable) \ 615 | IO_STATE (R_SERIAL1_REC_CTRL, rec_bitnr, rec_8bit),$r0 616 move.b $r0,[R_SERIAL1_REC_CTRL] 617 618 ; Set up and enable the serial1 transmitter. 619 move.b IO_FIELD (R_SERIAL1_TR_CTRL, txd, 0) \ 620 | IO_STATE (R_SERIAL1_TR_CTRL, tr_enable, enable) \ 621 | IO_STATE (R_SERIAL1_TR_CTRL, auto_cts, disabled) \ 622 | IO_STATE (R_SERIAL1_TR_CTRL, stop_bits, one_bit) \ 623 | IO_STATE (R_SERIAL1_TR_CTRL, tr_stick_par, normal) \ 624 | IO_STATE (R_SERIAL1_TR_CTRL, tr_par, even) \ 625 | IO_STATE (R_SERIAL1_TR_CTRL, tr_par_en, disable) \ 626 | IO_STATE (R_SERIAL1_TR_CTRL, tr_bitnr, tr_8bit),$r0 627 move.b $r0,[R_SERIAL1_TR_CTRL] 628 629#ifdef CONFIG_ETRAX_SERIAL_PORT2 630 ;; setup the serial port 2 at 115200 baud for debug purposes 631 632 moveq IO_STATE (R_SERIAL2_XOFF, tx_stop, enable) \ 633 | IO_STATE (R_SERIAL2_XOFF, auto_xoff, disable) \ 634 | IO_FIELD (R_SERIAL2_XOFF, xoff_char, 0),$r0 635 move.d $r0,[R_SERIAL2_XOFF] 636 637 ; 115.2kbaud for both transmit and receive 638 move.b IO_STATE (R_SERIAL2_BAUD, tr_baud, c115k2Hz) \ 639 | IO_STATE (R_SERIAL2_BAUD, rec_baud, c115k2Hz),$r0 640 move.b $r0,[R_SERIAL2_BAUD] 641 642 ; Set up and enable the serial2 receiver. 643 move.b IO_STATE (R_SERIAL2_REC_CTRL, dma_err, stop) \ 644 | IO_STATE (R_SERIAL2_REC_CTRL, rec_enable, enable) \ 645 | IO_STATE (R_SERIAL2_REC_CTRL, rts_, active) \ 646 | IO_STATE (R_SERIAL2_REC_CTRL, sampling, middle) \ 647 | IO_STATE (R_SERIAL2_REC_CTRL, rec_stick_par, normal) \ 648 | IO_STATE (R_SERIAL2_REC_CTRL, rec_par, even) \ 649 | IO_STATE (R_SERIAL2_REC_CTRL, rec_par_en, disable) \ 650 | IO_STATE (R_SERIAL2_REC_CTRL, rec_bitnr, rec_8bit),$r0 651 move.b $r0,[R_SERIAL2_REC_CTRL] 652 653 ; Set up and enable the serial2 transmitter. 654 move.b IO_FIELD (R_SERIAL2_TR_CTRL, txd, 0) \ 655 | IO_STATE (R_SERIAL2_TR_CTRL, tr_enable, enable) \ 656 | IO_STATE (R_SERIAL2_TR_CTRL, auto_cts, disabled) \ 657 | IO_STATE (R_SERIAL2_TR_CTRL, stop_bits, one_bit) \ 658 | IO_STATE (R_SERIAL2_TR_CTRL, tr_stick_par, normal) \ 659 | IO_STATE (R_SERIAL2_TR_CTRL, tr_par, even) \ 660 | IO_STATE (R_SERIAL2_TR_CTRL, tr_par_en, disable) \ 661 | IO_STATE (R_SERIAL2_TR_CTRL, tr_bitnr, tr_8bit),$r0 662 move.b $r0,[R_SERIAL2_TR_CTRL] 663#endif 664 665#ifdef CONFIG_ETRAX_SERIAL_PORT3 666 ;; setup the serial port 3 at 115200 baud for debug purposes 667 668 moveq IO_STATE (R_SERIAL3_XOFF, tx_stop, enable) \ 669 | IO_STATE (R_SERIAL3_XOFF, auto_xoff, disable) \ 670 | IO_FIELD (R_SERIAL3_XOFF, xoff_char, 0),$r0 671 move.d $r0,[R_SERIAL3_XOFF] 672 673 ; 115.2kbaud for both transmit and receive 674 move.b IO_STATE (R_SERIAL3_BAUD, tr_baud, c115k2Hz) \ 675 | IO_STATE (R_SERIAL3_BAUD, rec_baud, c115k2Hz),$r0 676 move.b $r0,[R_SERIAL3_BAUD] 677 678 ; Set up and enable the serial3 receiver. 679 move.b IO_STATE (R_SERIAL3_REC_CTRL, dma_err, stop) \ 680 | IO_STATE (R_SERIAL3_REC_CTRL, rec_enable, enable) \ 681 | IO_STATE (R_SERIAL3_REC_CTRL, rts_, active) \ 682 | IO_STATE (R_SERIAL3_REC_CTRL, sampling, middle) \ 683 | IO_STATE (R_SERIAL3_REC_CTRL, rec_stick_par, normal) \ 684 | IO_STATE (R_SERIAL3_REC_CTRL, rec_par, even) \ 685 | IO_STATE (R_SERIAL3_REC_CTRL, rec_par_en, disable) \ 686 | IO_STATE (R_SERIAL3_REC_CTRL, rec_bitnr, rec_8bit),$r0 687 move.b $r0,[R_SERIAL3_REC_CTRL] 688 689 ; Set up and enable the serial3 transmitter. 690 move.b IO_FIELD (R_SERIAL3_TR_CTRL, txd, 0) \ 691 | IO_STATE (R_SERIAL3_TR_CTRL, tr_enable, enable) \ 692 | IO_STATE (R_SERIAL3_TR_CTRL, auto_cts, disabled) \ 693 | IO_STATE (R_SERIAL3_TR_CTRL, stop_bits, one_bit) \ 694 | IO_STATE (R_SERIAL3_TR_CTRL, tr_stick_par, normal) \ 695 | IO_STATE (R_SERIAL3_TR_CTRL, tr_par, even) \ 696 | IO_STATE (R_SERIAL3_TR_CTRL, tr_par_en, disable) \ 697 | IO_STATE (R_SERIAL3_TR_CTRL, tr_bitnr, tr_8bit),$r0 698 move.b $r0,[R_SERIAL3_TR_CTRL] 699#endif 700 701 jump start_kernel ; jump into the C-function start_kernel in init/main.c 702 703 .data 704etrax_irv: 705 .dword 0 706romfs_start: 707 .dword 0 708romfs_length: 709 .dword 0 710romfs_in_flash: 711 .dword 0 712 713 ;; put some special pages at the beginning of the kernel aligned 714 ;; to page boundaries - the kernel cannot start until after this 715 716#ifdef CONFIG_CRIS_LOW_MAP 717swapper_pg_dir = 0x60002000 718#else 719swapper_pg_dir = 0xc0002000 720#endif 721 722 .section ".init.data", "aw" 723#include "../lib/hw_settings.S" 724