11da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 21da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 31da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 68360 Communication Processor Module. 41da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Copyright (c) 2000 Michael Leslie <mleslie@lineo.com> (mc68360) after: 51da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Copyright (c) 1997 Dan Malek <dmalek@jlc.net> (mpc8xx) 61da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 71da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * This file contains structures and information for the communication 81da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * processor channels. Some CPM control and status is available 91da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * through the 68360 internal memory map. See include/asm/360_immap.h for details. 101da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * This file is not a complete map of all of the 360 QUICC's capabilities 111da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 121da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * On the MBX board, EPPC-Bug loads CPM microcode into the first 512 131da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * bytes of the DP RAM and relocates the I2C parameter area to the 141da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * IDMA1 space. The remaining DP RAM is available for buffer descriptors 151da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * or other use. 161da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 171da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#ifndef __CPM_360__ 181da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define __CPM_360__ 191da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 201da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 211da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* CPM Command register masks: */ 221da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CPM_CR_RST ((ushort)0x8000) 231da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CPM_CR_OPCODE ((ushort)0x0f00) 241da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CPM_CR_CHAN ((ushort)0x00f0) 251da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CPM_CR_FLG ((ushort)0x0001) 261da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 271da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* CPM Command set (opcodes): */ 281da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CPM_CR_INIT_TRX ((ushort)0x0000) 291da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CPM_CR_INIT_RX ((ushort)0x0001) 301da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CPM_CR_INIT_TX ((ushort)0x0002) 311da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CPM_CR_HUNT_MODE ((ushort)0x0003) 321da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CPM_CR_STOP_TX ((ushort)0x0004) 331da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CPM_CR_GRSTOP_TX ((ushort)0x0005) 341da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CPM_CR_RESTART_TX ((ushort)0x0006) 351da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CPM_CR_CLOSE_RXBD ((ushort)0x0007) 361da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CPM_CR_SET_GADDR ((ushort)0x0008) 371da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CPM_CR_GCI_TIMEOUT ((ushort)0x0009) 381da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CPM_CR_GCI_ABORT ((ushort)0x000a) 391da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CPM_CR_RESET_BCS ((ushort)0x000a) 401da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 411da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* CPM Channel numbers. */ 421da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CPM_CR_CH_SCC1 ((ushort)0x0000) 431da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CPM_CR_CH_SCC2 ((ushort)0x0004) 441da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CPM_CR_CH_SPI ((ushort)0x0005) /* SPI / Timers */ 451da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CPM_CR_CH_TMR ((ushort)0x0005) 461da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CPM_CR_CH_SCC3 ((ushort)0x0008) 471da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CPM_CR_CH_SMC1 ((ushort)0x0009) /* SMC1 / IDMA1 */ 481da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CPM_CR_CH_IDMA1 ((ushort)0x0009) 491da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CPM_CR_CH_SCC4 ((ushort)0x000c) 501da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CPM_CR_CH_SMC2 ((ushort)0x000d) /* SMC2 / IDMA2 */ 511da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CPM_CR_CH_IDMA2 ((ushort)0x000d) 521da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 531da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 541da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define mk_cr_cmd(CH, CMD) ((CMD << 8) | (CH << 4)) 551da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 561da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#if 1 /* mleslie: I dinna think we have any such restrictions on 571da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * DP RAM aboard the 360 board - see the MC68360UM p.3-3 */ 581da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 591da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* The dual ported RAM is multi-functional. Some areas can be (and are 601da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * being) used for microcode. There is an area that can only be used 611da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * as data ram for buffer descriptors, which is all we use right now. 621da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Currently the first 512 and last 256 bytes are used for microcode. 631da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 641da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* mleslie: The uCquicc board is using no extra microcode in DPRAM */ 651da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CPM_DATAONLY_BASE ((uint)0x0000) 661da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CPM_DATAONLY_SIZE ((uint)0x0800) 671da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CPM_DP_NOSPACE ((uint)0x7fffffff) 681da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 691da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#endif 701da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 711da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 721da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* Export the base address of the communication processor registers 731da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * and dual port ram. */ 741da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* extern cpm360_t *cpmp; */ /* Pointer to comm processor */ 751da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsextern QUICC *pquicc; 761da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsuint m360_cpm_dpalloc(uint size); 771da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* void *m360_cpm_hostalloc(uint size); */ 781da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsvoid m360_cpm_setbrg(uint brg, uint rate); 791da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 801da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#if 0 /* use QUICC_BD declared in include/asm/m68360_quicc.h */ 811da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* Buffer descriptors used by many of the CPM protocols. */ 821da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldstypedef struct cpm_buf_desc { 831da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ushort cbd_sc; /* Status and Control */ 841da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ushort cbd_datlen; /* Data length in buffer */ 851da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds uint cbd_bufaddr; /* Buffer address in host memory */ 861da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} cbd_t; 871da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#endif 881da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 891da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 901da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* rx bd status/control bits */ 9125985edcedea6396277003854657b5f3cb31a628Lucas De Marchi#define BD_SC_EMPTY ((ushort)0x8000) /* Receive is empty */ 921da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define BD_SC_WRAP ((ushort)0x2000) /* Last buffer descriptor in table */ 931da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define BD_SC_INTRPT ((ushort)0x1000) /* Interrupt on change */ 941da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define BD_SC_LAST ((ushort)0x0800) /* Last buffer in frame OR control char */ 951da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 961da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define BD_SC_FIRST ((ushort)0x0400) /* 1st buffer in an HDLC frame */ 971da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define BD_SC_ADDR ((ushort)0x0400) /* 1st byte is a multidrop address */ 981da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 9925985edcedea6396277003854657b5f3cb31a628Lucas De Marchi#define BD_SC_CM ((ushort)0x0200) /* Continuous mode */ 1001da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define BD_SC_ID ((ushort)0x0100) /* Received too many idles */ 1011da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1021da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define BD_SC_AM ((ushort)0x0080) /* Multidrop address match */ 1031da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define BD_SC_DE ((ushort)0x0080) /* DPLL Error (HDLC) */ 1041da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1051da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define BD_SC_BR ((ushort)0x0020) /* Break received */ 1061da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define BD_SC_LG ((ushort)0x0020) /* Frame length violation (HDLC) */ 1071da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1081da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define BD_SC_FR ((ushort)0x0010) /* Framing error */ 1091da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define BD_SC_NO ((ushort)0x0010) /* Nonoctet aligned frame (HDLC) */ 1101da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1111da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define BD_SC_PR ((ushort)0x0008) /* Parity error */ 1121da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define BD_SC_AB ((ushort)0x0008) /* Received abort Sequence (HDLC) */ 1131da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1141da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define BD_SC_OV ((ushort)0x0002) /* Overrun */ 1151da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define BD_SC_CD ((ushort)0x0001) /* Carrier Detect lost */ 1161da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1171da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* tx bd status/control bits (as differ from rx bd) */ 1181da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define BD_SC_READY ((ushort)0x8000) /* Transmit is ready */ 1191da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define BD_SC_TC ((ushort)0x0400) /* Transmit CRC */ 1201da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define BD_SC_P ((ushort)0x0100) /* xmt preamble */ 1211da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define BD_SC_UN ((ushort)0x0002) /* Underrun */ 1221da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1231da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1241da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1251da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1261da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* Parameter RAM offsets. */ 1271da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1281da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1291da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1301da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* In 2.4 ppc, the PROFF_S?C? are used as byte offsets into DPRAM. 1311da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * In 2.0, we use a more structured C struct map of DPRAM, and so 1321da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * instead, we need only a parameter ram `slot' */ 1331da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1341da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PRSLOT_SCC1 0 1351da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PRSLOT_SCC2 1 1361da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PRSLOT_SCC3 2 1371da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PRSLOT_SMC1 2 1381da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PRSLOT_SCC4 3 1391da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PRSLOT_SMC2 3 1401da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1411da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1421da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* #define PROFF_SCC1 ((uint)0x0000) */ 1431da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* #define PROFF_SCC2 ((uint)0x0100) */ 1441da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* #define PROFF_SCC3 ((uint)0x0200) */ 1451da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* #define PROFF_SMC1 ((uint)0x0280) */ 1461da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* #define PROFF_SCC4 ((uint)0x0300) */ 1471da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* #define PROFF_SMC2 ((uint)0x0380) */ 1481da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1491da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1501da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* Define enough so I can at least use the serial port as a UART. 1511da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * The MBX uses SMC1 as the host serial port. 1521da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 1531da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldstypedef struct smc_uart { 1541da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ushort smc_rbase; /* Rx Buffer descriptor base address */ 1551da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ushort smc_tbase; /* Tx Buffer descriptor base address */ 1561da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds u_char smc_rfcr; /* Rx function code */ 1571da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds u_char smc_tfcr; /* Tx function code */ 1581da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ushort smc_mrblr; /* Max receive buffer length */ 1591da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds uint smc_rstate; /* Internal */ 1601da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds uint smc_idp; /* Internal */ 1611da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ushort smc_rbptr; /* Internal */ 1621da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ushort smc_ibc; /* Internal */ 1631da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds uint smc_rxtmp; /* Internal */ 1641da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds uint smc_tstate; /* Internal */ 1651da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds uint smc_tdp; /* Internal */ 1661da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ushort smc_tbptr; /* Internal */ 1671da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ushort smc_tbc; /* Internal */ 1681da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds uint smc_txtmp; /* Internal */ 1691da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ushort smc_maxidl; /* Maximum idle characters */ 1701da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ushort smc_tmpidl; /* Temporary idle counter */ 1711da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ushort smc_brklen; /* Last received break length */ 1721da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ushort smc_brkec; /* rcv'd break condition counter */ 1731da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ushort smc_brkcr; /* xmt break count register */ 1741da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ushort smc_rmask; /* Temporary bit mask */ 1751da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} smc_uart_t; 1761da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1771da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* Function code bits. 1781da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds*/ 1791da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SMC_EB ((u_char)0x10) /* Set big endian byte order */ 1801da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1811da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* SMC uart mode register. 1821da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds*/ 1831da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SMCMR_REN ((ushort)0x0001) 1841da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SMCMR_TEN ((ushort)0x0002) 1851da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SMCMR_DM ((ushort)0x000c) 1861da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SMCMR_SM_GCI ((ushort)0x0000) 1871da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SMCMR_SM_UART ((ushort)0x0020) 1881da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SMCMR_SM_TRANS ((ushort)0x0030) 1891da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SMCMR_SM_MASK ((ushort)0x0030) 1901da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SMCMR_PM_EVEN ((ushort)0x0100) /* Even parity, else odd */ 1911da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SMCMR_REVD SMCMR_PM_EVEN 1921da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SMCMR_PEN ((ushort)0x0200) /* Parity enable */ 1931da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SMCMR_BS SMCMR_PEN 1941da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SMCMR_SL ((ushort)0x0400) /* Two stops, else one */ 1951da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SMCR_CLEN_MASK ((ushort)0x7800) /* Character length */ 1961da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define smcr_mk_clen(C) (((C) << 11) & SMCR_CLEN_MASK) 1971da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1981da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* SMC2 as Centronics parallel printer. It is half duplex, in that 1991da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * it can only receive or transmit. The parameter ram values for 2001da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * each direction are either unique or properly overlap, so we can 2011da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * include them in one structure. 2021da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 2031da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldstypedef struct smc_centronics { 2041da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ushort scent_rbase; 2051da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ushort scent_tbase; 2061da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds u_char scent_cfcr; 2071da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds u_char scent_smask; 2081da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ushort scent_mrblr; 2091da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds uint scent_rstate; 2101da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds uint scent_r_ptr; 2111da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ushort scent_rbptr; 2121da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ushort scent_r_cnt; 2131da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds uint scent_rtemp; 2141da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds uint scent_tstate; 2151da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds uint scent_t_ptr; 2161da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ushort scent_tbptr; 2171da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ushort scent_t_cnt; 2181da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds uint scent_ttemp; 2191da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ushort scent_max_sl; 2201da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ushort scent_sl_cnt; 2211da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ushort scent_character1; 2221da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ushort scent_character2; 2231da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ushort scent_character3; 2241da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ushort scent_character4; 2251da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ushort scent_character5; 2261da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ushort scent_character6; 2271da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ushort scent_character7; 2281da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ushort scent_character8; 2291da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ushort scent_rccm; 2301da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ushort scent_rccr; 2311da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} smc_cent_t; 2321da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 2331da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* Centronics Status Mask Register. 2341da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds*/ 2351da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SMC_CENT_F ((u_char)0x08) 2361da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SMC_CENT_PE ((u_char)0x04) 2371da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SMC_CENT_S ((u_char)0x02) 2381da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 2391da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* SMC Event and Mask register. 2401da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds*/ 2411da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SMCM_BRKE ((unsigned char)0x40) /* When in UART Mode */ 2421da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SMCM_BRK ((unsigned char)0x10) /* When in UART Mode */ 2431da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SMCM_TXE ((unsigned char)0x10) /* When in Transparent Mode */ 2441da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SMCM_BSY ((unsigned char)0x04) 2451da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SMCM_TX ((unsigned char)0x02) 2461da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SMCM_RX ((unsigned char)0x01) 2471da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 2481da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* Baud rate generators. 2491da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds*/ 2501da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CPM_BRG_RST ((uint)0x00020000) 2511da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CPM_BRG_EN ((uint)0x00010000) 2521da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CPM_BRG_EXTC_INT ((uint)0x00000000) 2531da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CPM_BRG_EXTC_CLK2 ((uint)0x00004000) 2541da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CPM_BRG_EXTC_CLK6 ((uint)0x00008000) 2551da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CPM_BRG_ATB ((uint)0x00002000) 2561da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CPM_BRG_CD_MASK ((uint)0x00001ffe) 2571da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CPM_BRG_DIV16 ((uint)0x00000001) 2581da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 2591da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* SCCs. 2601da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds*/ 2611da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SCC_GSMRH_IRP ((uint)0x00040000) 2621da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SCC_GSMRH_GDE ((uint)0x00010000) 2631da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SCC_GSMRH_TCRC_CCITT ((uint)0x00008000) 2641da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SCC_GSMRH_TCRC_BISYNC ((uint)0x00004000) 2651da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SCC_GSMRH_TCRC_HDLC ((uint)0x00000000) 2661da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SCC_GSMRH_REVD ((uint)0x00002000) 2671da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SCC_GSMRH_TRX ((uint)0x00001000) 2681da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SCC_GSMRH_TTX ((uint)0x00000800) 2691da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SCC_GSMRH_CDP ((uint)0x00000400) 2701da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SCC_GSMRH_CTSP ((uint)0x00000200) 2711da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SCC_GSMRH_CDS ((uint)0x00000100) 2721da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SCC_GSMRH_CTSS ((uint)0x00000080) 2731da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SCC_GSMRH_TFL ((uint)0x00000040) 2741da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SCC_GSMRH_RFW ((uint)0x00000020) 2751da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SCC_GSMRH_TXSY ((uint)0x00000010) 2761da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SCC_GSMRH_SYNL16 ((uint)0x0000000c) 2771da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SCC_GSMRH_SYNL8 ((uint)0x00000008) 2781da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SCC_GSMRH_SYNL4 ((uint)0x00000004) 2791da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SCC_GSMRH_RTSM ((uint)0x00000002) 2801da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SCC_GSMRH_RSYN ((uint)0x00000001) 2811da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 2821da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SCC_GSMRL_SIR ((uint)0x80000000) /* SCC2 only */ 2831da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SCC_GSMRL_EDGE_NONE ((uint)0x60000000) 2841da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SCC_GSMRL_EDGE_NEG ((uint)0x40000000) 2851da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SCC_GSMRL_EDGE_POS ((uint)0x20000000) 2861da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SCC_GSMRL_EDGE_BOTH ((uint)0x00000000) 2871da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SCC_GSMRL_TCI ((uint)0x10000000) 2881da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SCC_GSMRL_TSNC_3 ((uint)0x0c000000) 2891da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SCC_GSMRL_TSNC_4 ((uint)0x08000000) 2901da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SCC_GSMRL_TSNC_14 ((uint)0x04000000) 2911da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SCC_GSMRL_TSNC_INF ((uint)0x00000000) 2921da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SCC_GSMRL_RINV ((uint)0x02000000) 2931da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SCC_GSMRL_TINV ((uint)0x01000000) 2941da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SCC_GSMRL_TPL_128 ((uint)0x00c00000) 2951da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SCC_GSMRL_TPL_64 ((uint)0x00a00000) 2961da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SCC_GSMRL_TPL_48 ((uint)0x00800000) 2971da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SCC_GSMRL_TPL_32 ((uint)0x00600000) 2981da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SCC_GSMRL_TPL_16 ((uint)0x00400000) 2991da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SCC_GSMRL_TPL_8 ((uint)0x00200000) 3001da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SCC_GSMRL_TPL_NONE ((uint)0x00000000) 3011da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SCC_GSMRL_TPP_ALL1 ((uint)0x00180000) 3021da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SCC_GSMRL_TPP_01 ((uint)0x00100000) 3031da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SCC_GSMRL_TPP_10 ((uint)0x00080000) 3041da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SCC_GSMRL_TPP_ZEROS ((uint)0x00000000) 3051da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SCC_GSMRL_TEND ((uint)0x00040000) 3061da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SCC_GSMRL_TDCR_32 ((uint)0x00030000) 3071da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SCC_GSMRL_TDCR_16 ((uint)0x00020000) 3081da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SCC_GSMRL_TDCR_8 ((uint)0x00010000) 3091da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SCC_GSMRL_TDCR_1 ((uint)0x00000000) 3101da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SCC_GSMRL_RDCR_32 ((uint)0x0000c000) 3111da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SCC_GSMRL_RDCR_16 ((uint)0x00008000) 3121da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SCC_GSMRL_RDCR_8 ((uint)0x00004000) 3131da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SCC_GSMRL_RDCR_1 ((uint)0x00000000) 3141da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SCC_GSMRL_RENC_DFMAN ((uint)0x00003000) 3151da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SCC_GSMRL_RENC_MANCH ((uint)0x00002000) 3161da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SCC_GSMRL_RENC_FM0 ((uint)0x00001000) 3171da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SCC_GSMRL_RENC_NRZI ((uint)0x00000800) 3181da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SCC_GSMRL_RENC_NRZ ((uint)0x00000000) 3191da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SCC_GSMRL_TENC_DFMAN ((uint)0x00000600) 3201da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SCC_GSMRL_TENC_MANCH ((uint)0x00000400) 3211da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SCC_GSMRL_TENC_FM0 ((uint)0x00000200) 3221da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SCC_GSMRL_TENC_NRZI ((uint)0x00000100) 3231da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SCC_GSMRL_TENC_NRZ ((uint)0x00000000) 3241da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SCC_GSMRL_DIAG_LE ((uint)0x000000c0) /* Loop and echo */ 3251da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SCC_GSMRL_DIAG_ECHO ((uint)0x00000080) 3261da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SCC_GSMRL_DIAG_LOOP ((uint)0x00000040) 3271da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SCC_GSMRL_DIAG_NORM ((uint)0x00000000) 3281da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SCC_GSMRL_ENR ((uint)0x00000020) 3291da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SCC_GSMRL_ENT ((uint)0x00000010) 3301da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SCC_GSMRL_MODE_ENET ((uint)0x0000000c) 3311da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SCC_GSMRL_MODE_DDCMP ((uint)0x00000009) 3321da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SCC_GSMRL_MODE_BISYNC ((uint)0x00000008) 3331da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SCC_GSMRL_MODE_V14 ((uint)0x00000007) 3341da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SCC_GSMRL_MODE_AHDLC ((uint)0x00000006) 3351da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SCC_GSMRL_MODE_PROFIBUS ((uint)0x00000005) 3361da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SCC_GSMRL_MODE_UART ((uint)0x00000004) 3371da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SCC_GSMRL_MODE_SS7 ((uint)0x00000003) 3381da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SCC_GSMRL_MODE_ATALK ((uint)0x00000002) 3391da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SCC_GSMRL_MODE_HDLC ((uint)0x00000000) 3401da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 3411da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SCC_TODR_TOD ((ushort)0x8000) 3421da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 3431da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* SCC Event and Mask register. 3441da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds*/ 3451da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SCCM_TXE ((unsigned char)0x10) 3461da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SCCM_BSY ((unsigned char)0x04) 3471da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SCCM_TX ((unsigned char)0x02) 3481da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SCCM_RX ((unsigned char)0x01) 3491da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 3501da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldstypedef struct scc_param { 3511da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ushort scc_rbase; /* Rx Buffer descriptor base address */ 3521da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ushort scc_tbase; /* Tx Buffer descriptor base address */ 3531da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds u_char scc_rfcr; /* Rx function code */ 3541da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds u_char scc_tfcr; /* Tx function code */ 3551da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ushort scc_mrblr; /* Max receive buffer length */ 3561da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds uint scc_rstate; /* Internal */ 3571da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds uint scc_idp; /* Internal */ 3581da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ushort scc_rbptr; /* Internal */ 3591da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ushort scc_ibc; /* Internal */ 3601da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds uint scc_rxtmp; /* Internal */ 3611da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds uint scc_tstate; /* Internal */ 3621da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds uint scc_tdp; /* Internal */ 3631da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ushort scc_tbptr; /* Internal */ 3641da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ushort scc_tbc; /* Internal */ 3651da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds uint scc_txtmp; /* Internal */ 3661da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds uint scc_rcrc; /* Internal */ 3671da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds uint scc_tcrc; /* Internal */ 3681da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} sccp_t; 3691da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 3701da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 3711da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* Function code bits. 3721da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 3731da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SCC_EB ((u_char)0x10) /* Set big endian byte order */ 3741da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SCC_FC_DMA ((u_char)0x08) /* Set SDMA */ 3751da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 3761da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* CPM Ethernet through SCC1. 3771da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 3781da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldstypedef struct scc_enet { 3791da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds sccp_t sen_genscc; 3801da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds uint sen_cpres; /* Preset CRC */ 3811da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds uint sen_cmask; /* Constant mask for CRC */ 3821da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds uint sen_crcec; /* CRC Error counter */ 3831da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds uint sen_alec; /* alignment error counter */ 3841da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds uint sen_disfc; /* discard frame counter */ 3851da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ushort sen_pads; /* Tx short frame pad character */ 3861da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ushort sen_retlim; /* Retry limit threshold */ 3871da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ushort sen_retcnt; /* Retry limit counter */ 3881da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ushort sen_maxflr; /* maximum frame length register */ 3891da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ushort sen_minflr; /* minimum frame length register */ 3901da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ushort sen_maxd1; /* maximum DMA1 length */ 3911da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ushort sen_maxd2; /* maximum DMA2 length */ 3921da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ushort sen_maxd; /* Rx max DMA */ 3931da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ushort sen_dmacnt; /* Rx DMA counter */ 3941da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ushort sen_maxb; /* Max BD byte count */ 3951da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ushort sen_gaddr1; /* Group address filter */ 3961da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ushort sen_gaddr2; 3971da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ushort sen_gaddr3; 3981da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ushort sen_gaddr4; 3991da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds uint sen_tbuf0data0; /* Save area 0 - current frame */ 4001da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds uint sen_tbuf0data1; /* Save area 1 - current frame */ 4011da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds uint sen_tbuf0rba; /* Internal */ 4021da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds uint sen_tbuf0crc; /* Internal */ 4031da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ushort sen_tbuf0bcnt; /* Internal */ 4041da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ushort sen_paddrh; /* physical address (MSB) */ 4051da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ushort sen_paddrm; 4061da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ushort sen_paddrl; /* physical address (LSB) */ 4071da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ushort sen_pper; /* persistence */ 4081da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ushort sen_rfbdptr; /* Rx first BD pointer */ 4091da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ushort sen_tfbdptr; /* Tx first BD pointer */ 4101da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ushort sen_tlbdptr; /* Tx last BD pointer */ 4111da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds uint sen_tbuf1data0; /* Save area 0 - current frame */ 4121da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds uint sen_tbuf1data1; /* Save area 1 - current frame */ 4131da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds uint sen_tbuf1rba; /* Internal */ 4141da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds uint sen_tbuf1crc; /* Internal */ 4151da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ushort sen_tbuf1bcnt; /* Internal */ 4161da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ushort sen_txlen; /* Tx Frame length counter */ 4171da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ushort sen_iaddr1; /* Individual address filter */ 4181da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ushort sen_iaddr2; 4191da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ushort sen_iaddr3; 4201da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ushort sen_iaddr4; 4211da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ushort sen_boffcnt; /* Backoff counter */ 4221da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4231da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* NOTE: Some versions of the manual have the following items 4241da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * incorrectly documented. Below is the proper order. 4251da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 4261da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ushort sen_taddrh; /* temp address (MSB) */ 4271da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ushort sen_taddrm; 4281da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ushort sen_taddrl; /* temp address (LSB) */ 4291da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} scc_enet_t; 4301da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4311da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4321da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4331da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#if defined (CONFIG_UCQUICC) 4341da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* uCquicc has the following signals connected to Ethernet: 4351da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 68360 - lxt905 4361da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * PA0/RXD1 - rxd 4371da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * PA1/TXD1 - txd 4381da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * PA8/CLK1 - tclk 4391da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * PA9/CLK2 - rclk 4401da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * PC0/!RTS1 - t_en 4411da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * PC1/!CTS1 - col 4421da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * PC5/!CD1 - cd 4431da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 4441da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PA_ENET_RXD PA_RXD1 4451da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PA_ENET_TXD PA_TXD1 4461da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PA_ENET_TCLK PA_CLK1 4471da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PA_ENET_RCLK PA_CLK2 4481da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PC_ENET_TENA PC_RTS1 4491da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PC_ENET_CLSN PC_CTS1 4501da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PC_ENET_RENA PC_CD1 4511da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4521da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* Control bits in the SICR to route TCLK (CLK1) and RCLK (CLK2) to 4531da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * SCC1. 4541da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 4551da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SICR_ENET_MASK ((uint)0x000000ff) 4561da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SICR_ENET_CLKRT ((uint)0x0000002c) 4571da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4581da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#endif /* config_ucquicc */ 4591da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4601da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4611da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#ifdef MBX 4621da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* Bits in parallel I/O port registers that have to be set/cleared 4631da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * to configure the pins for SCC1 use. The TCLK and RCLK seem unique 4641da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * to the MBX860 board. Any two of the four available clocks could be 4651da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * used, and the MPC860 cookbook manual has an example using different 4661da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * clock pins. 4671da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 4681da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PA_ENET_RXD ((ushort)0x0001) 4691da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PA_ENET_TXD ((ushort)0x0002) 4701da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PA_ENET_TCLK ((ushort)0x0200) 4711da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PA_ENET_RCLK ((ushort)0x0800) 4721da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PC_ENET_TENA ((ushort)0x0001) 4731da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PC_ENET_CLSN ((ushort)0x0010) 4741da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PC_ENET_RENA ((ushort)0x0020) 4751da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4761da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* Control bits in the SICR to route TCLK (CLK2) and RCLK (CLK4) to 4771da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * SCC1. Also, make sure GR1 (bit 24) and SC1 (bit 25) are zero. 4781da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 4791da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SICR_ENET_MASK ((uint)0x000000ff) 4801da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SICR_ENET_CLKRT ((uint)0x0000003d) 4811da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#endif 4821da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4831da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#ifdef CONFIG_BSEIP 4841da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* This ENET stuff is for the MPC823 with ethernet on SCC2. 4851da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * This is unique to the BSE ip-Engine board. 4861da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 4871da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PA_ENET_RXD ((ushort)0x0004) 4881da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PA_ENET_TXD ((ushort)0x0008) 4891da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PA_ENET_TCLK ((ushort)0x0100) 4901da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PA_ENET_RCLK ((ushort)0x0200) 4911da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PB_ENET_TENA ((uint)0x00002000) 4921da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PC_ENET_CLSN ((ushort)0x0040) 4931da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PC_ENET_RENA ((ushort)0x0080) 4941da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4951da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* BSE uses port B and C bits for PHY control also. 4961da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds*/ 4971da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PB_BSE_POWERUP ((uint)0x00000004) 4981da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PB_BSE_FDXDIS ((uint)0x00008000) 4991da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PC_BSE_LOOPBACK ((ushort)0x0800) 5001da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 5011da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SICR_ENET_MASK ((uint)0x0000ff00) 5021da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SICR_ENET_CLKRT ((uint)0x00002c00) 5031da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#endif 5041da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 5051da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* SCC Event register as used by Ethernet. 5061da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds*/ 5071da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SCCE_ENET_GRA ((ushort)0x0080) /* Graceful stop complete */ 5081da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SCCE_ENET_TXE ((ushort)0x0010) /* Transmit Error */ 5091da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SCCE_ENET_RXF ((ushort)0x0008) /* Full frame received */ 5101da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SCCE_ENET_BSY ((ushort)0x0004) /* All incoming buffers full */ 5111da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SCCE_ENET_TXB ((ushort)0x0002) /* A buffer was transmitted */ 5121da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SCCE_ENET_RXB ((ushort)0x0001) /* A buffer was received */ 5131da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 5141da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* SCC Mode Register (PMSR) as used by Ethernet. 5151da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds*/ 5161da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SCC_PMSR_HBC ((ushort)0x8000) /* Enable heartbeat */ 5171da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SCC_PMSR_FC ((ushort)0x4000) /* Force collision */ 5181da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SCC_PMSR_RSH ((ushort)0x2000) /* Receive short frames */ 5191da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SCC_PMSR_IAM ((ushort)0x1000) /* Check individual hash */ 5201da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SCC_PMSR_ENCRC ((ushort)0x0800) /* Ethernet CRC mode */ 5211da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SCC_PMSR_PRO ((ushort)0x0200) /* Promiscuous mode */ 5221da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SCC_PMSR_BRO ((ushort)0x0100) /* Catch broadcast pkts */ 5231da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SCC_PMSR_SBT ((ushort)0x0080) /* Special backoff timer */ 5241da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SCC_PMSR_LPB ((ushort)0x0040) /* Set Loopback mode */ 5251da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SCC_PMSR_SIP ((ushort)0x0020) /* Sample Input Pins */ 5261da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SCC_PMSR_LCW ((ushort)0x0010) /* Late collision window */ 5271da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SCC_PMSR_NIB22 ((ushort)0x000a) /* Start frame search */ 5281da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SCC_PMSR_FDE ((ushort)0x0001) /* Full duplex enable */ 5291da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 5301da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* Buffer descriptor control/status used by Ethernet receive. 5311da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds*/ 5321da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define BD_ENET_RX_EMPTY ((ushort)0x8000) 5331da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define BD_ENET_RX_WRAP ((ushort)0x2000) 5341da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define BD_ENET_RX_INTR ((ushort)0x1000) 5351da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define BD_ENET_RX_LAST ((ushort)0x0800) 5361da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define BD_ENET_RX_FIRST ((ushort)0x0400) 5371da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define BD_ENET_RX_MISS ((ushort)0x0100) 5381da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define BD_ENET_RX_LG ((ushort)0x0020) 5391da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define BD_ENET_RX_NO ((ushort)0x0010) 5401da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define BD_ENET_RX_SH ((ushort)0x0008) 5411da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define BD_ENET_RX_CR ((ushort)0x0004) 5421da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define BD_ENET_RX_OV ((ushort)0x0002) 5431da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define BD_ENET_RX_CL ((ushort)0x0001) 5441da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define BD_ENET_RX_STATS ((ushort)0x013f) /* All status bits */ 5451da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 5461da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* Buffer descriptor control/status used by Ethernet transmit. 5471da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds*/ 5481da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define BD_ENET_TX_READY ((ushort)0x8000) 5491da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define BD_ENET_TX_PAD ((ushort)0x4000) 5501da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define BD_ENET_TX_WRAP ((ushort)0x2000) 5511da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define BD_ENET_TX_INTR ((ushort)0x1000) 5521da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define BD_ENET_TX_LAST ((ushort)0x0800) 5531da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define BD_ENET_TX_TC ((ushort)0x0400) 5541da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define BD_ENET_TX_DEF ((ushort)0x0200) 5551da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define BD_ENET_TX_HB ((ushort)0x0100) 5561da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define BD_ENET_TX_LC ((ushort)0x0080) 5571da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define BD_ENET_TX_RL ((ushort)0x0040) 5581da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define BD_ENET_TX_RCMASK ((ushort)0x003c) 5591da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define BD_ENET_TX_UN ((ushort)0x0002) 5601da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define BD_ENET_TX_CSL ((ushort)0x0001) 5611da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define BD_ENET_TX_STATS ((ushort)0x03ff) /* All status bits */ 5621da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 5631da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* SCC as UART 5641da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds*/ 5651da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldstypedef struct scc_uart { 5661da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds sccp_t scc_genscc; 5671da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds uint scc_res1; /* Reserved */ 5681da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds uint scc_res2; /* Reserved */ 5691da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ushort scc_maxidl; /* Maximum idle chars */ 5701da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ushort scc_idlc; /* temp idle counter */ 5711da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ushort scc_brkcr; /* Break count register */ 5721da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ushort scc_parec; /* receive parity error counter */ 5731da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ushort scc_frmec; /* receive framing error counter */ 5741da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ushort scc_nosec; /* receive noise counter */ 5751da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ushort scc_brkec; /* receive break condition counter */ 5761da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ushort scc_brkln; /* last received break length */ 5771da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ushort scc_uaddr1; /* UART address character 1 */ 5781da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ushort scc_uaddr2; /* UART address character 2 */ 5791da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ushort scc_rtemp; /* Temp storage */ 5801da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ushort scc_toseq; /* Transmit out of sequence char */ 5811da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ushort scc_char1; /* control character 1 */ 5821da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ushort scc_char2; /* control character 2 */ 5831da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ushort scc_char3; /* control character 3 */ 5841da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ushort scc_char4; /* control character 4 */ 5851da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ushort scc_char5; /* control character 5 */ 5861da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ushort scc_char6; /* control character 6 */ 5871da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ushort scc_char7; /* control character 7 */ 5881da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ushort scc_char8; /* control character 8 */ 5891da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ushort scc_rccm; /* receive control character mask */ 5901da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ushort scc_rccr; /* receive control character register */ 5911da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ushort scc_rlbc; /* receive last break character */ 5921da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} scc_uart_t; 5931da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 5941da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* SCC Event and Mask registers when it is used as a UART. 5951da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds*/ 5961da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define UART_SCCM_GLR ((ushort)0x1000) 5971da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define UART_SCCM_GLT ((ushort)0x0800) 5981da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define UART_SCCM_AB ((ushort)0x0200) 5991da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define UART_SCCM_IDL ((ushort)0x0100) 6001da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define UART_SCCM_GRA ((ushort)0x0080) 6011da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define UART_SCCM_BRKE ((ushort)0x0040) 6021da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define UART_SCCM_BRKS ((ushort)0x0020) 6031da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define UART_SCCM_CCR ((ushort)0x0008) 6041da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define UART_SCCM_BSY ((ushort)0x0004) 6051da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define UART_SCCM_TX ((ushort)0x0002) 6061da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define UART_SCCM_RX ((ushort)0x0001) 6071da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 6081da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* The SCC PMSR when used as a UART. 6091da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds*/ 6101da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SCU_PMSR_FLC ((ushort)0x8000) 6111da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SCU_PMSR_SL ((ushort)0x4000) 6121da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SCU_PMSR_CL ((ushort)0x3000) 6131da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SCU_PMSR_UM ((ushort)0x0c00) 6141da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SCU_PMSR_FRZ ((ushort)0x0200) 6151da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SCU_PMSR_RZS ((ushort)0x0100) 6161da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SCU_PMSR_SYN ((ushort)0x0080) 6171da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SCU_PMSR_DRT ((ushort)0x0040) 6181da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SCU_PMSR_PEN ((ushort)0x0010) 6191da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SCU_PMSR_RPM ((ushort)0x000c) 6201da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SCU_PMSR_REVP ((ushort)0x0008) 6211da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SCU_PMSR_TPM ((ushort)0x0003) 6221da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SCU_PMSR_TEVP ((ushort)0x0003) 6231da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 6241da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* CPM Transparent mode SCC. 6251da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 6261da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldstypedef struct scc_trans { 6271da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds sccp_t st_genscc; 6281da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds uint st_cpres; /* Preset CRC */ 6291da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds uint st_cmask; /* Constant mask for CRC */ 6301da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} scc_trans_t; 6311da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 6321da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define BD_SCC_TX_LAST ((ushort)0x0800) 6331da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 6341da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 6351da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 6361da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* CPM interrupts. There are nearly 32 interrupts generated by CPM 6371da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * channels or devices. All of these are presented to the PPC core 6381da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * as a single interrupt. The CPM interrupt handler dispatches its 6391da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * own handlers, in a similar fashion to the PPC core handler. We 6401da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * use the table as defined in the manuals (i.e. no special high 6411da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * priority and SCC1 == SCCa, etc...). 6421da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 6431da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* #define CPMVEC_NR 32 */ 6441da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* #define CPMVEC_PIO_PC15 ((ushort)0x1f) */ 6451da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* #define CPMVEC_SCC1 ((ushort)0x1e) */ 6461da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* #define CPMVEC_SCC2 ((ushort)0x1d) */ 6471da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* #define CPMVEC_SCC3 ((ushort)0x1c) */ 6481da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* #define CPMVEC_SCC4 ((ushort)0x1b) */ 6491da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* #define CPMVEC_PIO_PC14 ((ushort)0x1a) */ 6501da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* #define CPMVEC_TIMER1 ((ushort)0x19) */ 6511da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* #define CPMVEC_PIO_PC13 ((ushort)0x18) */ 6521da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* #define CPMVEC_PIO_PC12 ((ushort)0x17) */ 6531da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* #define CPMVEC_SDMA_CB_ERR ((ushort)0x16) */ 6541da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* #define CPMVEC_IDMA1 ((ushort)0x15) */ 6551da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* #define CPMVEC_IDMA2 ((ushort)0x14) */ 6561da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* #define CPMVEC_TIMER2 ((ushort)0x12) */ 6571da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* #define CPMVEC_RISCTIMER ((ushort)0x11) */ 6581da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* #define CPMVEC_I2C ((ushort)0x10) */ 6591da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* #define CPMVEC_PIO_PC11 ((ushort)0x0f) */ 6601da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* #define CPMVEC_PIO_PC10 ((ushort)0x0e) */ 6611da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* #define CPMVEC_TIMER3 ((ushort)0x0c) */ 6621da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* #define CPMVEC_PIO_PC9 ((ushort)0x0b) */ 6631da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* #define CPMVEC_PIO_PC8 ((ushort)0x0a) */ 6641da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* #define CPMVEC_PIO_PC7 ((ushort)0x09) */ 6651da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* #define CPMVEC_TIMER4 ((ushort)0x07) */ 6661da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* #define CPMVEC_PIO_PC6 ((ushort)0x06) */ 6671da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* #define CPMVEC_SPI ((ushort)0x05) */ 6681da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* #define CPMVEC_SMC1 ((ushort)0x04) */ 6691da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* #define CPMVEC_SMC2 ((ushort)0x03) */ 6701da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* #define CPMVEC_PIO_PC5 ((ushort)0x02) */ 6711da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* #define CPMVEC_PIO_PC4 ((ushort)0x01) */ 6721da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* #define CPMVEC_ERROR ((ushort)0x00) */ 6731da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 6741da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsextern void cpm_install_handler(int vec, void (*handler)(void *), void *dev_id); 6751da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 6761da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* CPM interrupt configuration vector. 6771da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds*/ 6781da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CICR_SCD_SCC4 ((uint)0x00c00000) /* SCC4 @ SCCd */ 6791da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CICR_SCC_SCC3 ((uint)0x00200000) /* SCC3 @ SCCc */ 6801da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CICR_SCB_SCC2 ((uint)0x00040000) /* SCC2 @ SCCb */ 6811da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CICR_SCA_SCC1 ((uint)0x00000000) /* SCC1 @ SCCa */ 682ab690d9fedf5103bc3057bcd20555159f613b5f2Joe Perches#define CICR_IRL_MASK ((uint)0x0000e000) /* Core interrupt */ 6831da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CICR_HP_MASK ((uint)0x00001f00) /* Hi-pri int. */ 6841da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CICR_IEN ((uint)0x00000080) /* Int. enable */ 6851da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CICR_SPS ((uint)0x00000001) /* SCC Spread */ 6861da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#endif /* __CPM_360__ */ 687