1/*
2 * Copyright (C) 2001, 2002, 2003 Broadcom Corporation
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; either version 2
7 * of the License, or (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.
17 */
18
19#include <linux/init.h>
20#include <linux/delay.h>
21#include <linux/interrupt.h>
22#include <linux/smp.h>
23#include <linux/kernel_stat.h>
24#include <linux/sched.h>
25
26#include <asm/mmu_context.h>
27#include <asm/io.h>
28#include <asm/fw/cfe/cfe_api.h>
29#include <asm/sibyte/sb1250.h>
30#include <asm/sibyte/sb1250_regs.h>
31#include <asm/sibyte/sb1250_int.h>
32
33static void *mailbox_set_regs[] = {
34	IOADDR(A_IMR_CPU0_BASE + R_IMR_MAILBOX_SET_CPU),
35	IOADDR(A_IMR_CPU1_BASE + R_IMR_MAILBOX_SET_CPU)
36};
37
38static void *mailbox_clear_regs[] = {
39	IOADDR(A_IMR_CPU0_BASE + R_IMR_MAILBOX_CLR_CPU),
40	IOADDR(A_IMR_CPU1_BASE + R_IMR_MAILBOX_CLR_CPU)
41};
42
43static void *mailbox_regs[] = {
44	IOADDR(A_IMR_CPU0_BASE + R_IMR_MAILBOX_CPU),
45	IOADDR(A_IMR_CPU1_BASE + R_IMR_MAILBOX_CPU)
46};
47
48/*
49 * SMP init and finish on secondary CPUs
50 */
51void sb1250_smp_init(void)
52{
53	unsigned int imask = STATUSF_IP4 | STATUSF_IP3 | STATUSF_IP2 |
54		STATUSF_IP1 | STATUSF_IP0;
55
56	/* Set interrupt mask, but don't enable */
57	change_c0_status(ST0_IM, imask);
58}
59
60/*
61 * These are routines for dealing with the sb1250 smp capabilities
62 * independent of board/firmware
63 */
64
65/*
66 * Simple enough; everything is set up, so just poke the appropriate mailbox
67 * register, and we should be set
68 */
69static void sb1250_send_ipi_single(int cpu, unsigned int action)
70{
71	__raw_writeq((((u64)action) << 48), mailbox_set_regs[cpu]);
72}
73
74static inline void sb1250_send_ipi_mask(const struct cpumask *mask,
75					unsigned int action)
76{
77	unsigned int i;
78
79	for_each_cpu(i, mask)
80		sb1250_send_ipi_single(i, action);
81}
82
83/*
84 * Code to run on secondary just after probing the CPU
85 */
86static void sb1250_init_secondary(void)
87{
88	extern void sb1250_smp_init(void);
89
90	sb1250_smp_init();
91}
92
93/*
94 * Do any tidying up before marking online and running the idle
95 * loop
96 */
97static void sb1250_smp_finish(void)
98{
99	extern void sb1250_clockevent_init(void);
100
101	sb1250_clockevent_init();
102	local_irq_enable();
103}
104
105/*
106 * Setup the PC, SP, and GP of a secondary processor and start it
107 * running!
108 */
109static void sb1250_boot_secondary(int cpu, struct task_struct *idle)
110{
111	int retval;
112
113	retval = cfe_cpu_start(cpu_logical_map(cpu), &smp_bootstrap,
114			       __KSTK_TOS(idle),
115			       (unsigned long)task_thread_info(idle), 0);
116	if (retval != 0)
117		printk("cfe_start_cpu(%i) returned %i\n" , cpu, retval);
118}
119
120/*
121 * Use CFE to find out how many CPUs are available, setting up
122 * cpu_possible_mask and the logical/physical mappings.
123 * XXXKW will the boot CPU ever not be physical 0?
124 *
125 * Common setup before any secondaries are started
126 */
127static void __init sb1250_smp_setup(void)
128{
129	int i, num;
130
131	init_cpu_possible(cpumask_of(0));
132	__cpu_number_map[0] = 0;
133	__cpu_logical_map[0] = 0;
134
135	for (i = 1, num = 0; i < NR_CPUS; i++) {
136		if (cfe_cpu_stop(i) == 0) {
137			set_cpu_possible(i, true);
138			__cpu_number_map[i] = ++num;
139			__cpu_logical_map[num] = i;
140		}
141	}
142	printk(KERN_INFO "Detected %i available secondary CPU(s)\n", num);
143}
144
145static void __init sb1250_prepare_cpus(unsigned int max_cpus)
146{
147}
148
149struct plat_smp_ops sb_smp_ops = {
150	.send_ipi_single	= sb1250_send_ipi_single,
151	.send_ipi_mask		= sb1250_send_ipi_mask,
152	.init_secondary		= sb1250_init_secondary,
153	.smp_finish		= sb1250_smp_finish,
154	.boot_secondary		= sb1250_boot_secondary,
155	.smp_setup		= sb1250_smp_setup,
156	.prepare_cpus		= sb1250_prepare_cpus,
157};
158
159void sb1250_mailbox_interrupt(void)
160{
161	int cpu = smp_processor_id();
162	int irq = K_INT_MBOX_0;
163	unsigned int action;
164
165	kstat_incr_irq_this_cpu(irq);
166	/* Load the mailbox register to figure out what we're supposed to do */
167	action = (____raw_readq(mailbox_regs[cpu]) >> 48) & 0xffff;
168
169	/* Clear the mailbox to clear the interrupt */
170	____raw_writeq(((u64)action) << 48, mailbox_clear_regs[cpu]);
171
172	if (action & SMP_RESCHEDULE_YOURSELF)
173		scheduler_ipi();
174
175	if (action & SMP_CALL_FUNCTION)
176		smp_call_function_interrupt();
177}
178