1/* 2 * intel_mid_sfi.c: Intel MID SFI initialization code 3 * 4 * (C) Copyright 2013 Intel Corporation 5 * Author: Sathyanarayanan Kuppuswamy <sathyanarayanan.kuppuswamy@intel.com> 6 * 7 * This program is free software; you can redistribute it and/or 8 * modify it under the terms of the GNU General Public License 9 * as published by the Free Software Foundation; version 2 10 * of the License. 11 */ 12 13#include <linux/init.h> 14#include <linux/kernel.h> 15#include <linux/interrupt.h> 16#include <linux/scatterlist.h> 17#include <linux/sfi.h> 18#include <linux/intel_pmic_gpio.h> 19#include <linux/spi/spi.h> 20#include <linux/i2c.h> 21#include <linux/skbuff.h> 22#include <linux/gpio.h> 23#include <linux/gpio_keys.h> 24#include <linux/input.h> 25#include <linux/platform_device.h> 26#include <linux/irq.h> 27#include <linux/module.h> 28#include <linux/notifier.h> 29#include <linux/mmc/core.h> 30#include <linux/mmc/card.h> 31#include <linux/blkdev.h> 32 33#include <asm/setup.h> 34#include <asm/mpspec_def.h> 35#include <asm/hw_irq.h> 36#include <asm/apic.h> 37#include <asm/io_apic.h> 38#include <asm/intel-mid.h> 39#include <asm/intel_mid_vrtc.h> 40#include <asm/io.h> 41#include <asm/i8259.h> 42#include <asm/intel_scu_ipc.h> 43#include <asm/apb_timer.h> 44#include <asm/reboot.h> 45 46#define SFI_SIG_OEM0 "OEM0" 47#define MAX_IPCDEVS 24 48#define MAX_SCU_SPI 24 49#define MAX_SCU_I2C 24 50 51static struct platform_device *ipc_devs[MAX_IPCDEVS]; 52static struct spi_board_info *spi_devs[MAX_SCU_SPI]; 53static struct i2c_board_info *i2c_devs[MAX_SCU_I2C]; 54static struct sfi_gpio_table_entry *gpio_table; 55static struct sfi_timer_table_entry sfi_mtimer_array[SFI_MTMR_MAX_NUM]; 56static int ipc_next_dev; 57static int spi_next_dev; 58static int i2c_next_dev; 59static int i2c_bus[MAX_SCU_I2C]; 60static int gpio_num_entry; 61static u32 sfi_mtimer_usage[SFI_MTMR_MAX_NUM]; 62int sfi_mrtc_num; 63int sfi_mtimer_num; 64 65struct sfi_rtc_table_entry sfi_mrtc_array[SFI_MRTC_MAX]; 66EXPORT_SYMBOL_GPL(sfi_mrtc_array); 67 68struct blocking_notifier_head intel_scu_notifier = 69 BLOCKING_NOTIFIER_INIT(intel_scu_notifier); 70EXPORT_SYMBOL_GPL(intel_scu_notifier); 71 72#define intel_mid_sfi_get_pdata(dev, priv) \ 73 ((dev)->get_platform_data ? (dev)->get_platform_data(priv) : NULL) 74 75/* parse all the mtimer info to a static mtimer array */ 76int __init sfi_parse_mtmr(struct sfi_table_header *table) 77{ 78 struct sfi_table_simple *sb; 79 struct sfi_timer_table_entry *pentry; 80 struct mpc_intsrc mp_irq; 81 int totallen; 82 83 sb = (struct sfi_table_simple *)table; 84 if (!sfi_mtimer_num) { 85 sfi_mtimer_num = SFI_GET_NUM_ENTRIES(sb, 86 struct sfi_timer_table_entry); 87 pentry = (struct sfi_timer_table_entry *) sb->pentry; 88 totallen = sfi_mtimer_num * sizeof(*pentry); 89 memcpy(sfi_mtimer_array, pentry, totallen); 90 } 91 92 pr_debug("SFI MTIMER info (num = %d):\n", sfi_mtimer_num); 93 pentry = sfi_mtimer_array; 94 for (totallen = 0; totallen < sfi_mtimer_num; totallen++, pentry++) { 95 pr_debug("timer[%d]: paddr = 0x%08x, freq = %dHz, irq = %d\n", 96 totallen, (u32)pentry->phys_addr, 97 pentry->freq_hz, pentry->irq); 98 if (!pentry->irq) 99 continue; 100 mp_irq.type = MP_INTSRC; 101 mp_irq.irqtype = mp_INT; 102/* triggering mode edge bit 2-3, active high polarity bit 0-1 */ 103 mp_irq.irqflag = 5; 104 mp_irq.srcbus = MP_BUS_ISA; 105 mp_irq.srcbusirq = pentry->irq; /* IRQ */ 106 mp_irq.dstapic = MP_APIC_ALL; 107 mp_irq.dstirq = pentry->irq; 108 mp_save_irq(&mp_irq); 109 mp_map_gsi_to_irq(pentry->irq, IOAPIC_MAP_ALLOC); 110 } 111 112 return 0; 113} 114 115struct sfi_timer_table_entry *sfi_get_mtmr(int hint) 116{ 117 int i; 118 if (hint < sfi_mtimer_num) { 119 if (!sfi_mtimer_usage[hint]) { 120 pr_debug("hint taken for timer %d irq %d\n", 121 hint, sfi_mtimer_array[hint].irq); 122 sfi_mtimer_usage[hint] = 1; 123 return &sfi_mtimer_array[hint]; 124 } 125 } 126 /* take the first timer available */ 127 for (i = 0; i < sfi_mtimer_num;) { 128 if (!sfi_mtimer_usage[i]) { 129 sfi_mtimer_usage[i] = 1; 130 return &sfi_mtimer_array[i]; 131 } 132 i++; 133 } 134 return NULL; 135} 136 137void sfi_free_mtmr(struct sfi_timer_table_entry *mtmr) 138{ 139 int i; 140 for (i = 0; i < sfi_mtimer_num;) { 141 if (mtmr->irq == sfi_mtimer_array[i].irq) { 142 sfi_mtimer_usage[i] = 0; 143 return; 144 } 145 i++; 146 } 147} 148 149/* parse all the mrtc info to a global mrtc array */ 150int __init sfi_parse_mrtc(struct sfi_table_header *table) 151{ 152 struct sfi_table_simple *sb; 153 struct sfi_rtc_table_entry *pentry; 154 struct mpc_intsrc mp_irq; 155 156 int totallen; 157 158 sb = (struct sfi_table_simple *)table; 159 if (!sfi_mrtc_num) { 160 sfi_mrtc_num = SFI_GET_NUM_ENTRIES(sb, 161 struct sfi_rtc_table_entry); 162 pentry = (struct sfi_rtc_table_entry *)sb->pentry; 163 totallen = sfi_mrtc_num * sizeof(*pentry); 164 memcpy(sfi_mrtc_array, pentry, totallen); 165 } 166 167 pr_debug("SFI RTC info (num = %d):\n", sfi_mrtc_num); 168 pentry = sfi_mrtc_array; 169 for (totallen = 0; totallen < sfi_mrtc_num; totallen++, pentry++) { 170 pr_debug("RTC[%d]: paddr = 0x%08x, irq = %d\n", 171 totallen, (u32)pentry->phys_addr, pentry->irq); 172 mp_irq.type = MP_INTSRC; 173 mp_irq.irqtype = mp_INT; 174 mp_irq.irqflag = 0xf; /* level trigger and active low */ 175 mp_irq.srcbus = MP_BUS_ISA; 176 mp_irq.srcbusirq = pentry->irq; /* IRQ */ 177 mp_irq.dstapic = MP_APIC_ALL; 178 mp_irq.dstirq = pentry->irq; 179 mp_save_irq(&mp_irq); 180 mp_map_gsi_to_irq(pentry->irq, IOAPIC_MAP_ALLOC); 181 } 182 return 0; 183} 184 185 186/* 187 * Parsing GPIO table first, since the DEVS table will need this table 188 * to map the pin name to the actual pin. 189 */ 190static int __init sfi_parse_gpio(struct sfi_table_header *table) 191{ 192 struct sfi_table_simple *sb; 193 struct sfi_gpio_table_entry *pentry; 194 int num, i; 195 196 if (gpio_table) 197 return 0; 198 sb = (struct sfi_table_simple *)table; 199 num = SFI_GET_NUM_ENTRIES(sb, struct sfi_gpio_table_entry); 200 pentry = (struct sfi_gpio_table_entry *)sb->pentry; 201 202 gpio_table = kmalloc(num * sizeof(*pentry), GFP_KERNEL); 203 if (!gpio_table) 204 return -1; 205 memcpy(gpio_table, pentry, num * sizeof(*pentry)); 206 gpio_num_entry = num; 207 208 pr_debug("GPIO pin info:\n"); 209 for (i = 0; i < num; i++, pentry++) 210 pr_debug("info[%2d]: controller = %16.16s, pin_name = %16.16s," 211 " pin = %d\n", i, 212 pentry->controller_name, 213 pentry->pin_name, 214 pentry->pin_no); 215 return 0; 216} 217 218int get_gpio_by_name(const char *name) 219{ 220 struct sfi_gpio_table_entry *pentry = gpio_table; 221 int i; 222 223 if (!pentry) 224 return -1; 225 for (i = 0; i < gpio_num_entry; i++, pentry++) { 226 if (!strncmp(name, pentry->pin_name, SFI_NAME_LEN)) 227 return pentry->pin_no; 228 } 229 return -EINVAL; 230} 231 232void __init intel_scu_device_register(struct platform_device *pdev) 233{ 234 if (ipc_next_dev == MAX_IPCDEVS) 235 pr_err("too many SCU IPC devices"); 236 else 237 ipc_devs[ipc_next_dev++] = pdev; 238} 239 240static void __init intel_scu_spi_device_register(struct spi_board_info *sdev) 241{ 242 struct spi_board_info *new_dev; 243 244 if (spi_next_dev == MAX_SCU_SPI) { 245 pr_err("too many SCU SPI devices"); 246 return; 247 } 248 249 new_dev = kzalloc(sizeof(*sdev), GFP_KERNEL); 250 if (!new_dev) { 251 pr_err("failed to alloc mem for delayed spi dev %s\n", 252 sdev->modalias); 253 return; 254 } 255 *new_dev = *sdev; 256 257 spi_devs[spi_next_dev++] = new_dev; 258} 259 260static void __init intel_scu_i2c_device_register(int bus, 261 struct i2c_board_info *idev) 262{ 263 struct i2c_board_info *new_dev; 264 265 if (i2c_next_dev == MAX_SCU_I2C) { 266 pr_err("too many SCU I2C devices"); 267 return; 268 } 269 270 new_dev = kzalloc(sizeof(*idev), GFP_KERNEL); 271 if (!new_dev) { 272 pr_err("failed to alloc mem for delayed i2c dev %s\n", 273 idev->type); 274 return; 275 } 276 *new_dev = *idev; 277 278 i2c_bus[i2c_next_dev] = bus; 279 i2c_devs[i2c_next_dev++] = new_dev; 280} 281 282/* Called by IPC driver */ 283void intel_scu_devices_create(void) 284{ 285 int i; 286 287 for (i = 0; i < ipc_next_dev; i++) 288 platform_device_add(ipc_devs[i]); 289 290 for (i = 0; i < spi_next_dev; i++) 291 spi_register_board_info(spi_devs[i], 1); 292 293 for (i = 0; i < i2c_next_dev; i++) { 294 struct i2c_adapter *adapter; 295 struct i2c_client *client; 296 297 adapter = i2c_get_adapter(i2c_bus[i]); 298 if (adapter) { 299 client = i2c_new_device(adapter, i2c_devs[i]); 300 if (!client) 301 pr_err("can't create i2c device %s\n", 302 i2c_devs[i]->type); 303 } else 304 i2c_register_board_info(i2c_bus[i], i2c_devs[i], 1); 305 } 306 intel_scu_notifier_post(SCU_AVAILABLE, NULL); 307} 308EXPORT_SYMBOL_GPL(intel_scu_devices_create); 309 310/* Called by IPC driver */ 311void intel_scu_devices_destroy(void) 312{ 313 int i; 314 315 intel_scu_notifier_post(SCU_DOWN, NULL); 316 317 for (i = 0; i < ipc_next_dev; i++) 318 platform_device_del(ipc_devs[i]); 319} 320EXPORT_SYMBOL_GPL(intel_scu_devices_destroy); 321 322static void __init install_irq_resource(struct platform_device *pdev, int irq) 323{ 324 /* Single threaded */ 325 static struct resource res __initdata = { 326 .name = "IRQ", 327 .flags = IORESOURCE_IRQ, 328 }; 329 res.start = irq; 330 platform_device_add_resources(pdev, &res, 1); 331} 332 333static void __init sfi_handle_ipc_dev(struct sfi_device_table_entry *pentry, 334 struct devs_id *dev) 335{ 336 struct platform_device *pdev; 337 void *pdata = NULL; 338 339 pr_debug("IPC bus, name = %16.16s, irq = 0x%2x\n", 340 pentry->name, pentry->irq); 341 pdata = intel_mid_sfi_get_pdata(dev, pentry); 342 if (IS_ERR(pdata)) 343 return; 344 345 pdev = platform_device_alloc(pentry->name, 0); 346 if (pdev == NULL) { 347 pr_err("out of memory for SFI platform device '%s'.\n", 348 pentry->name); 349 return; 350 } 351 install_irq_resource(pdev, pentry->irq); 352 353 pdev->dev.platform_data = pdata; 354 platform_device_add(pdev); 355} 356 357static void __init sfi_handle_spi_dev(struct sfi_device_table_entry *pentry, 358 struct devs_id *dev) 359{ 360 struct spi_board_info spi_info; 361 void *pdata = NULL; 362 363 memset(&spi_info, 0, sizeof(spi_info)); 364 strncpy(spi_info.modalias, pentry->name, SFI_NAME_LEN); 365 spi_info.irq = ((pentry->irq == (u8)0xff) ? 0 : pentry->irq); 366 spi_info.bus_num = pentry->host_num; 367 spi_info.chip_select = pentry->addr; 368 spi_info.max_speed_hz = pentry->max_freq; 369 pr_debug("SPI bus=%d, name=%16.16s, irq=0x%2x, max_freq=%d, cs=%d\n", 370 spi_info.bus_num, 371 spi_info.modalias, 372 spi_info.irq, 373 spi_info.max_speed_hz, 374 spi_info.chip_select); 375 376 pdata = intel_mid_sfi_get_pdata(dev, &spi_info); 377 if (IS_ERR(pdata)) 378 return; 379 380 spi_info.platform_data = pdata; 381 if (dev->delay) 382 intel_scu_spi_device_register(&spi_info); 383 else 384 spi_register_board_info(&spi_info, 1); 385} 386 387static void __init sfi_handle_i2c_dev(struct sfi_device_table_entry *pentry, 388 struct devs_id *dev) 389{ 390 struct i2c_board_info i2c_info; 391 void *pdata = NULL; 392 393 memset(&i2c_info, 0, sizeof(i2c_info)); 394 strncpy(i2c_info.type, pentry->name, SFI_NAME_LEN); 395 i2c_info.irq = ((pentry->irq == (u8)0xff) ? 0 : pentry->irq); 396 i2c_info.addr = pentry->addr; 397 pr_debug("I2C bus = %d, name = %16.16s, irq = 0x%2x, addr = 0x%x\n", 398 pentry->host_num, 399 i2c_info.type, 400 i2c_info.irq, 401 i2c_info.addr); 402 pdata = intel_mid_sfi_get_pdata(dev, &i2c_info); 403 i2c_info.platform_data = pdata; 404 if (IS_ERR(pdata)) 405 return; 406 407 if (dev->delay) 408 intel_scu_i2c_device_register(pentry->host_num, &i2c_info); 409 else 410 i2c_register_board_info(pentry->host_num, &i2c_info, 1); 411} 412 413extern struct devs_id *const __x86_intel_mid_dev_start[], 414 *const __x86_intel_mid_dev_end[]; 415 416static struct devs_id __init *get_device_id(u8 type, char *name) 417{ 418 struct devs_id *const *dev_table; 419 420 for (dev_table = __x86_intel_mid_dev_start; 421 dev_table < __x86_intel_mid_dev_end; dev_table++) { 422 struct devs_id *dev = *dev_table; 423 if (dev->type == type && 424 !strncmp(dev->name, name, SFI_NAME_LEN)) { 425 return dev; 426 } 427 } 428 429 return NULL; 430} 431 432static int __init sfi_parse_devs(struct sfi_table_header *table) 433{ 434 struct sfi_table_simple *sb; 435 struct sfi_device_table_entry *pentry; 436 struct devs_id *dev = NULL; 437 int num, i, ret; 438 int polarity; 439 440 sb = (struct sfi_table_simple *)table; 441 num = SFI_GET_NUM_ENTRIES(sb, struct sfi_device_table_entry); 442 pentry = (struct sfi_device_table_entry *)sb->pentry; 443 444 for (i = 0; i < num; i++, pentry++) { 445 int irq = pentry->irq; 446 447 if (irq != (u8)0xff) { /* native RTE case */ 448 /* these SPI2 devices are not exposed to system as PCI 449 * devices, but they have separate RTE entry in IOAPIC 450 * so we have to enable them one by one here 451 */ 452 if (intel_mid_identify_cpu() == 453 INTEL_MID_CPU_CHIP_TANGIER) { 454 if (!strncmp(pentry->name, "r69001-ts-i2c", 13)) 455 /* active low */ 456 polarity = 1; 457 else if (!strncmp(pentry->name, 458 "synaptics_3202", 14)) 459 /* active low */ 460 polarity = 1; 461 else if (irq == 41) 462 /* fast_int_1 */ 463 polarity = 1; 464 else 465 /* active high */ 466 polarity = 0; 467 } else { 468 /* PNW and CLV go with active low */ 469 polarity = 1; 470 } 471 472 ret = mp_set_gsi_attr(irq, 1, polarity, NUMA_NO_NODE); 473 if (ret == 0) 474 ret = mp_map_gsi_to_irq(irq, IOAPIC_MAP_ALLOC); 475 WARN_ON(ret < 0); 476 } 477 478 dev = get_device_id(pentry->type, pentry->name); 479 480 if (!dev) 481 continue; 482 483 if (dev->device_handler) { 484 dev->device_handler(pentry, dev); 485 } else { 486 switch (pentry->type) { 487 case SFI_DEV_TYPE_IPC: 488 sfi_handle_ipc_dev(pentry, dev); 489 break; 490 case SFI_DEV_TYPE_SPI: 491 sfi_handle_spi_dev(pentry, dev); 492 break; 493 case SFI_DEV_TYPE_I2C: 494 sfi_handle_i2c_dev(pentry, dev); 495 break; 496 case SFI_DEV_TYPE_UART: 497 case SFI_DEV_TYPE_HSI: 498 default: 499 break; 500 } 501 } 502 } 503 return 0; 504} 505 506static int __init intel_mid_platform_init(void) 507{ 508 sfi_table_parse(SFI_SIG_GPIO, NULL, NULL, sfi_parse_gpio); 509 sfi_table_parse(SFI_SIG_DEVS, NULL, NULL, sfi_parse_devs); 510 return 0; 511} 512arch_initcall(intel_mid_platform_init); 513