1/*
2 * arch/xtensa/kernel/pci.c
3 *
4 * PCI bios-type initialisation for PCI machines
5 *
6 * This program is free software; you can redistribute  it and/or modify it
7 * under  the terms of  the GNU General  Public License as published by the
8 * Free Software Foundation;  either version 2 of the  License, or (at your
9 * option) any later version.
10 *
11 * Copyright (C) 2001-2005 Tensilica Inc.
12 *
13 * Based largely on work from Cort (ppc/kernel/pci.c)
14 * IO functions copied from sparc.
15 *
16 * Chris Zankel <chris@zankel.net>
17 *
18 */
19
20#include <linux/kernel.h>
21#include <linux/pci.h>
22#include <linux/delay.h>
23#include <linux/string.h>
24#include <linux/init.h>
25#include <linux/sched.h>
26#include <linux/errno.h>
27#include <linux/bootmem.h>
28
29#include <asm/pci-bridge.h>
30#include <asm/platform.h>
31
32#undef DEBUG
33
34#ifdef DEBUG
35#define DBG(x...) printk(x)
36#else
37#define DBG(x...)
38#endif
39
40/* PCI Controller */
41
42
43/*
44 * pcibios_alloc_controller
45 * pcibios_enable_device
46 * pcibios_fixups
47 * pcibios_align_resource
48 * pcibios_fixup_bus
49 * pci_bus_add_device
50 * pci_mmap_page_range
51 */
52
53struct pci_controller* pci_ctrl_head;
54struct pci_controller** pci_ctrl_tail = &pci_ctrl_head;
55
56static int pci_bus_count;
57
58/*
59 * We need to avoid collisions with `mirrored' VGA ports
60 * and other strange ISA hardware, so we always want the
61 * addresses to be allocated in the 0x000-0x0ff region
62 * modulo 0x400.
63 *
64 * Why? Because some silly external IO cards only decode
65 * the low 10 bits of the IO address. The 0x00-0xff region
66 * is reserved for motherboard devices that decode all 16
67 * bits, so it's ok to allocate at, say, 0x2800-0x28ff,
68 * but we want to try to avoid allocating at 0x2900-0x2bff
69 * which might have be mirrored at 0x0100-0x03ff..
70 */
71resource_size_t
72pcibios_align_resource(void *data, const struct resource *res,
73		       resource_size_t size, resource_size_t align)
74{
75	struct pci_dev *dev = data;
76	resource_size_t start = res->start;
77
78	if (res->flags & IORESOURCE_IO) {
79		if (size > 0x100) {
80			pr_err("PCI: I/O Region %s/%d too large (%u bytes)\n",
81					pci_name(dev), dev->resource - res,
82					size);
83		}
84
85		if (start & 0x300)
86			start = (start + 0x3ff) & ~0x3ff;
87	}
88
89	return start;
90}
91
92int
93pcibios_enable_resources(struct pci_dev *dev, int mask)
94{
95	u16 cmd, old_cmd;
96	int idx;
97	struct resource *r;
98
99	pci_read_config_word(dev, PCI_COMMAND, &cmd);
100	old_cmd = cmd;
101	for(idx=0; idx<6; idx++) {
102		r = &dev->resource[idx];
103		if (!r->start && r->end) {
104			printk (KERN_ERR "PCI: Device %s not available because "
105				"of resource collisions\n", pci_name(dev));
106			return -EINVAL;
107		}
108		if (r->flags & IORESOURCE_IO)
109			cmd |= PCI_COMMAND_IO;
110		if (r->flags & IORESOURCE_MEM)
111			cmd |= PCI_COMMAND_MEMORY;
112	}
113	if (dev->resource[PCI_ROM_RESOURCE].start)
114		cmd |= PCI_COMMAND_MEMORY;
115	if (cmd != old_cmd) {
116		printk("PCI: Enabling device %s (%04x -> %04x)\n",
117			pci_name(dev), old_cmd, cmd);
118		pci_write_config_word(dev, PCI_COMMAND, cmd);
119	}
120	return 0;
121}
122
123struct pci_controller * __init pcibios_alloc_controller(void)
124{
125	struct pci_controller *pci_ctrl;
126
127	pci_ctrl = (struct pci_controller *)alloc_bootmem(sizeof(*pci_ctrl));
128	memset(pci_ctrl, 0, sizeof(struct pci_controller));
129
130	*pci_ctrl_tail = pci_ctrl;
131	pci_ctrl_tail = &pci_ctrl->next;
132
133	return pci_ctrl;
134}
135
136static void __init pci_controller_apertures(struct pci_controller *pci_ctrl,
137					    struct list_head *resources)
138{
139	struct resource *res;
140	unsigned long io_offset;
141	int i;
142
143	io_offset = (unsigned long)pci_ctrl->io_space.base;
144	res = &pci_ctrl->io_resource;
145	if (!res->flags) {
146		if (io_offset)
147			printk (KERN_ERR "I/O resource not set for host"
148				" bridge %d\n", pci_ctrl->index);
149		res->start = 0;
150		res->end = IO_SPACE_LIMIT;
151		res->flags = IORESOURCE_IO;
152	}
153	res->start += io_offset;
154	res->end += io_offset;
155	pci_add_resource_offset(resources, res, io_offset);
156
157	for (i = 0; i < 3; i++) {
158		res = &pci_ctrl->mem_resources[i];
159		if (!res->flags) {
160			if (i > 0)
161				continue;
162			printk(KERN_ERR "Memory resource not set for "
163			       "host bridge %d\n", pci_ctrl->index);
164			res->start = 0;
165			res->end = ~0U;
166			res->flags = IORESOURCE_MEM;
167		}
168		pci_add_resource(resources, res);
169	}
170}
171
172static int __init pcibios_init(void)
173{
174	struct pci_controller *pci_ctrl;
175	struct list_head resources;
176	struct pci_bus *bus;
177	int next_busno = 0;
178
179	printk("PCI: Probing PCI hardware\n");
180
181	/* Scan all of the recorded PCI controllers.  */
182	for (pci_ctrl = pci_ctrl_head; pci_ctrl; pci_ctrl = pci_ctrl->next) {
183		pci_ctrl->last_busno = 0xff;
184		INIT_LIST_HEAD(&resources);
185		pci_controller_apertures(pci_ctrl, &resources);
186		bus = pci_scan_root_bus(NULL, pci_ctrl->first_busno,
187					pci_ctrl->ops, pci_ctrl, &resources);
188		pci_ctrl->bus = bus;
189		pci_ctrl->last_busno = bus->busn_res.end;
190		if (next_busno <= pci_ctrl->last_busno)
191			next_busno = pci_ctrl->last_busno+1;
192	}
193	pci_bus_count = next_busno;
194
195	return platform_pcibios_fixup();
196}
197
198subsys_initcall(pcibios_init);
199
200void pcibios_fixup_bus(struct pci_bus *bus)
201{
202	if (bus->parent) {
203		/* This is a subordinate bridge */
204		pci_read_bridge_bases(bus);
205	}
206}
207
208void pcibios_set_master(struct pci_dev *dev)
209{
210	/* No special bus mastering setup handling */
211}
212
213int pcibios_enable_device(struct pci_dev *dev, int mask)
214{
215	u16 cmd, old_cmd;
216	int idx;
217	struct resource *r;
218
219	pci_read_config_word(dev, PCI_COMMAND, &cmd);
220	old_cmd = cmd;
221	for (idx=0; idx<6; idx++) {
222		r = &dev->resource[idx];
223		if (!r->start && r->end) {
224			printk(KERN_ERR "PCI: Device %s not available because "
225			       "of resource collisions\n", pci_name(dev));
226			return -EINVAL;
227		}
228		if (r->flags & IORESOURCE_IO)
229			cmd |= PCI_COMMAND_IO;
230		if (r->flags & IORESOURCE_MEM)
231			cmd |= PCI_COMMAND_MEMORY;
232	}
233	if (cmd != old_cmd) {
234		printk("PCI: Enabling device %s (%04x -> %04x)\n",
235		       pci_name(dev), old_cmd, cmd);
236		pci_write_config_word(dev, PCI_COMMAND, cmd);
237	}
238
239	return 0;
240}
241
242#ifdef CONFIG_PROC_FS
243
244/*
245 * Return the index of the PCI controller for device pdev.
246 */
247
248int
249pci_controller_num(struct pci_dev *dev)
250{
251	struct pci_controller *pci_ctrl = (struct pci_controller*) dev->sysdata;
252	return pci_ctrl->index;
253}
254
255#endif /* CONFIG_PROC_FS */
256
257/*
258 * Platform support for /proc/bus/pci/X/Y mmap()s,
259 * modelled on the sparc64 implementation by Dave Miller.
260 *  -- paulus.
261 */
262
263/*
264 * Adjust vm_pgoff of VMA such that it is the physical page offset
265 * corresponding to the 32-bit pci bus offset for DEV requested by the user.
266 *
267 * Basically, the user finds the base address for his device which he wishes
268 * to mmap.  They read the 32-bit value from the config space base register,
269 * add whatever PAGE_SIZE multiple offset they wish, and feed this into the
270 * offset parameter of mmap on /proc/bus/pci/XXX for that device.
271 *
272 * Returns negative error code on failure, zero on success.
273 */
274static __inline__ int
275__pci_mmap_make_offset(struct pci_dev *dev, struct vm_area_struct *vma,
276		       enum pci_mmap_state mmap_state)
277{
278	struct pci_controller *pci_ctrl = (struct pci_controller*) dev->sysdata;
279	unsigned long offset = vma->vm_pgoff << PAGE_SHIFT;
280	unsigned long io_offset = 0;
281	int i, res_bit;
282
283	if (pci_ctrl == 0)
284		return -EINVAL;		/* should never happen */
285
286	/* If memory, add on the PCI bridge address offset */
287	if (mmap_state == pci_mmap_mem) {
288		res_bit = IORESOURCE_MEM;
289	} else {
290		io_offset = (unsigned long)pci_ctrl->io_space.base;
291		offset += io_offset;
292		res_bit = IORESOURCE_IO;
293	}
294
295	/*
296	 * Check that the offset requested corresponds to one of the
297	 * resources of the device.
298	 */
299	for (i = 0; i <= PCI_ROM_RESOURCE; i++) {
300		struct resource *rp = &dev->resource[i];
301		int flags = rp->flags;
302
303		/* treat ROM as memory (should be already) */
304		if (i == PCI_ROM_RESOURCE)
305			flags |= IORESOURCE_MEM;
306
307		/* Active and same type? */
308		if ((flags & res_bit) == 0)
309			continue;
310
311		/* In the range of this resource? */
312		if (offset < (rp->start & PAGE_MASK) || offset > rp->end)
313			continue;
314
315		/* found it! construct the final physical address */
316		if (mmap_state == pci_mmap_io)
317			offset += pci_ctrl->io_space.start - io_offset;
318		vma->vm_pgoff = offset >> PAGE_SHIFT;
319		return 0;
320	}
321
322	return -EINVAL;
323}
324
325/*
326 * Set vm_page_prot of VMA, as appropriate for this architecture, for a pci
327 * device mapping.
328 */
329static __inline__ void
330__pci_mmap_set_pgprot(struct pci_dev *dev, struct vm_area_struct *vma,
331		      enum pci_mmap_state mmap_state, int write_combine)
332{
333	int prot = pgprot_val(vma->vm_page_prot);
334
335	/* Set to write-through */
336	prot = (prot & _PAGE_CA_MASK) | _PAGE_CA_WT;
337#if 0
338	if (!write_combine)
339		prot |= _PAGE_WRITETHRU;
340#endif
341	vma->vm_page_prot = __pgprot(prot);
342}
343
344/*
345 * Perform the actual remap of the pages for a PCI device mapping, as
346 * appropriate for this architecture.  The region in the process to map
347 * is described by vm_start and vm_end members of VMA, the base physical
348 * address is found in vm_pgoff.
349 * The pci device structure is provided so that architectures may make mapping
350 * decisions on a per-device or per-bus basis.
351 *
352 * Returns a negative error code on failure, zero on success.
353 */
354int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,
355			enum pci_mmap_state mmap_state,
356			int write_combine)
357{
358	int ret;
359
360	ret = __pci_mmap_make_offset(dev, vma, mmap_state);
361	if (ret < 0)
362		return ret;
363
364	__pci_mmap_set_pgprot(dev, vma, mmap_state, write_combine);
365
366	ret = io_remap_pfn_range(vma, vma->vm_start, vma->vm_pgoff,
367			         vma->vm_end - vma->vm_start,vma->vm_page_prot);
368
369	return ret;
370}
371