1/*
2 * EIM driver for Freescale's i.MX chips
3 *
4 * Copyright (C) 2013 Freescale Semiconductor, Inc.
5 *
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied.
9 */
10#include <linux/module.h>
11#include <linux/clk.h>
12#include <linux/io.h>
13#include <linux/of_device.h>
14#include <linux/mfd/syscon.h>
15#include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
16#include <linux/regmap.h>
17
18struct imx_weim_devtype {
19	unsigned int	cs_count;
20	unsigned int	cs_regs_count;
21	unsigned int	cs_stride;
22};
23
24static const struct imx_weim_devtype imx1_weim_devtype = {
25	.cs_count	= 6,
26	.cs_regs_count	= 2,
27	.cs_stride	= 0x08,
28};
29
30static const struct imx_weim_devtype imx27_weim_devtype = {
31	.cs_count	= 6,
32	.cs_regs_count	= 3,
33	.cs_stride	= 0x10,
34};
35
36static const struct imx_weim_devtype imx50_weim_devtype = {
37	.cs_count	= 4,
38	.cs_regs_count	= 6,
39	.cs_stride	= 0x18,
40};
41
42static const struct imx_weim_devtype imx51_weim_devtype = {
43	.cs_count	= 6,
44	.cs_regs_count	= 6,
45	.cs_stride	= 0x18,
46};
47
48static const struct of_device_id weim_id_table[] = {
49	/* i.MX1/21 */
50	{ .compatible = "fsl,imx1-weim", .data = &imx1_weim_devtype, },
51	/* i.MX25/27/31/35 */
52	{ .compatible = "fsl,imx27-weim", .data = &imx27_weim_devtype, },
53	/* i.MX50/53/6Q */
54	{ .compatible = "fsl,imx50-weim", .data = &imx50_weim_devtype, },
55	{ .compatible = "fsl,imx6q-weim", .data = &imx50_weim_devtype, },
56	/* i.MX51 */
57	{ .compatible = "fsl,imx51-weim", .data = &imx51_weim_devtype, },
58	{ }
59};
60MODULE_DEVICE_TABLE(of, weim_id_table);
61
62static int __init imx_weim_gpr_setup(struct platform_device *pdev)
63{
64	struct device_node *np = pdev->dev.of_node;
65	struct property *prop;
66	const __be32 *p;
67	struct regmap *gpr;
68	u32 gprvals[4] = {
69		05,	/* CS0(128M) CS1(0M)  CS2(0M)  CS3(0M)  */
70		033,	/* CS0(64M)  CS1(64M) CS2(0M)  CS3(0M)  */
71		0113,	/* CS0(64M)  CS1(32M) CS2(32M) CS3(0M)  */
72		01111,	/* CS0(32M)  CS1(32M) CS2(32M) CS3(32M) */
73	};
74	u32 gprval = 0;
75	u32 val;
76	int cs = 0;
77	int i = 0;
78
79	gpr = syscon_regmap_lookup_by_phandle(np, "fsl,weim-cs-gpr");
80	if (IS_ERR(gpr)) {
81		dev_dbg(&pdev->dev, "failed to find weim-cs-gpr\n");
82		return 0;
83	}
84
85	of_property_for_each_u32(np, "ranges", prop, p, val) {
86		if (i % 4 == 0) {
87			cs = val;
88		} else if (i % 4 == 3 && val) {
89			val = (val / SZ_32M) | 1;
90			gprval |= val << cs * 3;
91		}
92		i++;
93	}
94
95	if (i == 0 || i % 4)
96		goto err;
97
98	for (i = 0; i < ARRAY_SIZE(gprvals); i++) {
99		if (gprval == gprvals[i]) {
100			/* Found it. Set up IOMUXC_GPR1[11:0] with it. */
101			regmap_update_bits(gpr, IOMUXC_GPR1, 0xfff, gprval);
102			return 0;
103		}
104	}
105
106err:
107	dev_err(&pdev->dev, "Invalid 'ranges' configuration\n");
108	return -EINVAL;
109}
110
111/* Parse and set the timing for this device. */
112static int __init weim_timing_setup(struct device_node *np, void __iomem *base,
113				    const struct imx_weim_devtype *devtype)
114{
115	u32 cs_idx, value[devtype->cs_regs_count];
116	int i, ret;
117
118	/* get the CS index from this child node's "reg" property. */
119	ret = of_property_read_u32(np, "reg", &cs_idx);
120	if (ret)
121		return ret;
122
123	if (cs_idx >= devtype->cs_count)
124		return -EINVAL;
125
126	ret = of_property_read_u32_array(np, "fsl,weim-cs-timing",
127					 value, devtype->cs_regs_count);
128	if (ret)
129		return ret;
130
131	/* set the timing for WEIM */
132	for (i = 0; i < devtype->cs_regs_count; i++)
133		writel(value[i], base + cs_idx * devtype->cs_stride + i * 4);
134
135	return 0;
136}
137
138static int __init weim_parse_dt(struct platform_device *pdev,
139				void __iomem *base)
140{
141	const struct of_device_id *of_id = of_match_device(weim_id_table,
142							   &pdev->dev);
143	const struct imx_weim_devtype *devtype = of_id->data;
144	struct device_node *child;
145	int ret;
146
147	if (devtype == &imx50_weim_devtype) {
148		ret = imx_weim_gpr_setup(pdev);
149		if (ret)
150			return ret;
151	}
152
153	for_each_child_of_node(pdev->dev.of_node, child) {
154		if (!child->name)
155			continue;
156
157		ret = weim_timing_setup(child, base, devtype);
158		if (ret) {
159			dev_err(&pdev->dev, "%s set timing failed.\n",
160				child->full_name);
161			return ret;
162		}
163	}
164
165	ret = of_platform_populate(pdev->dev.of_node,
166				   of_default_bus_match_table,
167				   NULL, &pdev->dev);
168	if (ret)
169		dev_err(&pdev->dev, "%s fail to create devices.\n",
170			pdev->dev.of_node->full_name);
171	return ret;
172}
173
174static int __init weim_probe(struct platform_device *pdev)
175{
176	struct resource *res;
177	struct clk *clk;
178	void __iomem *base;
179	int ret;
180
181	/* get the resource */
182	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
183	base = devm_ioremap_resource(&pdev->dev, res);
184	if (IS_ERR(base))
185		return PTR_ERR(base);
186
187	/* get the clock */
188	clk = devm_clk_get(&pdev->dev, NULL);
189	if (IS_ERR(clk))
190		return PTR_ERR(clk);
191
192	ret = clk_prepare_enable(clk);
193	if (ret)
194		return ret;
195
196	/* parse the device node */
197	ret = weim_parse_dt(pdev, base);
198	if (ret)
199		clk_disable_unprepare(clk);
200	else
201		dev_info(&pdev->dev, "Driver registered.\n");
202
203	return ret;
204}
205
206static struct platform_driver weim_driver = {
207	.driver = {
208		.name		= "imx-weim",
209		.owner		= THIS_MODULE,
210		.of_match_table	= weim_id_table,
211	},
212};
213module_platform_driver_probe(weim_driver, weim_probe);
214
215MODULE_AUTHOR("Freescale Semiconductor Inc.");
216MODULE_DESCRIPTION("i.MX EIM Controller Driver");
217MODULE_LICENSE("GPL");
218