clk-kona-setup.c revision a597faccc7eedd406313e880ed05ff75bc522910
1/* 2 * Copyright (C) 2013 Broadcom Corporation 3 * Copyright 2013 Linaro Limited 4 * 5 * This program is free software; you can redistribute it and/or 6 * modify it under the terms of the GNU General Public License as 7 * published by the Free Software Foundation version 2. 8 * 9 * This program is distributed "as is" WITHOUT ANY WARRANTY of any 10 * kind, whether express or implied; without even the implied warranty 11 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 * GNU General Public License for more details. 13 */ 14 15#include <linux/io.h> 16#include <linux/of_address.h> 17 18#include "clk-kona.h" 19 20/* These are used when a selector or trigger is found to be unneeded */ 21#define selector_clear_exists(sel) ((sel)->width = 0) 22#define trigger_clear_exists(trig) FLAG_CLEAR(trig, TRIG, EXISTS) 23 24LIST_HEAD(ccu_list); /* The list of set up CCUs */ 25 26/* Validity checking */ 27 28static bool ccu_data_offsets_valid(struct ccu_data *ccu) 29{ 30 struct ccu_policy *ccu_policy = &ccu->policy; 31 u32 limit; 32 33 limit = ccu->range - sizeof(u32); 34 limit = round_down(limit, sizeof(u32)); 35 if (ccu_policy_exists(ccu_policy)) { 36 if (ccu_policy->enable.offset > limit) { 37 pr_err("%s: bad policy enable offset for %s " 38 "(%u > %u)\n", __func__, 39 ccu->name, ccu_policy->enable.offset, limit); 40 return false; 41 } 42 if (ccu_policy->control.offset > limit) { 43 pr_err("%s: bad policy control offset for %s " 44 "(%u > %u)\n", __func__, 45 ccu->name, ccu_policy->control.offset, limit); 46 return false; 47 } 48 } 49 50 return true; 51} 52 53static bool clk_requires_trigger(struct kona_clk *bcm_clk) 54{ 55 struct peri_clk_data *peri = bcm_clk->u.peri; 56 struct bcm_clk_sel *sel; 57 struct bcm_clk_div *div; 58 59 if (bcm_clk->type != bcm_clk_peri) 60 return false; 61 62 sel = &peri->sel; 63 if (sel->parent_count && selector_exists(sel)) 64 return true; 65 66 div = &peri->div; 67 if (!divider_exists(div)) 68 return false; 69 70 /* Fixed dividers don't need triggers */ 71 if (!divider_is_fixed(div)) 72 return true; 73 74 div = &peri->pre_div; 75 76 return divider_exists(div) && !divider_is_fixed(div); 77} 78 79static bool peri_clk_data_offsets_valid(struct kona_clk *bcm_clk) 80{ 81 struct peri_clk_data *peri; 82 struct bcm_clk_policy *policy; 83 struct bcm_clk_gate *gate; 84 struct bcm_clk_div *div; 85 struct bcm_clk_sel *sel; 86 struct bcm_clk_trig *trig; 87 const char *name; 88 u32 range; 89 u32 limit; 90 91 BUG_ON(bcm_clk->type != bcm_clk_peri); 92 peri = bcm_clk->u.peri; 93 name = bcm_clk->init_data.name; 94 range = bcm_clk->ccu->range; 95 96 limit = range - sizeof(u32); 97 limit = round_down(limit, sizeof(u32)); 98 99 policy = &peri->policy; 100 if (policy_exists(policy)) { 101 if (policy->offset > limit) { 102 pr_err("%s: bad policy offset for %s (%u > %u)\n", 103 __func__, name, policy->offset, limit); 104 return false; 105 } 106 } 107 108 gate = &peri->gate; 109 if (gate_exists(gate)) { 110 if (gate->offset > limit) { 111 pr_err("%s: bad gate offset for %s (%u > %u)\n", 112 __func__, name, gate->offset, limit); 113 return false; 114 } 115 } 116 117 div = &peri->div; 118 if (divider_exists(div)) { 119 if (div->u.s.offset > limit) { 120 pr_err("%s: bad divider offset for %s (%u > %u)\n", 121 __func__, name, div->u.s.offset, limit); 122 return false; 123 } 124 } 125 126 div = &peri->pre_div; 127 if (divider_exists(div)) { 128 if (div->u.s.offset > limit) { 129 pr_err("%s: bad pre-divider offset for %s " 130 "(%u > %u)\n", 131 __func__, name, div->u.s.offset, limit); 132 return false; 133 } 134 } 135 136 sel = &peri->sel; 137 if (selector_exists(sel)) { 138 if (sel->offset > limit) { 139 pr_err("%s: bad selector offset for %s (%u > %u)\n", 140 __func__, name, sel->offset, limit); 141 return false; 142 } 143 } 144 145 trig = &peri->trig; 146 if (trigger_exists(trig)) { 147 if (trig->offset > limit) { 148 pr_err("%s: bad trigger offset for %s (%u > %u)\n", 149 __func__, name, trig->offset, limit); 150 return false; 151 } 152 } 153 154 trig = &peri->pre_trig; 155 if (trigger_exists(trig)) { 156 if (trig->offset > limit) { 157 pr_err("%s: bad pre-trigger offset for %s (%u > %u)\n", 158 __func__, name, trig->offset, limit); 159 return false; 160 } 161 } 162 163 return true; 164} 165 166/* A bit position must be less than the number of bits in a 32-bit register. */ 167static bool bit_posn_valid(u32 bit_posn, const char *field_name, 168 const char *clock_name) 169{ 170 u32 limit = BITS_PER_BYTE * sizeof(u32) - 1; 171 172 if (bit_posn > limit) { 173 pr_err("%s: bad %s bit for %s (%u > %u)\n", __func__, 174 field_name, clock_name, bit_posn, limit); 175 return false; 176 } 177 return true; 178} 179 180/* 181 * A bitfield must be at least 1 bit wide. Both the low-order and 182 * high-order bits must lie within a 32-bit register. We require 183 * fields to be less than 32 bits wide, mainly because we use 184 * shifting to produce field masks, and shifting a full word width 185 * is not well-defined by the C standard. 186 */ 187static bool bitfield_valid(u32 shift, u32 width, const char *field_name, 188 const char *clock_name) 189{ 190 u32 limit = BITS_PER_BYTE * sizeof(u32); 191 192 if (!width) { 193 pr_err("%s: bad %s field width 0 for %s\n", __func__, 194 field_name, clock_name); 195 return false; 196 } 197 if (shift + width > limit) { 198 pr_err("%s: bad %s for %s (%u + %u > %u)\n", __func__, 199 field_name, clock_name, shift, width, limit); 200 return false; 201 } 202 return true; 203} 204 205static bool 206ccu_policy_valid(struct ccu_policy *ccu_policy, const char *ccu_name) 207{ 208 struct bcm_lvm_en *enable = &ccu_policy->enable; 209 struct bcm_policy_ctl *control; 210 211 if (!bit_posn_valid(enable->bit, "policy enable", ccu_name)) 212 return false; 213 214 control = &ccu_policy->control; 215 if (!bit_posn_valid(control->go_bit, "policy control GO", ccu_name)) 216 return false; 217 218 if (!bit_posn_valid(control->atl_bit, "policy control ATL", ccu_name)) 219 return false; 220 221 if (!bit_posn_valid(control->ac_bit, "policy control AC", ccu_name)) 222 return false; 223 224 return true; 225} 226 227static bool policy_valid(struct bcm_clk_policy *policy, const char *clock_name) 228{ 229 if (!bit_posn_valid(policy->bit, "policy", clock_name)) 230 return false; 231 232 return true; 233} 234 235/* 236 * All gates, if defined, have a status bit, and for hardware-only 237 * gates, that's it. Gates that can be software controlled also 238 * have an enable bit. And a gate that can be hardware or software 239 * controlled will have a hardware/software select bit. 240 */ 241static bool gate_valid(struct bcm_clk_gate *gate, const char *field_name, 242 const char *clock_name) 243{ 244 if (!bit_posn_valid(gate->status_bit, "gate status", clock_name)) 245 return false; 246 247 if (gate_is_sw_controllable(gate)) { 248 if (!bit_posn_valid(gate->en_bit, "gate enable", clock_name)) 249 return false; 250 251 if (gate_is_hw_controllable(gate)) { 252 if (!bit_posn_valid(gate->hw_sw_sel_bit, 253 "gate hw/sw select", 254 clock_name)) 255 return false; 256 } 257 } else { 258 BUG_ON(!gate_is_hw_controllable(gate)); 259 } 260 261 return true; 262} 263 264/* 265 * A selector bitfield must be valid. Its parent_sel array must 266 * also be reasonable for the field. 267 */ 268static bool sel_valid(struct bcm_clk_sel *sel, const char *field_name, 269 const char *clock_name) 270{ 271 if (!bitfield_valid(sel->shift, sel->width, field_name, clock_name)) 272 return false; 273 274 if (sel->parent_count) { 275 u32 max_sel; 276 u32 limit; 277 278 /* 279 * Make sure the selector field can hold all the 280 * selector values we expect to be able to use. A 281 * clock only needs to have a selector defined if it 282 * has more than one parent. And in that case the 283 * highest selector value will be in the last entry 284 * in the array. 285 */ 286 max_sel = sel->parent_sel[sel->parent_count - 1]; 287 limit = (1 << sel->width) - 1; 288 if (max_sel > limit) { 289 pr_err("%s: bad selector for %s " 290 "(%u needs > %u bits)\n", 291 __func__, clock_name, max_sel, 292 sel->width); 293 return false; 294 } 295 } else { 296 pr_warn("%s: ignoring selector for %s (no parents)\n", 297 __func__, clock_name); 298 selector_clear_exists(sel); 299 kfree(sel->parent_sel); 300 sel->parent_sel = NULL; 301 } 302 303 return true; 304} 305 306/* 307 * A fixed divider just needs to be non-zero. A variable divider 308 * has to have a valid divider bitfield, and if it has a fraction, 309 * the width of the fraction must not be no more than the width of 310 * the divider as a whole. 311 */ 312static bool div_valid(struct bcm_clk_div *div, const char *field_name, 313 const char *clock_name) 314{ 315 if (divider_is_fixed(div)) { 316 /* Any fixed divider value but 0 is OK */ 317 if (div->u.fixed == 0) { 318 pr_err("%s: bad %s fixed value 0 for %s\n", __func__, 319 field_name, clock_name); 320 return false; 321 } 322 return true; 323 } 324 if (!bitfield_valid(div->u.s.shift, div->u.s.width, 325 field_name, clock_name)) 326 return false; 327 328 if (divider_has_fraction(div)) 329 if (div->u.s.frac_width > div->u.s.width) { 330 pr_warn("%s: bad %s fraction width for %s (%u > %u)\n", 331 __func__, field_name, clock_name, 332 div->u.s.frac_width, div->u.s.width); 333 return false; 334 } 335 336 return true; 337} 338 339/* 340 * If a clock has two dividers, the combined number of fractional 341 * bits must be representable in a 32-bit unsigned value. This 342 * is because we scale up a dividend using both dividers before 343 * dividing to improve accuracy, and we need to avoid overflow. 344 */ 345static bool kona_dividers_valid(struct kona_clk *bcm_clk) 346{ 347 struct peri_clk_data *peri = bcm_clk->u.peri; 348 struct bcm_clk_div *div; 349 struct bcm_clk_div *pre_div; 350 u32 limit; 351 352 BUG_ON(bcm_clk->type != bcm_clk_peri); 353 354 if (!divider_exists(&peri->div) || !divider_exists(&peri->pre_div)) 355 return true; 356 357 div = &peri->div; 358 pre_div = &peri->pre_div; 359 if (divider_is_fixed(div) || divider_is_fixed(pre_div)) 360 return true; 361 362 limit = BITS_PER_BYTE * sizeof(u32); 363 364 return div->u.s.frac_width + pre_div->u.s.frac_width <= limit; 365} 366 367 368/* A trigger just needs to represent a valid bit position */ 369static bool trig_valid(struct bcm_clk_trig *trig, const char *field_name, 370 const char *clock_name) 371{ 372 return bit_posn_valid(trig->bit, field_name, clock_name); 373} 374 375/* Determine whether the set of peripheral clock registers are valid. */ 376static bool 377peri_clk_data_valid(struct kona_clk *bcm_clk) 378{ 379 struct peri_clk_data *peri; 380 struct bcm_clk_policy *policy; 381 struct bcm_clk_gate *gate; 382 struct bcm_clk_sel *sel; 383 struct bcm_clk_div *div; 384 struct bcm_clk_div *pre_div; 385 struct bcm_clk_trig *trig; 386 const char *name; 387 388 BUG_ON(bcm_clk->type != bcm_clk_peri); 389 390 /* 391 * First validate register offsets. This is the only place 392 * where we need something from the ccu, so we do these 393 * together. 394 */ 395 if (!peri_clk_data_offsets_valid(bcm_clk)) 396 return false; 397 398 peri = bcm_clk->u.peri; 399 name = bcm_clk->init_data.name; 400 401 policy = &peri->policy; 402 if (policy_exists(policy) && !policy_valid(policy, name)) 403 return false; 404 405 gate = &peri->gate; 406 if (gate_exists(gate) && !gate_valid(gate, "gate", name)) 407 return false; 408 409 sel = &peri->sel; 410 if (selector_exists(sel)) { 411 if (!sel_valid(sel, "selector", name)) 412 return false; 413 414 } else if (sel->parent_count > 1) { 415 pr_err("%s: multiple parents but no selector for %s\n", 416 __func__, name); 417 418 return false; 419 } 420 421 div = &peri->div; 422 pre_div = &peri->pre_div; 423 if (divider_exists(div)) { 424 if (!div_valid(div, "divider", name)) 425 return false; 426 427 if (divider_exists(pre_div)) 428 if (!div_valid(pre_div, "pre-divider", name)) 429 return false; 430 } else if (divider_exists(pre_div)) { 431 pr_err("%s: pre-divider but no divider for %s\n", __func__, 432 name); 433 return false; 434 } 435 436 trig = &peri->trig; 437 if (trigger_exists(trig)) { 438 if (!trig_valid(trig, "trigger", name)) 439 return false; 440 441 if (trigger_exists(&peri->pre_trig)) { 442 if (!trig_valid(trig, "pre-trigger", name)) { 443 return false; 444 } 445 } 446 if (!clk_requires_trigger(bcm_clk)) { 447 pr_warn("%s: ignoring trigger for %s (not needed)\n", 448 __func__, name); 449 trigger_clear_exists(trig); 450 } 451 } else if (trigger_exists(&peri->pre_trig)) { 452 pr_err("%s: pre-trigger but no trigger for %s\n", __func__, 453 name); 454 return false; 455 } else if (clk_requires_trigger(bcm_clk)) { 456 pr_err("%s: required trigger missing for %s\n", __func__, 457 name); 458 return false; 459 } 460 461 return kona_dividers_valid(bcm_clk); 462} 463 464static bool kona_clk_valid(struct kona_clk *bcm_clk) 465{ 466 switch (bcm_clk->type) { 467 case bcm_clk_peri: 468 if (!peri_clk_data_valid(bcm_clk)) 469 return false; 470 break; 471 default: 472 pr_err("%s: unrecognized clock type (%d)\n", __func__, 473 (int)bcm_clk->type); 474 return false; 475 } 476 return true; 477} 478 479/* 480 * Scan an array of parent clock names to determine whether there 481 * are any entries containing BAD_CLK_NAME. Such entries are 482 * placeholders for non-supported clocks. Keep track of the 483 * position of each clock name in the original array. 484 * 485 * Allocates an array of pointers to to hold the names of all 486 * non-null entries in the original array, and returns a pointer to 487 * that array in *names. This will be used for registering the 488 * clock with the common clock code. On successful return, 489 * *count indicates how many entries are in that names array. 490 * 491 * If there is more than one entry in the resulting names array, 492 * another array is allocated to record the parent selector value 493 * for each (defined) parent clock. This is the value that 494 * represents this parent clock in the clock's source selector 495 * register. The position of the clock in the original parent array 496 * defines that selector value. The number of entries in this array 497 * is the same as the number of entries in the parent names array. 498 * 499 * The array of selector values is returned. If the clock has no 500 * parents, no selector is required and a null pointer is returned. 501 * 502 * Returns a null pointer if the clock names array supplied was 503 * null. (This is not an error.) 504 * 505 * Returns a pointer-coded error if an error occurs. 506 */ 507static u32 *parent_process(const char *clocks[], 508 u32 *count, const char ***names) 509{ 510 static const char **parent_names; 511 static u32 *parent_sel; 512 const char **clock; 513 u32 parent_count; 514 u32 bad_count = 0; 515 u32 orig_count; 516 u32 i; 517 u32 j; 518 519 *count = 0; /* In case of early return */ 520 *names = NULL; 521 if (!clocks) 522 return NULL; 523 524 /* 525 * Count the number of names in the null-terminated array, 526 * and find out how many of those are actually clock names. 527 */ 528 for (clock = clocks; *clock; clock++) 529 if (*clock == BAD_CLK_NAME) 530 bad_count++; 531 orig_count = (u32)(clock - clocks); 532 parent_count = orig_count - bad_count; 533 534 /* If all clocks are unsupported, we treat it as no clock */ 535 if (!parent_count) 536 return NULL; 537 538 /* Avoid exceeding our parent clock limit */ 539 if (parent_count > PARENT_COUNT_MAX) { 540 pr_err("%s: too many parents (%u > %u)\n", __func__, 541 parent_count, PARENT_COUNT_MAX); 542 return ERR_PTR(-EINVAL); 543 } 544 545 /* 546 * There is one parent name for each defined parent clock. 547 * We also maintain an array containing the selector value 548 * for each defined clock. If there's only one clock, the 549 * selector is not required, but we allocate space for the 550 * array anyway to keep things simple. 551 */ 552 parent_names = kmalloc(parent_count * sizeof(parent_names), GFP_KERNEL); 553 if (!parent_names) { 554 pr_err("%s: error allocating %u parent names\n", __func__, 555 parent_count); 556 return ERR_PTR(-ENOMEM); 557 } 558 559 /* There is at least one parent, so allocate a selector array */ 560 561 parent_sel = kmalloc(parent_count * sizeof(*parent_sel), GFP_KERNEL); 562 if (!parent_sel) { 563 pr_err("%s: error allocating %u parent selectors\n", __func__, 564 parent_count); 565 kfree(parent_names); 566 567 return ERR_PTR(-ENOMEM); 568 } 569 570 /* Now fill in the parent names and selector arrays */ 571 for (i = 0, j = 0; i < orig_count; i++) { 572 if (clocks[i] != BAD_CLK_NAME) { 573 parent_names[j] = clocks[i]; 574 parent_sel[j] = i; 575 j++; 576 } 577 } 578 *names = parent_names; 579 *count = parent_count; 580 581 return parent_sel; 582} 583 584static int 585clk_sel_setup(const char **clocks, struct bcm_clk_sel *sel, 586 struct clk_init_data *init_data) 587{ 588 const char **parent_names = NULL; 589 u32 parent_count = 0; 590 u32 *parent_sel; 591 592 /* 593 * If a peripheral clock has multiple parents, the value 594 * used by the hardware to select that parent is represented 595 * by the parent clock's position in the "clocks" list. Some 596 * values don't have defined or supported clocks; these will 597 * have BAD_CLK_NAME entries in the parents[] array. The 598 * list is terminated by a NULL entry. 599 * 600 * We need to supply (only) the names of defined parent 601 * clocks when registering a clock though, so we use an 602 * array of parent selector values to map between the 603 * indexes the common clock code uses and the selector 604 * values we need. 605 */ 606 parent_sel = parent_process(clocks, &parent_count, &parent_names); 607 if (IS_ERR(parent_sel)) { 608 int ret = PTR_ERR(parent_sel); 609 610 pr_err("%s: error processing parent clocks for %s (%d)\n", 611 __func__, init_data->name, ret); 612 613 return ret; 614 } 615 616 init_data->parent_names = parent_names; 617 init_data->num_parents = parent_count; 618 619 sel->parent_count = parent_count; 620 sel->parent_sel = parent_sel; 621 622 return 0; 623} 624 625static void clk_sel_teardown(struct bcm_clk_sel *sel, 626 struct clk_init_data *init_data) 627{ 628 kfree(sel->parent_sel); 629 sel->parent_sel = NULL; 630 sel->parent_count = 0; 631 632 init_data->num_parents = 0; 633 kfree(init_data->parent_names); 634 init_data->parent_names = NULL; 635} 636 637static void peri_clk_teardown(struct peri_clk_data *data, 638 struct clk_init_data *init_data) 639{ 640 clk_sel_teardown(&data->sel, init_data); 641} 642 643/* 644 * Caller is responsible for freeing the parent_names[] and 645 * parent_sel[] arrays in the peripheral clock's "data" structure 646 * that can be assigned if the clock has one or more parent clocks 647 * associated with it. 648 */ 649static int 650peri_clk_setup(struct peri_clk_data *data, struct clk_init_data *init_data) 651{ 652 init_data->flags = CLK_IGNORE_UNUSED; 653 654 return clk_sel_setup(data->clocks, &data->sel, init_data); 655} 656 657static void bcm_clk_teardown(struct kona_clk *bcm_clk) 658{ 659 switch (bcm_clk->type) { 660 case bcm_clk_peri: 661 peri_clk_teardown(bcm_clk->u.data, &bcm_clk->init_data); 662 break; 663 default: 664 break; 665 } 666 bcm_clk->u.data = NULL; 667 bcm_clk->type = bcm_clk_none; 668} 669 670static void kona_clk_teardown(struct clk *clk) 671{ 672 struct clk_hw *hw; 673 struct kona_clk *bcm_clk; 674 675 if (!clk) 676 return; 677 678 hw = __clk_get_hw(clk); 679 if (!hw) { 680 pr_err("%s: clk %p has null hw pointer\n", __func__, clk); 681 return; 682 } 683 clk_unregister(clk); 684 685 bcm_clk = to_kona_clk(hw); 686 bcm_clk_teardown(bcm_clk); 687} 688 689struct clk *kona_clk_setup(struct kona_clk *bcm_clk) 690{ 691 struct clk_init_data *init_data = &bcm_clk->init_data; 692 struct clk *clk = NULL; 693 694 switch (bcm_clk->type) { 695 case bcm_clk_peri: 696 if (peri_clk_setup(bcm_clk->u.data, init_data)) 697 return NULL; 698 break; 699 default: 700 pr_err("%s: clock type %d invalid for %s\n", __func__, 701 (int)bcm_clk->type, init_data->name); 702 return NULL; 703 } 704 705 /* Make sure everything makes sense before we set it up */ 706 if (!kona_clk_valid(bcm_clk)) { 707 pr_err("%s: clock data invalid for %s\n", __func__, 708 init_data->name); 709 goto out_teardown; 710 } 711 712 bcm_clk->hw.init = init_data; 713 clk = clk_register(NULL, &bcm_clk->hw); 714 if (IS_ERR(clk)) { 715 pr_err("%s: error registering clock %s (%ld)\n", __func__, 716 init_data->name, PTR_ERR(clk)); 717 goto out_teardown; 718 } 719 BUG_ON(!clk); 720 721 return clk; 722out_teardown: 723 bcm_clk_teardown(bcm_clk); 724 725 return NULL; 726} 727 728static void ccu_clks_teardown(struct ccu_data *ccu) 729{ 730 u32 i; 731 732 for (i = 0; i < ccu->clk_data.clk_num; i++) 733 kona_clk_teardown(ccu->clk_data.clks[i]); 734 kfree(ccu->clk_data.clks); 735} 736 737static void kona_ccu_teardown(struct ccu_data *ccu) 738{ 739 kfree(ccu->clk_data.clks); 740 ccu->clk_data.clks = NULL; 741 if (!ccu->base) 742 return; 743 744 of_clk_del_provider(ccu->node); /* safe if never added */ 745 ccu_clks_teardown(ccu); 746 list_del(&ccu->links); 747 of_node_put(ccu->node); 748 ccu->node = NULL; 749 iounmap(ccu->base); 750 ccu->base = NULL; 751} 752 753static bool ccu_data_valid(struct ccu_data *ccu) 754{ 755 struct ccu_policy *ccu_policy; 756 757 if (!ccu_data_offsets_valid(ccu)) 758 return false; 759 760 ccu_policy = &ccu->policy; 761 if (ccu_policy_exists(ccu_policy)) 762 if (!ccu_policy_valid(ccu_policy, ccu->name)) 763 return false; 764 765 return true; 766} 767 768/* 769 * Set up a CCU. Call the provided ccu_clks_setup callback to 770 * initialize the array of clocks provided by the CCU. 771 */ 772void __init kona_dt_ccu_setup(struct ccu_data *ccu, 773 struct device_node *node) 774{ 775 struct resource res = { 0 }; 776 resource_size_t range; 777 unsigned int i; 778 int ret; 779 780 if (ccu->clk_data.clk_num) { 781 size_t size; 782 783 size = ccu->clk_data.clk_num * sizeof(*ccu->clk_data.clks); 784 ccu->clk_data.clks = kzalloc(size, GFP_KERNEL); 785 if (!ccu->clk_data.clks) { 786 pr_err("%s: unable to allocate %u clocks for %s\n", 787 __func__, ccu->clk_data.clk_num, node->name); 788 return; 789 } 790 } 791 792 ret = of_address_to_resource(node, 0, &res); 793 if (ret) { 794 pr_err("%s: no valid CCU registers found for %s\n", __func__, 795 node->name); 796 goto out_err; 797 } 798 799 range = resource_size(&res); 800 if (range > (resource_size_t)U32_MAX) { 801 pr_err("%s: address range too large for %s\n", __func__, 802 node->name); 803 goto out_err; 804 } 805 806 ccu->range = (u32)range; 807 808 if (!ccu_data_valid(ccu)) { 809 pr_err("%s: ccu data not valid for %s\n", __func__, node->name); 810 goto out_err; 811 } 812 813 ccu->base = ioremap(res.start, ccu->range); 814 if (!ccu->base) { 815 pr_err("%s: unable to map CCU registers for %s\n", __func__, 816 node->name); 817 goto out_err; 818 } 819 ccu->node = of_node_get(node); 820 list_add_tail(&ccu->links, &ccu_list); 821 822 /* 823 * Set up each defined kona clock and save the result in 824 * the clock framework clock array (in ccu->data). Then 825 * register as a provider for these clocks. 826 */ 827 for (i = 0; i < ccu->clk_data.clk_num; i++) { 828 if (!ccu->kona_clks[i].ccu) 829 continue; 830 ccu->clk_data.clks[i] = kona_clk_setup(&ccu->kona_clks[i]); 831 } 832 833 ret = of_clk_add_provider(node, of_clk_src_onecell_get, &ccu->clk_data); 834 if (ret) { 835 pr_err("%s: error adding ccu %s as provider (%d)\n", __func__, 836 node->name, ret); 837 goto out_err; 838 } 839 840 if (!kona_ccu_init(ccu)) 841 pr_err("Broadcom %s initialization had errors\n", node->name); 842 843 return; 844out_err: 845 kona_ccu_teardown(ccu); 846 pr_err("Broadcom %s setup aborted\n", node->name); 847} 848