clk-kona-setup.c revision e813d49d2a477e3b64a9ff32ca7db5737d36cd91
1/* 2 * Copyright (C) 2013 Broadcom Corporation 3 * Copyright 2013 Linaro Limited 4 * 5 * This program is free software; you can redistribute it and/or 6 * modify it under the terms of the GNU General Public License as 7 * published by the Free Software Foundation version 2. 8 * 9 * This program is distributed "as is" WITHOUT ANY WARRANTY of any 10 * kind, whether express or implied; without even the implied warranty 11 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 * GNU General Public License for more details. 13 */ 14 15#include <linux/io.h> 16#include <linux/of_address.h> 17 18#include "clk-kona.h" 19 20/* These are used when a selector or trigger is found to be unneeded */ 21#define selector_clear_exists(sel) ((sel)->width = 0) 22#define trigger_clear_exists(trig) FLAG_CLEAR(trig, TRIG, EXISTS) 23 24LIST_HEAD(ccu_list); /* The list of set up CCUs */ 25 26/* Validity checking */ 27 28static bool clk_requires_trigger(struct kona_clk *bcm_clk) 29{ 30 struct peri_clk_data *peri = bcm_clk->u.peri; 31 struct bcm_clk_sel *sel; 32 struct bcm_clk_div *div; 33 34 if (bcm_clk->type != bcm_clk_peri) 35 return false; 36 37 sel = &peri->sel; 38 if (sel->parent_count && selector_exists(sel)) 39 return true; 40 41 div = &peri->div; 42 if (!divider_exists(div)) 43 return false; 44 45 /* Fixed dividers don't need triggers */ 46 if (!divider_is_fixed(div)) 47 return true; 48 49 div = &peri->pre_div; 50 51 return divider_exists(div) && !divider_is_fixed(div); 52} 53 54static bool peri_clk_data_offsets_valid(struct kona_clk *bcm_clk) 55{ 56 struct peri_clk_data *peri; 57 struct bcm_clk_gate *gate; 58 struct bcm_clk_div *div; 59 struct bcm_clk_sel *sel; 60 struct bcm_clk_trig *trig; 61 const char *name; 62 u32 range; 63 u32 limit; 64 65 BUG_ON(bcm_clk->type != bcm_clk_peri); 66 peri = bcm_clk->u.peri; 67 name = bcm_clk->name; 68 range = bcm_clk->ccu->range; 69 70 limit = range - sizeof(u32); 71 limit = round_down(limit, sizeof(u32)); 72 73 gate = &peri->gate; 74 if (gate_exists(gate)) { 75 if (gate->offset > limit) { 76 pr_err("%s: bad gate offset for %s (%u > %u)\n", 77 __func__, name, gate->offset, limit); 78 return false; 79 } 80 } 81 82 div = &peri->div; 83 if (divider_exists(div)) { 84 if (div->u.s.offset > limit) { 85 pr_err("%s: bad divider offset for %s (%u > %u)\n", 86 __func__, name, div->u.s.offset, limit); 87 return false; 88 } 89 } 90 91 div = &peri->pre_div; 92 if (divider_exists(div)) { 93 if (div->u.s.offset > limit) { 94 pr_err("%s: bad pre-divider offset for %s " 95 "(%u > %u)\n", 96 __func__, name, div->u.s.offset, limit); 97 return false; 98 } 99 } 100 101 sel = &peri->sel; 102 if (selector_exists(sel)) { 103 if (sel->offset > limit) { 104 pr_err("%s: bad selector offset for %s (%u > %u)\n", 105 __func__, name, sel->offset, limit); 106 return false; 107 } 108 } 109 110 trig = &peri->trig; 111 if (trigger_exists(trig)) { 112 if (trig->offset > limit) { 113 pr_err("%s: bad trigger offset for %s (%u > %u)\n", 114 __func__, name, trig->offset, limit); 115 return false; 116 } 117 } 118 119 trig = &peri->pre_trig; 120 if (trigger_exists(trig)) { 121 if (trig->offset > limit) { 122 pr_err("%s: bad pre-trigger offset for %s (%u > %u)\n", 123 __func__, name, trig->offset, limit); 124 return false; 125 } 126 } 127 128 return true; 129} 130 131/* A bit position must be less than the number of bits in a 32-bit register. */ 132static bool bit_posn_valid(u32 bit_posn, const char *field_name, 133 const char *clock_name) 134{ 135 u32 limit = BITS_PER_BYTE * sizeof(u32) - 1; 136 137 if (bit_posn > limit) { 138 pr_err("%s: bad %s bit for %s (%u > %u)\n", __func__, 139 field_name, clock_name, bit_posn, limit); 140 return false; 141 } 142 return true; 143} 144 145/* 146 * A bitfield must be at least 1 bit wide. Both the low-order and 147 * high-order bits must lie within a 32-bit register. We require 148 * fields to be less than 32 bits wide, mainly because we use 149 * shifting to produce field masks, and shifting a full word width 150 * is not well-defined by the C standard. 151 */ 152static bool bitfield_valid(u32 shift, u32 width, const char *field_name, 153 const char *clock_name) 154{ 155 u32 limit = BITS_PER_BYTE * sizeof(u32); 156 157 if (!width) { 158 pr_err("%s: bad %s field width 0 for %s\n", __func__, 159 field_name, clock_name); 160 return false; 161 } 162 if (shift + width > limit) { 163 pr_err("%s: bad %s for %s (%u + %u > %u)\n", __func__, 164 field_name, clock_name, shift, width, limit); 165 return false; 166 } 167 return true; 168} 169 170/* 171 * All gates, if defined, have a status bit, and for hardware-only 172 * gates, that's it. Gates that can be software controlled also 173 * have an enable bit. And a gate that can be hardware or software 174 * controlled will have a hardware/software select bit. 175 */ 176static bool gate_valid(struct bcm_clk_gate *gate, const char *field_name, 177 const char *clock_name) 178{ 179 if (!bit_posn_valid(gate->status_bit, "gate status", clock_name)) 180 return false; 181 182 if (gate_is_sw_controllable(gate)) { 183 if (!bit_posn_valid(gate->en_bit, "gate enable", clock_name)) 184 return false; 185 186 if (gate_is_hw_controllable(gate)) { 187 if (!bit_posn_valid(gate->hw_sw_sel_bit, 188 "gate hw/sw select", 189 clock_name)) 190 return false; 191 } 192 } else { 193 BUG_ON(!gate_is_hw_controllable(gate)); 194 } 195 196 return true; 197} 198 199/* 200 * A selector bitfield must be valid. Its parent_sel array must 201 * also be reasonable for the field. 202 */ 203static bool sel_valid(struct bcm_clk_sel *sel, const char *field_name, 204 const char *clock_name) 205{ 206 if (!bitfield_valid(sel->shift, sel->width, field_name, clock_name)) 207 return false; 208 209 if (sel->parent_count) { 210 u32 max_sel; 211 u32 limit; 212 213 /* 214 * Make sure the selector field can hold all the 215 * selector values we expect to be able to use. A 216 * clock only needs to have a selector defined if it 217 * has more than one parent. And in that case the 218 * highest selector value will be in the last entry 219 * in the array. 220 */ 221 max_sel = sel->parent_sel[sel->parent_count - 1]; 222 limit = (1 << sel->width) - 1; 223 if (max_sel > limit) { 224 pr_err("%s: bad selector for %s " 225 "(%u needs > %u bits)\n", 226 __func__, clock_name, max_sel, 227 sel->width); 228 return false; 229 } 230 } else { 231 pr_warn("%s: ignoring selector for %s (no parents)\n", 232 __func__, clock_name); 233 selector_clear_exists(sel); 234 kfree(sel->parent_sel); 235 sel->parent_sel = NULL; 236 } 237 238 return true; 239} 240 241/* 242 * A fixed divider just needs to be non-zero. A variable divider 243 * has to have a valid divider bitfield, and if it has a fraction, 244 * the width of the fraction must not be no more than the width of 245 * the divider as a whole. 246 */ 247static bool div_valid(struct bcm_clk_div *div, const char *field_name, 248 const char *clock_name) 249{ 250 if (divider_is_fixed(div)) { 251 /* Any fixed divider value but 0 is OK */ 252 if (div->u.fixed == 0) { 253 pr_err("%s: bad %s fixed value 0 for %s\n", __func__, 254 field_name, clock_name); 255 return false; 256 } 257 return true; 258 } 259 if (!bitfield_valid(div->u.s.shift, div->u.s.width, 260 field_name, clock_name)) 261 return false; 262 263 if (divider_has_fraction(div)) 264 if (div->u.s.frac_width > div->u.s.width) { 265 pr_warn("%s: bad %s fraction width for %s (%u > %u)\n", 266 __func__, field_name, clock_name, 267 div->u.s.frac_width, div->u.s.width); 268 return false; 269 } 270 271 return true; 272} 273 274/* 275 * If a clock has two dividers, the combined number of fractional 276 * bits must be representable in a 32-bit unsigned value. This 277 * is because we scale up a dividend using both dividers before 278 * dividing to improve accuracy, and we need to avoid overflow. 279 */ 280static bool kona_dividers_valid(struct kona_clk *bcm_clk) 281{ 282 struct peri_clk_data *peri = bcm_clk->u.peri; 283 struct bcm_clk_div *div; 284 struct bcm_clk_div *pre_div; 285 u32 limit; 286 287 BUG_ON(bcm_clk->type != bcm_clk_peri); 288 289 if (!divider_exists(&peri->div) || !divider_exists(&peri->pre_div)) 290 return true; 291 292 div = &peri->div; 293 pre_div = &peri->pre_div; 294 if (divider_is_fixed(div) || divider_is_fixed(pre_div)) 295 return true; 296 297 limit = BITS_PER_BYTE * sizeof(u32); 298 299 return div->u.s.frac_width + pre_div->u.s.frac_width <= limit; 300} 301 302 303/* A trigger just needs to represent a valid bit position */ 304static bool trig_valid(struct bcm_clk_trig *trig, const char *field_name, 305 const char *clock_name) 306{ 307 return bit_posn_valid(trig->bit, field_name, clock_name); 308} 309 310/* Determine whether the set of peripheral clock registers are valid. */ 311static bool 312peri_clk_data_valid(struct kona_clk *bcm_clk) 313{ 314 struct peri_clk_data *peri; 315 struct bcm_clk_gate *gate; 316 struct bcm_clk_sel *sel; 317 struct bcm_clk_div *div; 318 struct bcm_clk_div *pre_div; 319 struct bcm_clk_trig *trig; 320 const char *name; 321 322 BUG_ON(bcm_clk->type != bcm_clk_peri); 323 324 /* 325 * First validate register offsets. This is the only place 326 * where we need something from the ccu, so we do these 327 * together. 328 */ 329 if (!peri_clk_data_offsets_valid(bcm_clk)) 330 return false; 331 332 peri = bcm_clk->u.peri; 333 name = bcm_clk->name; 334 gate = &peri->gate; 335 if (gate_exists(gate) && !gate_valid(gate, "gate", name)) 336 return false; 337 338 sel = &peri->sel; 339 if (selector_exists(sel)) { 340 if (!sel_valid(sel, "selector", name)) 341 return false; 342 343 } else if (sel->parent_count > 1) { 344 pr_err("%s: multiple parents but no selector for %s\n", 345 __func__, name); 346 347 return false; 348 } 349 350 div = &peri->div; 351 pre_div = &peri->pre_div; 352 if (divider_exists(div)) { 353 if (!div_valid(div, "divider", name)) 354 return false; 355 356 if (divider_exists(pre_div)) 357 if (!div_valid(pre_div, "pre-divider", name)) 358 return false; 359 } else if (divider_exists(pre_div)) { 360 pr_err("%s: pre-divider but no divider for %s\n", __func__, 361 name); 362 return false; 363 } 364 365 trig = &peri->trig; 366 if (trigger_exists(trig)) { 367 if (!trig_valid(trig, "trigger", name)) 368 return false; 369 370 if (trigger_exists(&peri->pre_trig)) { 371 if (!trig_valid(trig, "pre-trigger", name)) { 372 return false; 373 } 374 } 375 if (!clk_requires_trigger(bcm_clk)) { 376 pr_warn("%s: ignoring trigger for %s (not needed)\n", 377 __func__, name); 378 trigger_clear_exists(trig); 379 } 380 } else if (trigger_exists(&peri->pre_trig)) { 381 pr_err("%s: pre-trigger but no trigger for %s\n", __func__, 382 name); 383 return false; 384 } else if (clk_requires_trigger(bcm_clk)) { 385 pr_err("%s: required trigger missing for %s\n", __func__, 386 name); 387 return false; 388 } 389 390 return kona_dividers_valid(bcm_clk); 391} 392 393static bool kona_clk_valid(struct kona_clk *bcm_clk) 394{ 395 switch (bcm_clk->type) { 396 case bcm_clk_peri: 397 if (!peri_clk_data_valid(bcm_clk)) 398 return false; 399 break; 400 default: 401 pr_err("%s: unrecognized clock type (%d)\n", __func__, 402 (int)bcm_clk->type); 403 return false; 404 } 405 return true; 406} 407 408/* 409 * Scan an array of parent clock names to determine whether there 410 * are any entries containing BAD_CLK_NAME. Such entries are 411 * placeholders for non-supported clocks. Keep track of the 412 * position of each clock name in the original array. 413 * 414 * Allocates an array of pointers to to hold the names of all 415 * non-null entries in the original array, and returns a pointer to 416 * that array in *names. This will be used for registering the 417 * clock with the common clock code. On successful return, 418 * *count indicates how many entries are in that names array. 419 * 420 * If there is more than one entry in the resulting names array, 421 * another array is allocated to record the parent selector value 422 * for each (defined) parent clock. This is the value that 423 * represents this parent clock in the clock's source selector 424 * register. The position of the clock in the original parent array 425 * defines that selector value. The number of entries in this array 426 * is the same as the number of entries in the parent names array. 427 * 428 * The array of selector values is returned. If the clock has no 429 * parents, no selector is required and a null pointer is returned. 430 * 431 * Returns a null pointer if the clock names array supplied was 432 * null. (This is not an error.) 433 * 434 * Returns a pointer-coded error if an error occurs. 435 */ 436static u32 *parent_process(const char *clocks[], 437 u32 *count, const char ***names) 438{ 439 static const char **parent_names; 440 static u32 *parent_sel; 441 const char **clock; 442 u32 parent_count; 443 u32 bad_count = 0; 444 u32 orig_count; 445 u32 i; 446 u32 j; 447 448 *count = 0; /* In case of early return */ 449 *names = NULL; 450 if (!clocks) 451 return NULL; 452 453 /* 454 * Count the number of names in the null-terminated array, 455 * and find out how many of those are actually clock names. 456 */ 457 for (clock = clocks; *clock; clock++) 458 if (*clock == BAD_CLK_NAME) 459 bad_count++; 460 orig_count = (u32)(clock - clocks); 461 parent_count = orig_count - bad_count; 462 463 /* If all clocks are unsupported, we treat it as no clock */ 464 if (!parent_count) 465 return NULL; 466 467 /* Avoid exceeding our parent clock limit */ 468 if (parent_count > PARENT_COUNT_MAX) { 469 pr_err("%s: too many parents (%u > %u)\n", __func__, 470 parent_count, PARENT_COUNT_MAX); 471 return ERR_PTR(-EINVAL); 472 } 473 474 /* 475 * There is one parent name for each defined parent clock. 476 * We also maintain an array containing the selector value 477 * for each defined clock. If there's only one clock, the 478 * selector is not required, but we allocate space for the 479 * array anyway to keep things simple. 480 */ 481 parent_names = kmalloc(parent_count * sizeof(parent_names), GFP_KERNEL); 482 if (!parent_names) { 483 pr_err("%s: error allocating %u parent names\n", __func__, 484 parent_count); 485 return ERR_PTR(-ENOMEM); 486 } 487 488 /* There is at least one parent, so allocate a selector array */ 489 490 parent_sel = kmalloc(parent_count * sizeof(*parent_sel), GFP_KERNEL); 491 if (!parent_sel) { 492 pr_err("%s: error allocating %u parent selectors\n", __func__, 493 parent_count); 494 kfree(parent_names); 495 496 return ERR_PTR(-ENOMEM); 497 } 498 499 /* Now fill in the parent names and selector arrays */ 500 for (i = 0, j = 0; i < orig_count; i++) { 501 if (clocks[i] != BAD_CLK_NAME) { 502 parent_names[j] = clocks[i]; 503 parent_sel[j] = i; 504 j++; 505 } 506 } 507 *names = parent_names; 508 *count = parent_count; 509 510 return parent_sel; 511} 512 513static int 514clk_sel_setup(const char **clocks, struct bcm_clk_sel *sel, 515 struct clk_init_data *init_data) 516{ 517 const char **parent_names = NULL; 518 u32 parent_count = 0; 519 u32 *parent_sel; 520 521 /* 522 * If a peripheral clock has multiple parents, the value 523 * used by the hardware to select that parent is represented 524 * by the parent clock's position in the "clocks" list. Some 525 * values don't have defined or supported clocks; these will 526 * have BAD_CLK_NAME entries in the parents[] array. The 527 * list is terminated by a NULL entry. 528 * 529 * We need to supply (only) the names of defined parent 530 * clocks when registering a clock though, so we use an 531 * array of parent selector values to map between the 532 * indexes the common clock code uses and the selector 533 * values we need. 534 */ 535 parent_sel = parent_process(clocks, &parent_count, &parent_names); 536 if (IS_ERR(parent_sel)) { 537 int ret = PTR_ERR(parent_sel); 538 539 pr_err("%s: error processing parent clocks for %s (%d)\n", 540 __func__, init_data->name, ret); 541 542 return ret; 543 } 544 545 init_data->parent_names = parent_names; 546 init_data->num_parents = parent_count; 547 548 sel->parent_count = parent_count; 549 sel->parent_sel = parent_sel; 550 551 return 0; 552} 553 554static void clk_sel_teardown(struct bcm_clk_sel *sel, 555 struct clk_init_data *init_data) 556{ 557 kfree(sel->parent_sel); 558 sel->parent_sel = NULL; 559 sel->parent_count = 0; 560 561 init_data->num_parents = 0; 562 kfree(init_data->parent_names); 563 init_data->parent_names = NULL; 564} 565 566static void peri_clk_teardown(struct peri_clk_data *data, 567 struct clk_init_data *init_data) 568{ 569 clk_sel_teardown(&data->sel, init_data); 570 init_data->ops = NULL; 571} 572 573/* 574 * Caller is responsible for freeing the parent_names[] and 575 * parent_sel[] arrays in the peripheral clock's "data" structure 576 * that can be assigned if the clock has one or more parent clocks 577 * associated with it. 578 */ 579static int peri_clk_setup(struct ccu_data *ccu, struct peri_clk_data *data, 580 struct clk_init_data *init_data) 581{ 582 init_data->ops = &kona_peri_clk_ops; 583 init_data->flags = CLK_IGNORE_UNUSED; 584 585 return clk_sel_setup(data->clocks, &data->sel, init_data); 586} 587 588static void bcm_clk_teardown(struct kona_clk *bcm_clk) 589{ 590 switch (bcm_clk->type) { 591 case bcm_clk_peri: 592 peri_clk_teardown(bcm_clk->u.data, &bcm_clk->init_data); 593 break; 594 default: 595 break; 596 } 597 bcm_clk->u.data = NULL; 598 bcm_clk->type = bcm_clk_none; 599} 600 601static void kona_clk_teardown(struct clk *clk) 602{ 603 struct clk_hw *hw; 604 struct kona_clk *bcm_clk; 605 606 if (!clk) 607 return; 608 609 hw = __clk_get_hw(clk); 610 if (!hw) { 611 pr_err("%s: clk %p has null hw pointer\n", __func__, clk); 612 return; 613 } 614 clk_unregister(clk); 615 616 bcm_clk = to_kona_clk(hw); 617 bcm_clk_teardown(bcm_clk); 618} 619 620struct clk *kona_clk_setup(struct ccu_data *ccu, const char *name, 621 enum bcm_clk_type type, void *data) 622{ 623 struct kona_clk *bcm_clk; 624 struct clk_init_data *init_data; 625 struct clk *clk = NULL; 626 627 bcm_clk = kzalloc(sizeof(*bcm_clk), GFP_KERNEL); 628 if (!bcm_clk) { 629 pr_err("%s: failed to allocate bcm_clk for %s\n", __func__, 630 name); 631 return NULL; 632 } 633 bcm_clk->ccu = ccu; 634 bcm_clk->name = name; 635 636 init_data = &bcm_clk->init_data; 637 init_data->name = name; 638 switch (type) { 639 case bcm_clk_peri: 640 if (peri_clk_setup(ccu, data, init_data)) 641 goto out_free; 642 break; 643 default: 644 data = NULL; 645 break; 646 } 647 bcm_clk->type = type; 648 bcm_clk->u.data = data; 649 650 /* Make sure everything makes sense before we set it up */ 651 if (!kona_clk_valid(bcm_clk)) { 652 pr_err("%s: clock data invalid for %s\n", __func__, name); 653 goto out_teardown; 654 } 655 656 bcm_clk->hw.init = init_data; 657 clk = clk_register(NULL, &bcm_clk->hw); 658 if (IS_ERR(clk)) { 659 pr_err("%s: error registering clock %s (%ld)\n", __func__, 660 name, PTR_ERR(clk)); 661 goto out_teardown; 662 } 663 BUG_ON(!clk); 664 665 return clk; 666out_teardown: 667 bcm_clk_teardown(bcm_clk); 668out_free: 669 kfree(bcm_clk); 670 671 return NULL; 672} 673 674static void ccu_clks_teardown(struct ccu_data *ccu) 675{ 676 u32 i; 677 678 for (i = 0; i < ccu->data.clk_num; i++) 679 kona_clk_teardown(ccu->data.clks[i]); 680 kfree(ccu->data.clks); 681} 682 683static void kona_ccu_teardown(struct ccu_data *ccu) 684{ 685 if (!ccu) 686 return; 687 688 if (!ccu->base) 689 goto done; 690 691 of_clk_del_provider(ccu->node); /* safe if never added */ 692 ccu_clks_teardown(ccu); 693 list_del(&ccu->links); 694 of_node_put(ccu->node); 695 iounmap(ccu->base); 696done: 697 kfree(ccu->name); 698 kfree(ccu); 699} 700 701/* 702 * Set up a CCU. Call the provided ccu_clks_setup callback to 703 * initialize the array of clocks provided by the CCU. 704 */ 705void __init kona_dt_ccu_setup(struct device_node *node, 706 int (*ccu_clks_setup)(struct ccu_data *)) 707{ 708 struct ccu_data *ccu; 709 struct resource res = { 0 }; 710 resource_size_t range; 711 int ret; 712 713 ccu = kzalloc(sizeof(*ccu), GFP_KERNEL); 714 if (ccu) 715 ccu->name = kstrdup(node->name, GFP_KERNEL); 716 if (!ccu || !ccu->name) { 717 pr_err("%s: unable to allocate CCU struct for %s\n", 718 __func__, node->name); 719 kfree(ccu); 720 721 return; 722 } 723 724 ret = of_address_to_resource(node, 0, &res); 725 if (ret) { 726 pr_err("%s: no valid CCU registers found for %s\n", __func__, 727 node->name); 728 goto out_err; 729 } 730 731 range = resource_size(&res); 732 if (range > (resource_size_t)U32_MAX) { 733 pr_err("%s: address range too large for %s\n", __func__, 734 node->name); 735 goto out_err; 736 } 737 738 ccu->range = (u32)range; 739 ccu->base = ioremap(res.start, ccu->range); 740 if (!ccu->base) { 741 pr_err("%s: unable to map CCU registers for %s\n", __func__, 742 node->name); 743 goto out_err; 744 } 745 746 spin_lock_init(&ccu->lock); 747 INIT_LIST_HEAD(&ccu->links); 748 ccu->node = of_node_get(node); 749 750 list_add_tail(&ccu->links, &ccu_list); 751 752 /* Set up clocks array (in ccu->data) */ 753 if (ccu_clks_setup(ccu)) 754 goto out_err; 755 756 ret = of_clk_add_provider(node, of_clk_src_onecell_get, &ccu->data); 757 if (ret) { 758 pr_err("%s: error adding ccu %s as provider (%d)\n", __func__, 759 node->name, ret); 760 goto out_err; 761 } 762 763 if (!kona_ccu_init(ccu)) 764 pr_err("Broadcom %s initialization had errors\n", node->name); 765 766 return; 767out_err: 768 kona_ccu_teardown(ccu); 769 pr_err("Broadcom %s setup aborted\n", node->name); 770} 771